CA1164058A - Pull-in circuit of digital phase locked loop - Google Patents

Pull-in circuit of digital phase locked loop

Info

Publication number
CA1164058A
CA1164058A CA000391891A CA391891A CA1164058A CA 1164058 A CA1164058 A CA 1164058A CA 000391891 A CA000391891 A CA 000391891A CA 391891 A CA391891 A CA 391891A CA 1164058 A CA1164058 A CA 1164058A
Authority
CA
Canada
Prior art keywords
locked loop
output
phase locked
circuit
digital phase
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA000391891A
Other languages
English (en)
French (fr)
Inventor
Kuninosuke Ihira
Takashi Kaku
Shigeyuki Unagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of CA1164058A publication Critical patent/CA1164058A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0991—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider
    • H03L7/0992—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider
    • H03L7/0993—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator being a digital oscillator, e.g. composed of a fixed oscillator followed by a variable frequency divider comprising a counter or a frequency divider and a circuit for adding and deleting pulses
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
CA000391891A 1980-12-09 1981-12-09 Pull-in circuit of digital phase locked loop Expired CA1164058A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP55172672A JPS5797251A (en) 1980-12-09 1980-12-09 High speed phase lock system for digital phase locking circuit
JP172672/80 1980-12-09

Publications (1)

Publication Number Publication Date
CA1164058A true CA1164058A (en) 1984-03-20

Family

ID=15946224

Family Applications (1)

Application Number Title Priority Date Filing Date
CA000391891A Expired CA1164058A (en) 1980-12-09 1981-12-09 Pull-in circuit of digital phase locked loop

Country Status (5)

Country Link
US (1) US4445224A (enExample)
EP (1) EP0053939B1 (enExample)
JP (1) JPS5797251A (enExample)
CA (1) CA1164058A (enExample)
DE (1) DE3163681D1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506175A (en) * 1982-08-18 1985-03-19 Rca Corporation Digital phase comparator circuit producing sign and magnitude outputs
DE3374829D1 (en) * 1983-09-07 1988-01-14 Ibm Phase-locked clock
DE3432313A1 (de) * 1984-09-03 1986-03-13 Philips Patentverwaltung Gmbh, 2000 Hamburg Schaltungsanordnung zum synchronisieren eines signals
US4655089A (en) * 1985-06-07 1987-04-07 Smith Meter Inc. Mass flow meter and signal processing system
US4856028A (en) * 1986-04-25 1989-08-08 The Mitre Corporation Low data rate communications link
JPS6369354A (ja) * 1986-09-10 1988-03-29 Sumitomo Electric Ind Ltd 復調装置
US5073905A (en) * 1989-08-22 1991-12-17 Cincinnati Electronics Corporation Apparatus for and method of synchronizing a local oscillator to a received digital bit stream
US5172395A (en) * 1989-08-22 1992-12-15 Cincinnati Electronics Corporation Method of and apparatus for deriving an indication of noise content of data bits
JPH0494321U (enExample) * 1990-12-29 1992-08-17
US6018552A (en) * 1996-03-06 2000-01-25 Matsushita Electric Industrial Co., Ltd. Differential detection receiver
US6393067B1 (en) 1996-03-06 2002-05-21 Matsushita Electric Industrial Co., Ltd. Differential detection receiver
FR2751152A1 (fr) * 1996-07-10 1998-01-16 Philips Electronics Nv Recuperation d'horloge pour recepteur d'un systeme de transmission synchrone
US7257183B2 (en) * 2001-07-10 2007-08-14 Rambus Inc. Digital clock recovery circuit

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3962637A (en) * 1974-11-11 1976-06-08 Hycom Incorporated Ultrafast adaptive digital modem
US3952253A (en) * 1974-11-21 1976-04-20 The United States Of America As Represented By The United States Energy Research And Development Administration Method and means for generating a synchronizing pulse from a repetitive wave of varying frequency
US4355284A (en) * 1977-09-01 1982-10-19 Honeywell Inc. Phase correction system
JPS55132132A (en) * 1979-03-30 1980-10-14 Nec Corp Phase synchronizing circuit
US4339731A (en) * 1980-06-05 1982-07-13 Rockwell International Corporation Stable, fast slew, phase locked loop

Also Published As

Publication number Publication date
JPS5797251A (en) 1982-06-16
EP0053939B1 (en) 1984-05-16
DE3163681D1 (en) 1984-06-20
JPS6144424B2 (enExample) 1986-10-02
EP0053939A1 (en) 1982-06-16
US4445224A (en) 1984-04-24

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Legal Events

Date Code Title Description
MKEX Expiry