CA1150398A - Digital frequency modulation and modified frequency modulation read recovery with data separation - Google Patents
Digital frequency modulation and modified frequency modulation read recovery with data separationInfo
- Publication number
- CA1150398A CA1150398A CA000350880A CA350880A CA1150398A CA 1150398 A CA1150398 A CA 1150398A CA 000350880 A CA000350880 A CA 000350880A CA 350880 A CA350880 A CA 350880A CA 1150398 A CA1150398 A CA 1150398A
- Authority
- CA
- Canada
- Prior art keywords
- data
- signals
- signal
- generating
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1423—Code representation depending on subsequent bits, e.g. delay modulation, double density code, Miller code
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/038,767 US4320465A (en) | 1979-05-14 | 1979-05-14 | Digital frequency modulation and modified frequency modulation read recovery with data separation |
| US038,767 | 1993-04-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1150398A true CA1150398A (en) | 1983-07-19 |
Family
ID=21901778
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA000350880A Expired CA1150398A (en) | 1979-05-14 | 1980-04-29 | Digital frequency modulation and modified frequency modulation read recovery with data separation |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US4320465A (https=) |
| JP (1) | JPS55160316A (https=) |
| AU (1) | AU546718B2 (https=) |
| CA (1) | CA1150398A (https=) |
| FR (1) | FR2457045A1 (https=) |
| GB (1) | GB2050122B (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB8606028D0 (en) * | 1986-03-12 | 1986-04-16 | Int Computers Ltd | Decoder |
| GB2200518A (en) * | 1987-01-30 | 1988-08-03 | Crystalate Electronics | Data pulse timing |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3108261A (en) * | 1960-04-11 | 1963-10-22 | Ampex | Recording and/or reproducing system |
| JPS505569A (https=) * | 1973-05-18 | 1975-01-21 | ||
| US3859510A (en) * | 1973-12-26 | 1975-01-07 | Ibm | Data separation circuitry for reading information from a moving support |
| JPS5198006A (https=) * | 1975-02-21 | 1976-08-28 | ||
| US4000513A (en) * | 1975-07-28 | 1976-12-28 | Computer Peripherals, Inc. | Apparatus and method for data recording with peak shift compensation |
| US4054950A (en) * | 1976-04-29 | 1977-10-18 | Ncr Corporation | Apparatus for detecting a preamble in a bi-phase data recovery system |
| IT1072341B (it) * | 1976-05-20 | 1985-04-10 | Olivetti & Co Spa | Circuito e metodo per la discriminazione in lettura di dati preregistrati con codici diversi |
| US4034348A (en) * | 1976-06-28 | 1977-07-05 | Honeywell Information Systems, Inc. | Apparatus, including delay means, for sampling and recovering data recorded by the double transition recording technique |
| US4173027A (en) * | 1977-12-20 | 1979-10-30 | Honeywell Information Systems Inc. | Write precompensation system |
| US4212038A (en) * | 1978-01-03 | 1980-07-08 | Honeywell Information Systems Inc. | Double density read recovery |
-
1979
- 1979-05-14 US US06/038,767 patent/US4320465A/en not_active Expired - Lifetime
-
1980
- 1980-04-03 GB GB8011343A patent/GB2050122B/en not_active Expired
- 1980-04-29 CA CA000350880A patent/CA1150398A/en not_active Expired
- 1980-05-12 AU AU58318/80A patent/AU546718B2/en not_active Ceased
- 1980-05-12 FR FR8010592A patent/FR2457045A1/fr active Granted
- 1980-05-14 JP JP6385780A patent/JPS55160316A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| GB2050122B (en) | 1983-06-15 |
| GB2050122A (en) | 1980-12-31 |
| AU5831880A (en) | 1980-11-20 |
| FR2457045B1 (https=) | 1984-08-24 |
| FR2457045A1 (fr) | 1980-12-12 |
| JPS55160316A (en) | 1980-12-13 |
| AU546718B2 (en) | 1985-09-19 |
| US4320465A (en) | 1982-03-16 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |