CA1147662A

CA1147662A - System and method for storage and retrieval of platemaking data

Info

Publication number: CA1147662A
Application number: CA000328681A
Authority: CA
Inventors: Steven K. Harbaugh; Lyle K. Norton
Original assignee: American Hoechst Corp
Current assignee: CNA Holdings LLC
Priority date: 1978-06-05
Filing date: 1979-05-30
Publication date: 1983-06-07
Also published as: FR2427911A1; NL7904422A; IT7923293A0; GB2022358B; JPS5517193A; GB2022358A; SE7904869L; AU4768079A; DE2922527A1; FR2427911B3

Abstract

Abstract of the Disclosure Video back-up system and method for storing and retrieving data for plates produced with a laser platemaker. The image data is recorded with a video tape recorder having a helical scanning head, and indexing signals are recorded in an audio track on the tape. The image data is recorded in a bi-phase modulated form which is readily demodulated and which permits the original carrier to be recovered easily. The recorder is interfaced with the computer and a time code generator for rapid accessing of the image data.

Description

This invention pertains generally to tne imaging of data on photo-sensitive surfaces, such as printing plates, and more particularly to a system and method for storing the data on a medium from which it can be retrieved.
In the printing of newspapers and the like, it is desirable and sometimes necessary to be able to reproduce the plates from which certain pages are printed. Such need might arise9 for example in the case of loss or of damage to the original plates. With plates produced by a laser plate-making system, there is generally no negative which can be saved and used to make new plates as in the older photographic platemaking processes. If the paste-ups from which the original plates were made are no longer available, the plates cannot be reproduced except by making new paste-ups or perhaps by working from copies printed with the original plates.

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The problem is even more severe in the case of plates pro-duced by a computer driven laser platemaking system where at least a portion of the data comes from the memory of the computer. Bec~use of the cost and limited size of computer S memory, the data is generally erased shortly after each plate is made so that the memory can be used for other purposes~

The invention provides a back-up system and method for laser platemakers, both computer driven and locally operated, wherein the data for the plates is stored on a videotape from which it is readily retrieved. The video tape recorder has a helical scanning head, and the data is converted from the raster scan format of the platemaker to the helical scan format of the recorder~ The data is recorded in a bi-phase modulated form which is readily demodulated and which enables the original carrier to be recovered easily.
The recorder is interfaced with a computer and a time code generator for rapid accessing of the desired pages.

It is in general an object of the invention to provide a new and improved system and method for the storage and retrieval of platemaking data.

Another object of the invention is to provide a system and method of the above character utilizing a video tape recorder.

Another object of the invention is to provide a system and method of the above character in which the data is recorded in a bi-phase modulated form which is readily demodulated and which permits the carrier to be recovered easily.

Another ob]ect of the invention is to provide a system and method of the above character in which the recorder is interfaced with a computer and a time code generator to pro-vide rapid accessing of the stored data.

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Thus, in accordance with a broad aspect of the invention, there is provided a method for storing data for a plate made by scanning the same with a laser beam modulated in intensity in accordance with the data, comprising the steps of applying a signal representative of the data to a video recorder, and actuating the recorder to record the signal on a record medium associated therewith.

-2a-Additional objects and features of the invention will be apparent from the following description in which the pre-ferred embodiments are s~t forth in detail in conjunction with the accompanying drawings.

Figure 1 is a functional block diagram of a platemaking data storage system according to the invention.

Figures 2-3 are block diagrams of portiorls of an interface unit in the system of Figure 1.

Figure 4 is a graphical representation of the data formats for the platemaker and video tape recorder of the system of Figure 1.

Figure 5 is a timing diagram illustrating the encoding of ~he recorded data to identify the beginning of a new scan line.

Figure 6 is a functional block diagram for the recording mode of the video tape recorder in one embodiment of the system of Figure 1.

Figure 7 is a waveform diagram illustrating the bi-phase modulation technique of the invention.

Figure 8 is a functional block diagram for the playback mode of the video tape recorder in one embodiment of the system of Figure 1.

Figure g is a block diagram of one embodiment of a demodulator for use in the playback appa-ratus of Figure 8.

Figure 10 is a block dia~ram of a circuit for recovering the reference clock or carrier signal from the recorded signal in the system of Figure 1.

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Figure 11 is a waveform diagram illustrating the operation of the circuit of Figure 10.
Figure 12 is a block diagram of another embodiment of a demodulator for use in the playback system of Figure 8.
Figure 13 is a waveform diagram illwstrating the operation of the demodulator of Figure 12~
Figure 14 is a functional block diagram for the recording made of the video tape recorder in a second einbodiment of the system of Figure 1.
Figure 15 is a functional block diagram for the playback mode of the video tape recorder in the second embodiment of the system of Figure 1.
The invention is illustrated in connection with laser platemaker 16 which can, for example, be oE the type described in Ccmad:Lan Patent No.
1,085,307 of Amtower, issued September 9, 1980. Such a platemaker includes reading and writing laser beams which scan input and output s~lrfaces simultane-ously, with the writing beam forming an image of data scanned by the reading beam. The platemaker can likewise be of the type described in Canadian application Serial No. 32~,522 of Norton et al, filed March 30, 1979, wherein the platemaker is interfaced with a computer, and data can be transferred both from the reading beam of the platemaker to the computer and from the computer to the writing beam of the platemaker. Such a system is capable of three modes of operation~ a local mode in which data is imaged by the writing beam as it is scanned by the reading beam, (2) a computer driven mode in which only data from the computer is imaged, and (3) a merge mode in which data from both the computer ancl the reading surface is imaged.

, , As illustrated in Figure 1, the system includes a computer 17 with a terminal 18, a serial interface 1~, and a parallel interface 21. In the preerred embodiment, the computer is a Digital Equipment Corporation (DEC) PDP 11/03 microcom-puter with a 16-bit word size and an 8K internal memory.
Terminal 18 is a Texas Instruments Silent 700 terminal, interface 19 is a DEC DLVII serial interface, and interface 21 is a DEC DRVII parallel interface.

The system also includes a time generator 22, a video tape recorder 23, and an interface unit 24. In the preferred embodiment, the time code generator is a Data-ChrGn Model 3074 time code generator/translator which generates a 30-bit time code signal encoded in the standard IRIGB code repre-senting the day of the year (e.g. 365), the hour (e.g. 1~), the minute (e.g. 60) and the second (e.g. 60) at which a recording is made. This signal is applied to the video tape recorder and recorded serially in an audio track on the tape.
The time code generator also includes means for reading time code signals from the tape recorder and for controlling the recorder to search for a given time code which can be input through the computer or through switches associated with the time code generator.

Video tape recorder 23 is of the helical scan type, with a helical scanning head for the recording and playback of video information. The recorder also includes one or more heads for the recording and playback of audio information in a straight track on the videotape. In the preferred embodiment, the recorder is an International Video Corpora-tion (IVC) model 815 videotape recorder modified as described hereinafter for bi-phase modulation of the video data.

The helical scan video recorder is desirable because it has sufficient ~and~idth for the data rate at which the platemaker operates ~5.1 ~Hzl and it provides a relatively high density of recording on the tape. With a standard C ~

videotape, the unit will record abou~ forty (4QI pages of standard newspaper size. In addition, the recorder has fast fo~ward and fast reverse speeds which permit access to any one of the recorded pages within two or three minutes.
Other types of recorders might require as much as 30-60 minutes to access a given pageO

Interace unit 2~ provides interfacing be~ween the computer, the platemaker, the time code generator and the video tape recorder. The control and status signals for the platemaker go through this unit, as do the control and status signals for the recorder. In addition, the unit provides interfacing between the 16-bit format of the computer and the 32-bit format of the time code generator. For the transfer of data, control and status signals from the computer to the plate-maker, time code generator and recorder, the interface unitincludes eight 8-bit registers 30-37 and an output register select decoder 38. Eight bits of the computer 16-bit word are used for data, three are used for register selection and the remaining five bits are noted used. Data i8 presented simultaneously to all of the registers but is transferred only into the register selected by the signals applied to decoder 38. As illustrated in Figure 2, register 30 contains inter-rupt masks which are employed in a conventional manner in interrupting the operation of the computer as required, for example, when one of the peripheral devices is not ready to receive data or a command. Registers 31-35 contain the data for the different digits of the time code signal, e.g.
hundreds of days, tens of hours, etc. Register 36 contains the control signals for the platemaker and video tape recorder, and register 37 contains the control signals for the time code generator. It will be noted that not all of the bits of every register are used.

Referring now to Figure 3, interface unit 2~ also includes seven 8-bit registers ~Q-46 which are utili~ad in the transfer of data, interrupt signals and status signals to the computer. These registers are selec~ively enabled for output by an input register select decoder ~8 which receives register selection signals from the cornputer. Data is transferred from the registers to the computer on a data bus ~9 which can be the same data bus that is used for the output of data from the computer, i.e. data bus 39 of Figure 2. Register 40 is used for interrupt signals, and data for the time code signals is stored in registers 41-~5.
Register 46 contains the data signals from the platemaker, time code generator and video tape recorder.

Operation and use of the overall system and therein the method of the invention are as follows. Operating commands are input by an operator through the terminal to the com-puter for execution and presentation to the platemaker, time code generator and recorder. The system has to basic modes of operation: recording and playback or retrieval.
In the recording model data is transferred from the plate-maker to the video reoorder. This data can be either data from the reading beam scanning copy on the read platen or data which controls the modulation of the writing beam.
The data from the platemaker is recorded in the helically scanned video tracks of the videotape, and indexing signals from the time code generator are recorded in an audio track to provide means for rapidly accessing the recorded dataO
These signals define the day and time each page is recorded and provide a unique address for that pageO The manner in which the platemaker data is transferred to the recorder and recorded is discussed in detail hereinafter.

In the playback or data retrieval mode, the data for a desired page is transcribed and presented to the writing beam con-trol of the platemaker to produce a new plate containing the data. The page to be reproduced is specified by the operator, either through the computer terminal or through a set of switches associated with the time code generator. The t.ime code generator then searches for the desired time code on the tape, with the time code generator controlling the operation of the recorder and the tape moving at the fast speed in the appropriate direction. When the desired time code is found, the recorder is switched to the normal play-back speed, and the data for the page associated with thetime code is transferred to the platemaker.

In the platemaker, the data is read and written in successive scan lines at a constant bit rate, and in a presently pre-ferred embodiment the bit rate is 5.1 Mhz, with each scan 10 line containing 14 x 102~ bits. In the video recorder, the data i5 recorded in a helical scan format, with one helical scan for each revolution of the recording head and a dead area between successive scans while the head is recrossing the tape. In the presently preferred embodiment, the record-ing head rotates at a rate of 60 revolutions per second and data is recorded at a bit rate of 5.8 MHz. The relationship between the data ormats of the platemaker and recorder is illustrated in Figure ~. It will be noted that 6 scan lines of platemaker data (LSl-LS6) are recorded in each hPlical 20 scan 51 in a time of 14.6 msl with a dead time of 2 ms between successive scans. The recorder provides vertical sync pulses 53 at the centers of the dead t.imes.

The recorded data is encoded to permit identification of the beginning of the data for each scan line, and the manner in which the data is encoded for this purpose is illustrated in the timing diagram of Figure 5. During the 2 ms interval between successive scan lines, signals representing zeros are recorded on the tape. The actual recross time is less than

2 ms, e.g.Ø5 ms, and.~.the aero signals are recorded during 30 intervals 56, 57 before and after the actual dead area 5~.
Signals representing four successive l's are recorded during the first four bits of the new scan line, as indiated at 59.
Thus, the start of the new line is defined by the first transition in the data after the drop-out interval.

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Referring now to Figure 6, data from the platemaker is read into a ring l~uffer 61 at the 5.1 MHz reference clock rate of the platemaker. Data is read out of the ring buffer at the 5.8 MHz clock rate of the recorder. The buffer com-prises eight 4R shift registers, and the 2 ms intervals be-tween the recorder scan lines prevent the bufEer from running out of data even though the output rate exceeds the input rate. The output of the ring buffer is applied to a bi-phase modulator comprising an E~CLUSIVE OR gate 62 and a D-type flip-flop 63, with the output of the ring buffer being con-nected to an inverting input oE gate 62, and the output of this gate being connected to the D input of the flip flop.
The 5.8 MHz carrier or clock signal is applied to the T input of flip-flop 63, and the output of this flip-flop is con-nected to a second input of gate 62. The output of the flip-flop is also c~nnected ko the input of a video driver 64, and the output of the driver is connected to the hel:ical scan recording head 65.

The application of the 5.8 MHz clock pulses to ring buffer 61 is controlled by a gate 66 which, in turn, i9 controlled by a gate control circuit 67. This circuit comprises a flip-flop which is set to one of its output states at the beginning of each scan line and reset to the other state at the end of the line. The end of the line is determined by counting the 5.8 MHz clock pulses, and an 84 (1024)-bit counter 68 is provided for this purpose. The counter is reset at the start of each scan line, and at the end of the line it delivers an output signal to control flip-flop 67.

An 0's generator 71 and a l's generator 72 are connected to the data input of EXCLUSIS7E OR gate 62 to provide the 0's and l's at the beginning and end of each scan line. The output of counter 68 is connected to the STA~T input of the 0's generator, and the STOP input of this generator is con-nected to the output of a one-shot multivibrator 73. This multivibrator is triggered by the vertical sync pulses and produces an output pulse having a width of 1 ms. The output of the multivibrator is also connected to the reset input of counter 68, the START input of lls generator 72, and the reset input of a 4-bit counter 7~. The 5~8 MHz clock pulses are applied to the clock input of counter 74, and the output of this counter is connected to the STOP input of the l's generator. The output of counter 74 is also connected to a second input of gate control flip-flop 67. The vertical sync signal is applied to a control track recording head 76 of the video recorder and record~d in a control track on the tape.

Operation and use of the circuit of Figure 6 are as follows.
The data from the platemaker is continuously clocked into ring buffer 61 at the 5.1 M~lz clock rate of the platema~er.
The data is clocked out of the ring buffer at the 5.8 MHz clock rate of the video recorder. The end of a scan line is detected by counter 68, following which the passage of data from the buffer to modulator 62 is interrupted. The end-of-scan signal from counter 68 turns on 0's generator 71 which begins delivering 0's to the modulator at the 5.8 MH~ clock rate. The vertical sync pulse which occurs at the center of the dead time triggers one-shot multivibrator 73, producing a l ms pulse~ The trailing edge of this pulse stops the 0's generator, starts the l's generator and resets counters 68 and 74. Four clock pulses later, counter 74 overflows, stopping the l's generator and delivering a signal to gate control flip-flop 67, to initiate the clocking of data out of ~e ring buffer for the next scan line.

The bi-phase modulation encoding of the data for recordation on the tape can best be understood with reference to Figure 7. A carrier signal 81 having a frequency equal to the bit rate of the data 82 is phase modulated in accordance with the level of the data. For data bits of level 0 the carrier is shifted in phase by 180. For data bits of level 1, the phase of the carrier is not changed. Thus, in the example of Figure 7, ~its a and l are l's, and the modulated carrier 83 is in phase with the unmodulated carrier. Bit 2 is a 0, and the carrier is shifted in phase by 180. Bit 3 is a 1, and the current phase of the modulated carrier is maintained until the next data bit of level Q. If the data is all l's, it will be noted that the modulated carrier has the same frequency as the unmodu-lated carrier, whereas if the data is all 0 1 5, the modulated carrier has a fre~uency equal to 1/2 ~le frequency of the unmodulated carrier.

In the embodiment of Figure 6, the bi-phase modulation is performed by EXCLUSIVE OR gate 62 and flip~flop 63. The data from ring buffer 61, O's generator 71 and l's generator 72 is applied to an inverting input of the gate at the 5.8 MHz clock rate, and the output of flip-flop 63 i5 the desired bi-phase modulated signal which is recorded on the tape.

Referring now to Figure 8, data transcribed from the tape in the playback mode is applied to the input of a demodulator 86 and to a drop-out detector 87. The demodulator is illus-trated in Figure 9 and described hereinafter, and the drop-out detector is the conventional drop-out detector of the video recorder. The output of the demodulator is connected to a transition detector 88 and to the input of a ring buffer 89. The demodulated data is clocked out of the ring buffer and delivered to the platemaker at the 5.1 MHz clock rate.

Means is provided for controlling the input of 5.8 MHz clock pulses to the ring buffer so that data from the demodulator is clocked into the buffer only during the active portion of the scan line. This means includes a gate 91 connected to the clock input of the buffer and a gate con-trol flip-flop 92. This flip-flop receives one input from a flip--flop 93 connected to the outputs of drop-out detector 87 and transition detector 88. The gate control flip-flop receives a second input from an 84tlO24~ counter 94 which 7~

counts the 5.8 MHz clock pulses. The output of flip-flop 93 is connected to the reset input of this counter.

Operation and use of the circuit oE Figure 8 can now be described. Data from the video head of the recorder is applied to the demodulator and drop-out detector. The start of a scan line is determined by a pulse from the transition detector following a pulse from the drop-out detector. The output state of flip-flop 93 changes in response to the transition detector pulse, r~setting counter 94 and setting gate control flip-flop 92 to one of its output states. This enables gate 91 to begin passing the 5.8 MHz clock pulses to ring buffer 89, and the data from the demodulator is then clocked into the ring buffer until counter)9~ overflows.
~t that time, flip-flop 92 is set to its other output state, and the passage of clock pulses stops. The recovered 5.1 MHz clock pulses are applied to the buffer continuously, and the data is delivered to the platemaker at the 5.1 MF~z rate. Ring buffer 89 is similar to ring buffer 61, and the interval between successive scan lines from the recorder prevents the buffer from overfilling with the faster input rate.

One embodiment of demodulator 86 is illustrated in Figure 9. In this embodiment, the data from the head of the recorder is applied to the input of a delay network 96 and to one input of a balanced mixer 97. The delay network provides a delay equal to the duration of one bit, and the output of the delay network is connected to the second input of the mixer. The output of the mixer is connected to the input of a low pass filter 98l and the output of the filter is connected to the input of a comparator 99~ The output of the comparator is the demodulated data signal which is applied to ring buffer 89.

In operation, mi~er 9~ multiplies the delayed and undelayed data signals together to provide an output signal of one polarity when the delayed and undelayed signals are in phase. The mixer provides an output signal of the opposite polarity when the delayed and undelayed signals are out of phase. The low pass filter removes undesired high frequency components from the mixer output, and the comparator delivers output signals having logic levels corresponding to the polarities of the mixer output signals.

One of the advantages of ~he bi-phase modulation technique is that it permits eas~ recovery of the 5.8 MHz carrier or clock signal Erom the recorded data. Since this signal comes from the data itself, the system is free of errors arising from tape stretch, flutter, wow and the like. One embodi-ment of a circuit for recovering or synthesizing the 5.8 MH~ signal i~ illustrated in Figure 10. The modulated video data from the recording head is applied to the input of a dela~ circuit 101 and to one input of an EXCLUSIVE OR gate 102. The output of the delay circuit is connected to the second input of the EXCLUSIVE OR gate, and the output of this gate is connected to a yate 103. The output of gate 103 is connected to the input of a one-shot multivibrator 104 which produces pulses having a width equal to 1/2 of the data bit duxation. The output of the multivibrator is connected to the input of a phase locked loop 106 compri-sing a phase detector 107, an amplifier 10~, and a voltage controlled oscillator 109. The output of the phase locked loop is fed back to a second input of gate 103.

Operation and use of the circuit of Figure 10 can be described with reference to the waveforms of Figure 11.
Waveform 111 is the modulated data from the video head of the recorder. The output of EXCLUSIVE OR gate 102 is a train of pulses 112, with one pulse for each transition in the modulated data. The width of the pulses corresponds to the delay introduced by delay network 1~1. Gate 103 removes every other pulse from the pulse train, producing waveform 113 with one pulse for each data bit. The pulses 35 from gate 103 trigger multi~i~rator 104 which produces waveform 114. This waveform passes through phase locked . -- .

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loop 106 to provide the recovered 5~1 MHz carrier or clock signal. This recovered clock signal is applied to ring buffer 89 via control gate 91.

The demodulator illustrated in Figure 12 includes one-shot multivibrators 121, 122 to which the modulated data from the tape is applied. These multivibrators are triggered respec-tively by positive and negative transitions and have periods equal to three-fourths of the data bit duration. The out-puts of the multivibrators are connected to the inputs of la a NOR gate 123, and the output of this gate is connected to the input of a one-shot multivibrator 124 havlng a period equal to the bit duration. The output of this multivibrator is connected to the data input of ring buffer 89.

Operation and use of the demodulator of Figure 12 can be described with reference to the waveform diagram of Figure 13, wherein waveform 129 represents the modulated data from the tape, and waveforms 131-134 represent the outputs of elements 121-124, respectively. Multivibrator 121 delivers an output pulse having a width equal to three-fourths of the bit duration in response to each positive going transition in the data, and multivibrator 12~ delivers a similar pulse in response to each negative going transition. These pulses are NORed together in NOR
gate 123, and multivibrator 124 delivers an output pulse having a width equal to the bit duration in response to each positive going transition in the output of the gate.
The output of multivibrator 124 is the demodulated data.

Figures 14 and 15 illustrate alternate embodiments of the recording and playback portions of the system which are preferred in some applications over the corresponding embodi-ments of Figures 6 and 8. The different embodiments have certain elements in common, and like reference numerals are utilized to designate these common elements. Referring now to Figure 14, data from the platemaker is read into ring buffer 61 at the 5.1 MHz reference clock rate of the plate-maker. The data is read out of the ring buffer at the 5.8 MHz clock rate of the recorder. The data read out of the ring buffer is applied to a bi-phase modula-tor comprising EXCLUSIVE OR gate 62 and flip-flop 63. From the modulator, the data passes to video driver 64 and recording head 65.

The application of the 5.8 MHz clock pulses to ring buffer 61 is controlled by gate 66 and gate control ~lip-flop 67.
At the start of each scan line, flip-flop 67 is set to one of its output states, and at the end of the line it is set to the other state by a counter 68 which counts the 5.8 MHz clock pulses.

As in the embodiments of Figure 6, a 0's generator 71 is connected to the data input of EXCLUSIVE OR gate 62 to pro-vide the 0's at the beginning and end of each scan line. Inthis embodiment, however, the start of the scan line is marked by a ~4-bit word rather than the four lls of the earlier embodimentO In addition, the dead ban~ or crossover point is detected by a tach pulse, rather than relying upon the dropout detector for this purpose. The 64-bit word provides more reliable operation than the transition detector of the previous embodiment since the 64-bit word is not likely to be masked by dropout in the tape, and noise pulses are not likely to be mistaken for the coded word. Likewise, the tach pulse provides a more positive indication of the dead band or crossover point.

The tach pulse is provided by a tach generator 151 connected to the video recording head, and the pulse is delivered whenever the head is in a predetermined position in its rotation, e.g., the crossover point. This pulse is applied to the START COUNT input of a counter 152 which is clocked by the 5.8 MHz clock signal. The output of this counter is applied to a comparator 153 for comparison with an ADDRESS
signal which permits the placement of the 64-bit word to be .
, adjusted as required for a particular recorder. The output of the comparator is applied to the reset input of counter 152 and to the input of a 0~5 ms one-shot multi-vibrator 154. The output of this multivibrator is connected 5 to the STOP input of 0's generator 71 and to the START inpu~
of a 64-bit correlation word generator 156. The output of generator 156 is connected to the data input oE gate 62, and the generator also provides a control signal Eor flip-flop 67.

10 Operation and use of the embodiment oE Figure 14 is generally similar to that of Figure 6. Data from the platemaker is continuously clocked into ring buffer 61 at the 5.1 MHz clock rate of the platemaker J and the data is clocked out of the ring buffer at 5.S MHz clock rate of the video recorder.
15 The end of a scan line is detected by counter 68, following which the passage of data from the bufEer to the modulator is interrupted. The end-of scan signal from counter 68 turns on 0's generator 71 which begins delivering 0's to the modulator at the 5.8 M~Iz clock rate~ The tach pulse which 20 occurs during the dead time is, in effect, dela~ed by counter 152 and comparator 153 and applied to multivibrator 15D~, producing a 0.5 ms pulse. The trailing edye of this pulse stops the 0's generator, starts the correlation word genera-tor, and resets counter 68. The 64-bit coded word is then 25 applied to the modulator for recordation on the tape. Upon completion of this word, generator 156 delivers a signal to flip-flop 67 to initiate the clocking of data out of the ring buffer for the new scan line.

Referring now to Figure 15, data transcribed from the tape 30 in the playback mode is applied to the input of demodulator 86 and to a correlator 158. As in the embodiment of Figure 8, the output of the demodulator is connected to the input of ring buffer 89, and the demodulated data is clocked out of the ring buEfer and delivered to the platemaker at the S.l 35 MHz clock rate. The delivery of 5.8 Mllz clock pulses to the ' , ~17-ring buffer is controlled by gate 91, gate control flip-flop 92, and counter 94 ~o that data from the demodulator is clocked into the bu~fer only during the active portion of the scan line. These elements functior. in the same manner as the corresponding elements in Figure 8, with the control flip-flop and counter receiving inputs from the correlator rather than the dropout detector and the transition detector.

Correlator 158 includes means for comparing each of the 64 bits of the correla-tion word with the expected level of that bit. For each bit which corresponds to its expected level, an analog signal is provided. When the combined levels of the analog signals reach a predetermined level, an output signal is delivered. This signal is applied to one lnput of gate control flip-flop 92 and to the reset input of counter 94. ~ suitable correlator for use in this embodiment is of the TRW TDC1004J 64-bit digital correlator.

The operation of the correlator is controlled by tach genera-tor 151, counter 152, comparator 153, and a 1 ms on2-shot multivibrator 159. The tach generator, counter and comparator are connecked together in the same manner as in the recording mode, and the output of the comparator is connected to the input of multivibrator 159. The output of this multivibrator is connected to the control input of the correlator.

Operation and use of the circuit of Figure 15 is as follows.
Data from the video head of the recorder is applied to the demodulator and correlator. The start of a scan line is detected by the delayed pulse from tach generator 151 which triggers multivibrator 159 to provide a 1 ms window for the correlator. Upon detection of the correlation word, the correlator deli~ers an output signal which resets counter 94 and sets gate control flip-flop 92 to one of its output states. This enables gate 91 to begin passing the 5.8 MHz clock pulses to ring buffer 89, and the data from the demo-dulator is then clocked into the ring huffer until counter 9'1 overflows. At that time, flip flop ~2 is set to its other output state, and the passage of clock pulses stops.
The 5.1 MHz clock pulses are applied to the buffer con-tinuously, and the data is delivered to the platemaker at the 5.1 MHz rate. As noted previously, the interval between successive scan lines from the recorder prevenks the buffer from overilling with data at the faster input rate.

The invention has a number of imporkan~ features and advan-tagesO It provides back-up in the form of high density storage of data for plates made by a laser process. The recorded data for a given page can be accessed rapidly and automatically. The data is recorded in a form which is easily demodulated. Moreover, the reEerence clock signal for the platemaker can be recovered from the recorded data.

It is apparent that a new and improved s~stem and method for storing and retrieving platemaking data have been pro-vided. While only certain presently preferred embodiments have been described, as will be apparent to those familiar with the art, certain changes and modi~ications can be made without departing from the scope of the invention as defined by the following claims.

Claims

What Is Claimed Is:

1. A method for storing data for a plate made by scanning the same with a laser beam modulated in intensity in accordance with the data, comprising the steps of applying a signal representative of the data to a video recorder, and actuating the recorder to record the signal on a record medium associated therewith.

2. The method of Claim 1 further including the steps of transcribing the record medium to recover the signal and scanning a photosensitive surface with a laser beam modulated in accordance with the recovered signal to provide an image of the data represented by said signal.

3. The method of Claim 1 further including the step of recording an addressable indexing signal on the record medium in spatial association with the data signal.

4. The method of Claim 1 further including the steps of continuously clocking the data into a temporary storage device at a first predetermined rate, clocking the data out of the temporary storage device in runs of predetermined length at a second predetermined rate greater than the first rate, with pauses between successive ones of the runs of data, and applying the output data to the helical scanning head of the video tape recorder for recordation on a tape at the second rate, each of the runs of data being recorded in one scan of the head.

5. The method of Claim 4 further including the steps of transcribing the tape to recover the data, clocking the recovered data into the temporary storage device at the second rate in runs as it is received from the tape, clock-ing the recovered data out of the temporary storage device at the first rate, and presenting the recovered data to the platemaker at the first rate for modulation of the writing beam to form an image of the recovered data.

6. The method of Claim 1 further including the steps of providing a carrier having a frequency equal to the bit rate of the data, modulating the carrier by shifting the phase thereof by 180° during each data bit of one level and passing the carrier without phase shift during each data bit of the other level, and recording the modulated carrier on the record medium.

7. The method of Claim 6 further including the steps of delaying the modulated carrier by one cycle thereof, multi-plying the delayed modulated carrier by the undelayed modulated carrier to obtain a first signal when the delayed and undelayed carriers are in phase and a second signal when a delayed and undelayed carriers are out of phase, providing an output signal of the first logic level in response to the first signal, and providing an output signal of the other logic level in response to the second signal.

8. The method of Claim 6 further including the steps of generating a pulse in response to each transition in the modulated carrier, said transitions occurring at a rate of one per bit for each bit of the first level and a rate of two per bit for each bit of the other level, eliminating one of the two pulses for each bit of the other level, and pro-viding an output pulse having a width equal to one half of the bit duration in response to each of the remaining pulses, said output pulses corresponding in frequency and phase to the unmodulated carrier.

9. A system for carrying out the method of Claim 1 com-prising a video recorder, and means for presenting a signal representative of the data to the recorder to record the same on a record medium associated with the recorder.

10. The system of Claim 9 further including means for transcribing the record medium to recover the signal and means for modulating the writing beam of the platemaker in accordance with the recovered signal.

11. The system of Claim 9 further including means for recording an addressable indexing signal on the record medium in spatial association with the digital signal.

12. The system of Claim 9 wherein the video recorder is a helical scan video tape recorder and the data signal is applied to the video recording head of said recorder.

13. The system of Claim 9 further including a temporary storage device, means for continuously clocking the data into the storage device at a first predetermined rate, means for clocking the data out of the storage device in runs of predetermined length at a second predetermined rate greater than the first rate, with pauses between successive ones of the runs of data, and means for applying the output data to the helical scanning head of the video tape recorder for recordation on a tape at the second rate, each of the runs of data being recorded in one scan of the head.

14. The system of Claim 13 wherein the video tape recorder includes means for transcribing the tape to recover the data, together with means for clocking the recovered data into the temporary storage device at the second rate in runs as it is received from the tape, means for clocking the recovered data out of the temporary storage device at the first rate, and means for presenting the recovered data to the platemaker at the first rate for modulation of the writing beam to form an image of the recovered data.

15. The system of Claim 13 wherein the temporary storage device comprises a ring buffer.

16. The system of Claim 1 further including means for providing a carrier having a frequency equal to the bit rate of the data, and modulation means for shifting the phase of the carrier by 180° during each data bit of one level and passing the carrier without phase shift during each data bit of the other level, the modulated carrier being presented to the video recorder for recordation on the record medium associated therewith.

17. The system of Claim 16 further including means for delaying the modulated carrier by one cycle thereof r means for multiplying the delayed modulated carrier by the undelayed modulated carrier to obtain a first signal when the delayed and undelayed carriers are in phase and a second signal when the delayed and undelayed carriers are out of phase, means for providing an output signal of the first level in response to the first signal and an output signal of the other level in response to the second signal.

18. The system of Claim 16 further including means for generating a pulse in response to each transition of the modulated carrier, said transitions occurring at a rate of one per bit for each bit of the first level and a rate of two per bit for each bit of the other level, means for eliminating one of the two pulses for each bit of the other level, and means for providing an output pulse having a width equal to one half of the bit duration in response to each of the remaining pulses, said output pulses correspon-ding in frequency and phase to the unmodulated carrier.

19. The system of Claim 16 further including means for providing first and second pulses of predetermined width in response to transitions of opposite sense in the modu-lated carrier, means responsive to the first and second pulses for providing a signal corresponding to the Logical NOR function of said pulses, and means responsive to the NOR function signal for delivering an output pulse having a width equal to the data bit duration in response to a transition of predetermined sense in the NOR function signal.