CA1126886A - Tuning indicator apparatus for a frequency synthesizer tuner - Google Patents

Abstract

TUNING INDICATOR APPARATUS FOR A FREQUENCY SYNTHESIZER TUNER
ABSTRACT OF THE DISCLOSURE

Tuning indicator apparatus is provided for use with a frequency synthesizer tuner of the type having a phase-locked loop including a reference oscillator, a variable frequency oscillator to produce a local oscillating signal, a programmable frequency divider coupled to the variable frequency oscillator for dividing the frequency of the local oscillating signal by a variable dividing ratio to produce a frequency-divided oscillating signal, a phase comparator for comparing the frequency-divided oscillating signal to the output of the reference oscillator to produce an error signal, and a feedback circuit for feeding back the error signal from the phase com-parator to the variable frequency oscillator to adjust the frequency of the local oscillating signal and thereby establish a tuning condition of the tuner. The tuning indicator apparatus includes a counter for counting counter pulses supplied thereto, the count of this counter determining the dividing ratio of the programmable frequency divider. An indicating circuit is res-ponsive to a change in at least a predetermined value of the count of this counter to indicate that the count has changed and, thus, that the tuning condition of the tuner has changed.
In a preferred embodiment, a sound generator is provided to generate an audible indication of a change in the tuning condition.

-i-

Description

;88~

BACKGROUND OF THE INVENTION

This invention relates to tuning indicator apparatus for a frequency synthesiæer tuner and, more particularly, to such tuning indicator apparatus wherein a change in the tuning condition of the frequency synthesizer tuner is indicated.
In a typical tuner, such as a tuner for receiving broadcasted radio or television signals which are transmitted over respective broadcast frequencies, the runing condition of the tuner is determined by the fre~uency of the local oscillat-ing signal which is mixed with the received broadcast frequen-cies to produce an intermediate frequency (IF) signal. The carrier frequency of the IF signal is constrained within a narrow range which is a function of the mixing of the broadcast frequency and the local oscillating frequency. As the local oscillating frequency is changed, the tuner is tuned to different broadcast frequencies to receive the program infor-mation which is broadcasted thereover. Typically, a local oscillator may include a manually adjustable capacitor which, ; when the capacitance value thereof varies, the local oscillatin~
frequency correspondingly varies. By adjusting the tuning knob w~ich is mechanically coupled to the variable capacitor, an operator may change the local oscillating frequency as desired and, thus, may establish any desired tuning condition of the tuner. Recently, the variable capacitor has been constructed as a variable capacitance diode whose capacitance value is determined by a control voltage applied thereto. Since the same control voltage will result in the same tuning condition, tuners are known wherein digital techniques are relied upon for storing digital representations of respective control voltages, which digital representations can be retrieved, as desired, l~lZ68~6 so as to establish a capacitance value rapidly which would tune the tuner to a desired broadcast frequency.
More recently, a so-called frequency synthesizer tuner has been pro~osed, in which the local oscillating signal is gen-erated by a phase-locked loop under the control of a digital frequency-selecting signal. In such a phase-locked loop, a variable frequency oscillator produces the local oscillating signal. In addition to being supplied to the usual mixer in the tuner, the local oscillating signal is supplied through a programmable frequency divider to a phase comparator whereat it is compared to a re~erence oscillating signal. Any phase difference therebetween results in an error signal which is fed back to the variable frequency oscillator so as to adjust the frequency of the local oscillating signal and thereby adjust the tuning condition of the tuner. If the dividing ratio of the frequency aivider changes, the frequency-divided oscillating signal which is supplied to the phase comparator will change.
By well-known pha~e-locked loop operation, this changes the basic fre~uency of the local oscillating si~nal, resulting in cancelling the phase error signal. Thus, the tuning condition of the tuner is established merely by setting a desired frequency dividing ratio of the programmable frequency divider.
In the aforementioned frequency synthesizer tuner, the dividing ratio of the programmable frequency divider may be established by a counter, such as an UP/DOWN counter whose count sets the dividing ratio. As the count of this UP/DOWN
counter is incremented, the dividing ratio increases and, con-versely, as the count of the UP/DOWN counter is decremented, the dividing ratio correspondingly decreases. This features can be used, advantageously, to effect a so-called scanning _~_ 8~6 operation, whereby the tuning condition of the tuner is scanned either in the upward or downward direction from one broadcast frequency to the next. Such a scanning operation may be helpful to the operator to enable him to ascertain the program informa-tion which is available on the various broadcast frequencieswhich can be received by his tuner. This scanning operation may be of the automatic scanning type, referred to herein as the auto-scan mode, in which the count of the UP/DOWN counter is incremented or decremented periodically at a fixed rate, whereupon the frequency of the local oscillating signal is increased or decreased at this same rate. In addition to the auto-scan mode, it may be desirable to change the tuning condi-tion of the tuner on a step-wise basis. This results in a change in the tuning condition by an incremental amount (for example, by 0.1 MHz for an FM tuner and by 1 KHz for an AM
tuner) in response to each manual operation by the user.
It is desirable, in both the auto-scan mode and in the step-wise tuning mode, to indicate to the user that a change in the tuning condition has occurred. Further, such an indication should be provided when the tuning condition changes by at least a predetermined amount.

OBJECTS OF THE INVENTION
.
Therefore, it is an object of the present invention to provide improvided tuning indicator apparatus which is particularly useful in frequency synthesizer tuners.
Another object of this invention is to provide tuning indicator apparatus in which an indication of a change in the tuning condition is provided during an auto-scan operation.

. .

~L~Z~i8816 A further object of this invention is to provide tuning indicator apparatus in which an indication of a change in the tuning condition is provided during a step-wise tuning operation.
An additional object of this invention is to provide an audible tuning indicator in which a change in the tuning condition is indicated audibly.
Various other objects, advantages and features of the present invention will become readily apparent from the ensuing detailed description, and the novel features will be particularly pointed out in the appended claims.

SUMMARY OF THE INVENTION

In accordance with the present invention, tuning indicator apparatus is provided for use wi`th a frequency syn-thesizer tuner of the type having a phase-locked loop including a reference oscillator, a variable frequency oscillator to produce a local oscillating signal, a programmable frequency divid~r coupled to the variable frequency oscillator for divid-ing the frequency of the local oscillating signal by a variable dividing ratio to produce a frequency-divided oscillating sig-nal, a phase comparator for comparing the frequency-divided oscillating signal to the output of the reference oscillator to produce an error signal, and a feedback circuit for feeding back the error signal to the variable frequency oscillator to adjust the frequency of the local oscillating signal and thereby establish a tuning condition of the tuner.

~26886 The tuning indicator ~pparatus comprises a counter for c~unting counter pulses supplied thereto, the count of the counter deter-mining the dividing ratio of the programmable frequency divider.
An indicating circuit is responsive to a change in at least a predetermined value of the count to indicate such change and, thus, that the tuning condition of th~ tuner has changed.
In a preferred embodiment, a sound generator is provided to generate an audible indication each time that the tuning condi-tion changes.
1~ More particularly, there is provided:
Apparatus for indicating a changing tuning condition in a frequency synthesi~er tuner of the type having a phase-locked loop including a reference oscillator, a variable fre-quency oscillator to produce a l~cal oscillating signal, a pro-grammable frequency divider coupled to the variable frequency oscillator for dividing the frequency of said local oscillating signal by a variable dividing ratio to produce a frequency-divided oscillating signal, a phase comparator for comparing the frequency-divided oscillating signal to the output of the reference oscillator to produce an error signal, and means for feeding back the error signal from the phase comparator to the variable frequency oscillator to adjust the frequency of the : local oscillating signal and thereby adjust the tuning condition of the tuner, said apparatus comprising a source ofcounter pulses;
counter means for counting counter pulses supplied thereto, said counter means being coupled to said programmable frequency divider to determine the dividing ratio thereof; manually operable slide switch means slidable in a first range to enable only a predetermined number of counter pulses to be supplied to said counter means and slidable in a second range to enable counter pulses to be supplied continually to said counter means;
sensing means for s~ensing when the count of said counter means ,s,~
~.................................. 5 ~L~268l~
changes by a predetermined amount; and sound generating means for generating an audible sound indication in response to said sensed change in said count to indicate that said tuning condi-tion has changed~

There is also provided:
Apparatus for indicating a changing tuning condi-tion in a frequency synthesizer tuner of the type having a phase-locked loop including a reference oscillator, a variable fre-quency oscillator to produce a local oscillating signal, a progra~nable frequency divider coupled to the variable frequency oscillator for dividing the frequency of said local oscillating signal by a.variable dividing ratio to produce a frequency-divided oscillating signal, a phase comparator for comparing the frequency-divided oscillating signal to the output of the reference oscillator to produce an error signal, and means for ;~
feeding back the error signal from the phase comparator to the variable frequency oscillator to adjust the frequency of the local oscillating signal and thereby adjust the tuning condition of the tuner, said apparatus comprising counter means for counting counter pulses supplied thereto, the count of said counter means being a numerical representation of the frequency to which said tuner is tuned, said counter means being coupled to said programmable frequency divider to determine the dividing ratio thereof; and indicating means responsive to a change in at least a predetermined value of said count to indicate that said count has changed and, thus, that said tuning condition has changed, said indicating means comprising a piezo-electric element for generating an audible sound indication in response to said change in said tuning condition and a driving circuit connected to said piezo-electric element to actuate same in response to said change in said tuning condition, said driving circuit comprising sensing means for sensing when a predetermined digit of said numerical representation changes, pulse generating ; :.,.~
~ -5a~
. .

2~ 3S

means for generating a pulse in response to said sensed change in said predetermined digit, differentiating means for differ-entiating the leading and trailing edges of said generated pulse, and means fox supplying the differentiated edges to said piezo-electric element; wherein said sensing means comprises an AND circuit connected to receive a pulse signal from said counter means when said predetermined digit changes and to receive a timing pulse synchronized with said counter pulses, the latter being counted by said counter means, to initiate the leading edge of said generated pulse when said pulse signal and said timing pulse coincide, and to produce the trailing edge of said generated pulse so as to terminate same in response to the next-- following timing pulse.

BRIEF DESCRIPTION OF THE DRAWINGS

The following detailed description, given ~y way of example, will best be understood in conjunction with the accom-panying drawings in which:
FIG. 1 is a front view of a control panel which can be used in the fre~uency synthesi~er tuner in which the present invention finds ready application;
FIG. 2 is a partial bloc~, partial schematic diagram of apparatus including the present invention FIG. 3, appearing with FIG. 1, is a schematic diagram of the switching device which can be used with the apparatus which incor-porates the present invention;
FIGS. 4A-4E are waveform diagra~s which are useful in understanding the operation of the tuning control apparatus with which the prlesent invention can be used; and -5b-l:~Z61~86 FIG~. 5A-5F are waveform diagrams which are useful in understanding the operation of the tuning indicator of the present invention.

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT

-Referring now to the drawings, the present invention will be described in the environment of an AM/FM radio tuner - of the type which is adapted to be tuned to broadcast A~5 frequencies and also to broadcast FM frequencies. The present invention also can be used with the tuning section of a tele-vision receiver. It is appreciated that, when the tuner with which the present invention is used is tuned to a broadcast frequency, or channel t the program information which is trans-mitted by that frequency, or channel, will be received. As is conventional in AM broadcast transmissions, the broadcast frequencies are on the order of hundreds of kilohertz, with, for all practical purposes, the least significant digit of the broadcast frequency being equal to l KHz. Also, and as is conventional for FM broaacast transmissions, the broadcast frequencies are on the order of 80 to llO MHz, with the least significant digit, for all practical purposes, being equal to 0.1 MHz. The significance of this will become readily apparent from the detailed description below.
FIG. 1 illustrates a control panel for an ~/FM tuner with which the present invention can be used. The various ele-ments of this control panel include a power switch l, a signal levelmeter 2 which provides a visual indication of the strength of ~2~8~

the signal being received and, thus, a representation of the tuning condition of the tuner relative to the broadcast fre-quency, and a digital fre~uency indicator 3. The frequency indicator provides visual indications of whether the tuner is operated in its A~. or F~l receiving mode, and also the paxticular frequency to which the tuner is tuned, irrespective of whether that frequency coincides with a broadcast frequency. In the illustrated exa~ple, frequency ind:icator 3 represents that the tuner is operated in its F~S mode and, moreover, is tuned to a frequency of 82.5 MHz, with the least significant digit of this frequency being in terms of tenths of megahertz.
The control panel also is provided with the set of pushbutton switches 4, this set being illustrated as twelve such switches (1, 2, ... 12) which are adapted to be preset by the user to twelve respective broadcast frequencies. This allows the user to preset, or program, the tuner to desired broadcast frequencies and to tune the tuner rapidly to any one of such preset broadcast frequencies merely by operating a selected pushbutton switch. Examples of tuners, and particularly 2~ frequency synthesizer t~ners, having such preset pushbutton switches are known to the prior art and, in the interest of brevity, are not describe~ further herein. In addition to pushbutton switches 4, the illustrated control panel includes an ~l~ selector switch 5 and an FM selector switch 6. Depending upon which of these selectox switches 5, 6 is operated by the user, the tuner is tunable either in the ~ broadcast band or in the FM broadcast bànd.
Also shown on the control panel of the t~lner is a rotary tunin~ knob 7 which is movable in both the c]ockwise and counter-clockwise directions for the purpose of chanaing the tuning con-dition of the tuner either in the upward direction, that is, the 1~L;Z 36~6 broadcast frequencies to which the tuner is tuned are increased,or in the downward direction, that is, the broadcast fre~uencles to which the tuner is tuned are decreased. Tuning knob 7 is described in greater detail below as being selectively operable to change the least significant digit o~ the frequency to which the tuner is tuned on a step-wise basis with each operation of the knob, or to change the tuning condition of the tuner so as to scan the broadcast frequencies at a rate determined by the angular displacement of the tuning knob. A spring tnot shown) exerts a bias force on tuning knob 7 so as to bias it to its neutral, or center position. If the tuning knob is rotated by less than +10 or -10 from this center position, no change in the tuning condition of the tuner occurs. However, if the tuning knob is rotated by more than +lOD but less than ~20, or by more than -10 but less than -20D from the center position, ~the frequency to which the tuner is tuned will be increased or decreased, respectively, by the least significant digit. This means that, for the operation of the tuner in its AM mode, the tuning condition is increased or decreased by 1 KHz. Similarly, when the tuner is operated in its F~1 mode, its tunin~ condition is increased or decreased-by~0.1 MHz. To obtain a further change in the tuning condition of the tuner, it is necessary for the user to return the tuning knob to its center position and then, once again, rotate it between 10and 20 in the clockwise or 2~ counterclockwise direction. If tuning knob 7 is rotated by more than ~20, and up to a maximum of ~60, or by more than -20 and up to a maximum of -60, the tuning condition of the tuner auto-matically is changed in the upward or downward direction, and at a rate which is determined by the angular rotation of the tuning knob. This is the so-called auto-scan mode whereby the tuner 8~

scans the AM or FM broadcast spectrum by varying the tuning condition of the tuner in successive steps of 1 KHz or 0.1 MHz.
This auto-scan operation is terminated by returning tuning knob 7 to its center position. The tuner then will re~ain i~s last-atta~ned tuning condition which was assumed during the auto-scan operation.
FIG. 1 also illustrates the. presence of an automatic sweep switch 8, a stereo selector switch 9 and a muting selector switch 10. The stereo and muting selector switches perform con~
ventional operation~ wherein stereophonic program information can be received and suitably demodulated, decoded and reproduced;
and a sound-muting operation can be carried out. Since these operations are conventi`onal, further discussion thereo~ is not provided. When automatic sweep switch 8 is actuated, tuning knob 7 may be rotated to effect an auto-scan operation whereby the frequency to which the tuner is tuned either is increased or decreased ln incremental successive steps until a broadcast frequency is received. This reception of a broadcast frequency may be ascertained from the IF section, as is conventional~
When the broadcast frequency is received, the auto-scan operation is interrupted, and the tun~ng condition of the tuner remains set to this broadcast frequenc~. Thus, the operation of auto-matic sweep switch 8 cooperates w~th the operation o~ tuning kno~ 7 to effect a rapid scan of ~e tuner from one broadcast frequency to another.
Although forming no part of the present invention per se, it is mentioned herein that tuning knob 7 may be operated in a manner whereby a particular tuning condition of the tuner may be stored, or "memorized". In this regard, the tuner may be provided with an addressable memory device having a _ g _ 'I

i8~6 number of addressa~le storage locations in which digital representations corresponding to respective tun~ng conditions, i.e., numerical representations of the broadcast frequencies to which the tuner may be tuned, can be stored. ~hen the tuner ;s tuned to a desired broadcast frequency, the digital repre-sentation of that frequency may be stored in a particular storage location of the memory device by depressing tuning knob 7, which, for example, actuates the memory write-in circuit, and also by depressing one of pushbutton switches 4, which addresses a corresponding storage location ~nto which the digital representat;on is written~ To retrieve this stored -digital representation, and thus tune the tuner to the corre-sponding broadcast frequenc~, th~ associated push~utton switch merely is actuated to read out the stored digital representation.
This digital'representation is used to esta~lish a frequency of the local oscillating signal in the'tuner such that the desired tuning condition ~s o~tained.
Referring now to FrG~ 2f ~here''is ~l~ustrated a parti-al block, part;al schematic diagram of one embodiment of the present invention. FIG. 2 illustrates a frequenc~ synthesizer tuner 20 connected to tun~ng control apparatus 3n and also to a circuit 31 for indicating when the tuning condition o tuner 2Q
changes. Frequency synthesizer tuner 20 is compri~sed ~f a~ RF
amplifier stage 12~ a frequency converter 13, a demodulator 18 and a phase-locked loop 19. RF amplifier 12 is coupled to an antenna 11, or other input supply circuit for supplying broadcast frequencies to the RF amplifier. The output of RF amplifier 1~
is supplied to frequenc~ converter 13 which is adapted to select a particular one oiE the received' broadcast frequencies, and con-vert the information-modulated ~roadcast frequency to ~ modulated IF frequency for demodulation by demodulator 17, In ~his regard, ~31 Z6~38~

freauency converter 13 is conventional and is comprised of a mixer 14 supplied ~ith the RF signal and a local oscillating signal, the frequency of the latter heing determinative of the particular RF signal which is ~re~uency-converted, and thus determinative of the tuning conditlon of frequency synthesizer tuner 20. IF amplifer 16 amplifies the IF signal and supplies samè to demodulator 17 whereat the program information which had been modulated onto the original broadcast frequency is recovered and supplied to output terminal 18.
The local oscillating signal supplied ~o mixer 14 is generatec by phase-locked loop 19 and, more particularly, by variable freauency oscillator 15 included in this phase-locked loop. The phase-locked loop additionally includes a programmable frequency divider 21, a reference oscillator 23 and a phase com-parator 24. Variable fre¢uency oscillator 15, which may comprise a vol~age-controlled oscillator (VCO) generates the local oscillat-ing signal which is supplied to mixer 14 and, additionally, is supplied through programmable frequency divider 21 to phase com-parator 24. The programmable frequency divider is adapted to divide the frequency of the local oscillating signal by a variable dividing ratio. As an example, the programmable divider may comprise a presettable counter whose count is preset to a desired ratio. The frequency-divided oscillating signal produced by programmable frequency divider 21 is determined by the frequency of the local oscillating signal and the preset dividing ratio of the programmable freauency divider. Typical progra~mable freauency dividers are known to the prior art and, therefore, need not be further described herein.

Phase comparator 24 also is supplied with a reference oscillating signal generated by reference ocillator 23. Prefer-ably, the reference oscillator is a precise cr~s~al oscillator for generating a reference signal of predetermined, precise frequency and phase. Any phase differential between the freouency -divided oscilla~ing signal supplied to phase comparator 24 from variable frequency oscillator 15 and programmable frequency diviaer 21 and the reference oscillating signal results in an error signal. This error signal is fed O back as a DC control voltage ~ia low pass filter 25 to vary the freguency of the local oscillating signal generated by variable oscillator lS. As is conventional in a phase-locked lo~p, the fre~uency of the local oscillating signal is adjusted such that the frequency-divided oscillating signal and the reference oscillating signal are in frequency and phase-coincidence.
When this occurs, the local oscillating signal remains substan-tially fixed and thus determines the tuning condition of freauency synthesizer tuner 20.
The dividing ratio to which programmable divider 21 O is preset is determined by a counter 22 connected to the program-mable divider. As one example thereof, counter 22 may comprise an UP/DO~ counter whose count is supplied to programmable divider 21 so as to establish the partic~lar dividing ratio of the latter.
As the count of ~P/D~'.~ counter 22 chan~es, the dividing ratio of programmable divider 21 correspondingly changes. This, in turn, changes the frequency of the frequency-divided oscillating signal supplied to phase comparator 24. As a result thereof, the phase comparator feeds back an error signal to variable frecuency oscillator 15 so as to correspondingly change the freouency of the local oscillating signal that is supplied to mixer 14. Thust it . ~ :

is seen that, by controlling the count of UP/DOWN counter 22, the dividing ratio of programmable frequency divider 21 is controlled which, in turn, determines the tuning condition of the frequency synthesizer tuner.
In one embodiment of this invention, the count of UP/DO~N counter 22 which is used to preset the dividing ratio of programmable frequency divider 21 is a digital representation of a numerical frequency value in ~CD form. Each digit of this BCD representation is represented as a 4~bit parallel signal, and each 4-bit signal is supplied, in sequence,, from the UP/DOWN counter to the programmable frequency divider. For example, if frequency synthesizer tuner 20 is operated in its FM mode, the count of ~P/DOWN coùnter 22 will represent, in BCD
form, the hundreds, tens, units and tenths of megahertz of the FM broadcast frequency to which the tuner is to be tuned. If, as shown in FIG. 1, the broadcast frequency of 82.5 MHz is to be received, UP/DOWN counter 22 supplies programmable frequency divider 21 with the BCD representation of 0.5 MHz, the least significant digit of the desired broadcast frequency, followed by the BCD representation of 2 MHz, followed by the BCD repre-sentation of 80 MHz. The-actual BCD representations ~hich are supplied to the programmable frequency divider are, in order, 5, 2 and 8. Based upon this BCD representation of 82.5 MHz, programmable frequency divider 21 is preset to a dividing ratio, ~hereupon the frequency of the oscillating signal generated by variable frequency oscillator 15 is divided to result in an error signal fed back to the variable frequency oscillator bv phase comparator 24, thereby establishing the tuning condition of frequency synthesizer tuner 20 to this broadcast frequency of 82.5 MHz.

: ~ `

~26886 ~ uning c~ntrol apparatus 30 is connected tc UP/DOI~
counter 22 for the purpose of changi;~g the c~unt of this counter in an upward or downward direction s~ as to correcpondingly change the tuning conditi~n of the freouency synthesizer tuner. The tuning control apparatus is com~risea of a pulse oscillator 36, a aate circuit 35, an astable multivibrator 32, a monostable multivibrator 34, a gate circuit 3~, a flip-flop circuit 39 and manually operable switches SWl, SW2 and SW3. Pulse oscillator 36 may be supplied with cloc~ pulses to generate first and second o trains of control pulses at respective output terminals 36~ and 36D thereof. Alternatively, the pulse~oscillator may comprise a stable oscillating circuit, such as a crystal oscillator, for suppling these trains of pulses at its output terminals. The control pulses provided at output terminal 36D are in phase ~uadrature with respect to the control pulses provided at output terminal 36V. That is, the phase difference between the respective control pulses provided at these output pulses is 90~. Switch Shl ~` is provided with a movable contact Ml which is selectively enga~e-able with either fixed contact Vl or fixed contact Dl. These ~20 fixed contacts Ul and Dl are connected to output terminals 36U
and 36D, respectively, of pulse operatOr 36. ~vable contact Ml is further connected to an input of gate circuit 35. Preferably, this gate circuit is an AND gate.
Monostabl~e multivibrator 32, shown herein in one embodiment thereof, is provided with an adjustable element 33, such as an adjustable resistor. The freouency, and thus the period, of the oscillating pulse signal aenerated by astable multivibrator 32, is adjustable by suitable adjustment of variable resistor 33. The output of astable multivibrator 32 is connected to monostable multivibrator 34, one embodiment of which is ,.

~Z~ 36 particularly illustrated. The monostable multivibrator is adapted to generate pulses of predetermined duration in response to the leadlng ed~e of each pulse signal supplied thereto by the astable multivibrator. It is appreciated that, as the frequency, ana thus the period, of the pulse signals produced by astable multivibrator 32 is varied, the fre~uency, and thus the period, of the constant duration pulses produced by monostable multivibrator 34 ~-aries in a corresponding manner. These constant duration pulses produced by the monostable multivibrator are supplied to the other input of AND gate 35O
The output of this AND gate is connected to the pulse input of UP/DO~N counter 22 via a NOR circuit 37. The count of the UP/
DO~YN counter is incremented or decremented in response to each control pulse which is passed thereto by NAND gate 35 and NOR
circuit 37. The direction in which UP/DOWN counter 22 counts these control pulses is determined by the phase of the control pulses ~hich are supplied. Thus, if switch SWl is operated such that movable contact Ml engages fixed contact Ul, the control pulses which are produced at output terminal 36U of pulse~
oscillator 36 are supplied to UP/DOWN counter 22 to increment the count. Conversely, if switch SWl is operated such that its movable contact Ml is in engagement with fixed contact Dl, the quadrature-related pulse signals produced at output terminal 36D
of pulse oscillator 36 are supplied to UP/DOWN counter 32 to decrement the count thereof. As an example, clock signals tnot shown) synchronized with the pulse signals produced at output terminal 36U, referred to herein as the count-up control signals, may be used to clock, or gate, such count-up control pulses to a count-up input of the counter. Quadrature-related clock pulses, synchronized with the pulse signals produced at output terminal 36D, . .
.~

6B~

referred to as the count-down control pulse signals, may be used to clock or gate, the count-down control pulses to a count-down input of the UP/DOWN counter. Thus, the counting direction of UP/DOwN counter 22 is dete~,lined as a function of whether count-up or count-down control pulses are supplied thereto.
Switch SW2 is similar to switch SWl and includes a movable contact M2 selectively engageable either with fixed contact U2 or fixed contact D2. These fixed contacts U2 and D2 are connected to output terminals 36U and 36D, respectively, of pulse oscillator 36 to receive the count-up and count-down signals, respectively. Movable contact M2 is connected to one input of gate circuit 38, shown herein as a NAND gate.
Flip-flop circuit 39 is shown as being comprised of cross-coupled NAND gates havinq inputs terminals S and R
for receiving set and resPt signals of relatively lower potential, such as ground potential, to set or reset the flip-flop circuit.
Flip-flop circuit 39 additionally includes an output Q connected to another input of NAND gate 38. The set input S is connected to switch SW3 having a movable contact M3 selectively engageable with a fixed contact P to supply ground potential thereto. Thus, when switch SW3 is closed, that is, when movable contact M3 engages fixed contact P, ground potential is supplied to set input S, there-by setting flip-flop circuit 39 to its first state to supply a conditioning signal of a relatively higher potential to NAND
gate 38. -The reset input R is connected to movable contact M2 of switch SW2 via a delay circuit 40. The delay circuit is sho~n as comprising a resistor Rl connected in series with a capacitor Cl in the form of an integrating circuit. An inverting transistor Ql is connected between the reset input R of flip-flop circuit 39 and the junction defined by resistor Rl and capacitor Cl.

It will be seen that when switch ~W2 is operated to engage movable contact M2 with either of its fixed contacts U2 and D2, a count-up ~r count-down control pulse signal is supplied by switch S1~2 to charge capacitor Cl. After a predetermined delay, capacitor Cl is sufficiently chargled to render transistor Ql con ductive. This, in turn, supplies a relatively low potential to the reset input R of flip-flop circuit 39 to reset this flip-flop circuit to its second state, resulting in an inhibit signal of relatively low potential supplied to NAND gate 38. The output of ~AND gate 38 is connected to NOR circuit 37 so as to supply the count-up and count-down pulses to the count-up or count-down input of up-down counter 22.
Before describing the operation of the tuning control apparatus which has been thus far described, reference is made to FIG. 3 which is a schematic representation of tuning control knob 7 (FIG. 1) compri~ed of switches SWl, SW2 and SW3. Fixed contact P of switch SW3 is a conductive element that is substan-tially arcuate shaped and subtends an angle of 16. Movable contact M3 is supplied with ground ~otential and, when tuning knob 7 is at its center or central position, this movable contact engages fixed cont.act P. Movable contact 1~3 remains -- in ensagement with fixed contact P whien knob 7 is rotated from its center position within the range +8. Beyond this range, movable contact M3 is disengaged from fixed contact P, thus removing ground potential from the fixed contact.
Fixed contacts U2 and D2 each are arcuate shaped, and each subtends an angle of 10. The leading edge of each of these fixed contacts is spaced from the trailing edge of fixed contact P
by 2. Movable contact M2 is ganged for simultaneous operation with the movement of movable contact M3. If these movable contacts 1~2~1386 are in alignment with each other, it is appreciated that if tuning knob 7 is rotated in, for example, the clockwise direction by more than 8, movable contact M3 disengages fixed contact P, and movable contact M2 does not engage fixed contact U2 until this clockwise rotation o~ the tuning knob is equal to 10. The same holds true for a counterclockwise rota-tion of tuning knob 7.
Fixed contacts Ul and Dl of switch SWl are arcuate shaped, and the leading edge of each is spaced from the center position of tuning knob 7 by 20~. Furthermore, each of these fixed contacts subtends an angle of 40. Movable contact Ml is ganged for simultaneous o?eration with movable contact M2 and M3. Thus, it is appreciated that movable contact Ml does not engage its fixed contact Ul until tuning knob 7 is rotated in the clockwise direction by at least 20. Similarly, movable contact Ml does not engage its fixed contact Dl until knob 7 is rotated in the counterclockwise direction by at least 20~
In the illustrated emboaiment, fixed contacts Ul and V2 are of integral construction and are connected to output terminal 36U of pulse oscillator 36. Similarlarly, fixed con-tacts Dl and D2 are integ~ally constructed and are electrically connected to output terminal 36D of the pulse oscillator. All of the fixed contacts may be positioned in the same plane, such as the plane of the paper of the drawings, and may be disposed ~5 at different radial locations from the axis of rotation of tuning knob 7. Consistent with this embodiment, the movable contacts Ml-M3 may be of Idifferent lenoths such that each movable contact encages only the fixed contact(s) associated therewith. Alterna-: tively, the fixed contacts may be located in different planes, such as in a stacked configuration, and the respective movable contacts ~Z~;~386 may be disposed in the particular plane with which its fixed contact(s) is located.
To summarize the operation ~f switches SW1-SW3 of tuning knob 7, as shown in FIG. 3, it is seen that when the tuning knob is in its center, or neutral position, only movable contact M3 engages fixed contact P. When the tuning knob is rotated in the clockwise or counterclockwise direction by more than 8, movable contact M3 disengages ~ixed contact P.
When this rotation of the tuning knob is equal to 10, movable contact M2 now engages its fixed contact U2 or D2, depending upon the rotation of the tuning knob. As the rotation of the tuning knob continues, movable contact Ml engages its fixed contact Ul or Dl once this rotation exceeds 20. Although movable contact M2 engages its fixed contact U2 or D2 at the same time that movable contact Ml engages its fixed contact 'Jl or Dl, this has no effect upon the operation of the tuning control apparatus, as will now be described.
Returning to FIG. 2, let it be ass-~med that tuning knob 7 is in its center position. Conse~uently, switch SW3 is operated such that movable contact M3 engages fixed contact P
to supply ground potential thereto. This ground potential is coupled to the set input S of flip-f1op circuit 39 to set the flip-flop circuit to its first state. Hence, an enabling or conditioning signal is applied to NAND gate 38. However, s-~itch SW2 remains in its inoperative position, that is, movable contact M2 is disengaged from either of its fixed contacts U2 and D2.
This means that the count-up and count-down pulses, .hich normally are supplied to fixed contacts U2 and D2 by pulse oscillator 36, are not applied to NAND gate 38.

~Z68~6 Let it now be assumed that tuning knob 7 is rotated in the clockwise direction by more than 10, but less than 20~.
Consequently, which SW2 assumes its operative position to engage movable contact M2 with fixed contact U2. Switch SW2 now applies a count-up pulse to conditi.oned NAND gate 38, and this NAND gate passes the count-up pulse through NOR circuit 37 to the count-up input of UP/DOIl~ counter 32. The count of this UP/DO~
counter is incremented; and the dividing ratio of programmable frequency divider 21 is correspondingly changed. As described hereinabove, this change in the dividing ratio results in a change in the tuning condition of fre~uency synthesizer tuner 20.
When movable contact M2 engages its fixed contact U~, the control pulse signal which is provided at the movable contact also is supplied to delav circuit ~0. After a suitable time delay, determined by the resistance and capacitance of resistor R
and capacitor Cl, transistor Ql is rendered conductive to supply a reset signal to reset input R of flip-flop circuit 39. The flip-flop circuit is reset to its second state to supply an inhibit signal to NAND gate 38. Thus, only a predeterm;ned number of control pulses are passed by the N.~D gate to UP/DO~N
counter 22, the number of such control pulses being determined by the time constant of delay circuit 40. As one example thereof, this time constant may be selected such that only a single con-trol pulse is supplied to the UP/DOWN counter when switch SW2 is moved to its operative position. It is, of course, recognized, - that when switch SW2 is in its operative position, switch SW3 is in its inoperative position to remove ground potential from the set input S of flip-flop circuit 39.

i886 If the user wishes to change further the tuning condition of frequency synthesizer tuner 20, tuning knob 7 is returned to its center position. This moves switch SW2 to its inoperative position and switch S~3 to its operative posi-S tion, resulting in setting flip-flop circuit 39 to its first state, and condition NAND gate 38 to pass another control pulse which subsequently may be supplied thereto by switch SW2.
~hen tuning knob 7 is angularly rotated once again by more than 10 but less than 20, a control pulse is supplied to NAND gate 38 by switch SW2; and, since the NAND gate now is conditioned, or enabled, this control pulse is passed to UP/DOI~N
counter 22 to increment (or decrement) the count thereof. Accord-ingly, the tuning condition of frequency synthesizer tuner 20 is changed once again~ After a predetermined number (for example one) of control pulses are passed by NAND 38 to the UP/D~ counter, flip-flop circuit 39 is reset to its second state to inhibit ~AND
gate 38 from passing further control pulses.
Thus, it is seen that the tuning condition of the frequency synthesizer tuner may be changed in a step-wise manner by this "rocking" of control knob 7. In the present example, it is assumed that the tuning condition is changed by 0.1 M~z when the tuner is operated in its FM mode, alld by 1 ~Hz when the tuner is operated in its ~ mode, in response to each successive rocking operation.
Let it now be assumed that tuning knob 7 is rotated by more than 20 from its center position. Switch Sl~l thus is moved to its operative position whereby movable contact `'1 engages fixed contact Ul or fixed contact Dl, depending upon the direction of rotation of the tuning knob. If resistor 33, included in astable multivibrator 32, i`s a fixed resistor, the astable ;~

~2ti~

multiyibrator generates the pulse signal Sl shown in FIG. 4A.
The leading edge of this pulse signal Sl triggers monostable multivibrator 34 to generate gating pulses S2 of predetermined duration, as shown in FIG. 4B. Each of these gating pulses is supplied to NAN~ gate 35 to enable the NAND gate for the dura-ti~n of the gating puise. If movable contact Ml engages its fixed contact Ul7 control pulse signals S3 are supplied via switch SWl to the other input of NAND gate 35, as shown in FIG. 4C.
Those control pulse signals S3 which are present during the dura-tion of gating pulses S2 are passed by NAND gate 35 as control pulses S4 (FIG. 4D), and are spplied via NOR circuit 37 to UP/DO~ counter 32. In the illustrated example, it is assumed that each gating pulse S2 has a duration which encompasses two control pulse signals, and thus the count of UP/DO~ counter 22 is incremented (or decremented) by these two control pulses.
Alternatively, the duration of gating pulses S2 may encompass any predetermined number of control pulses S3, for example, one, two, three, etc. control pulses, in order to change the count of UP/DOWN counter 22 by a corresponding amount.
Resistor 33 is, of course, a variable resistor.
Furthermore, the adjustment o~ this resistor is sanged for simultaneous operation with the rotation of tuning knob 7.
Hence, when the tuning knob is rotated such that switch Sl~l is moved to its operative position, any further rotation of the tuning knob beyond 20 in the clockwise or counterclockwise direction effects a change in the resistance of variable resistor 33. This, in turn, changes the frequency, and thus the period, of pulses Sl, as shown in FIG. 4E. It is appreciated that, as the period of pulses Sl changes, the period (but not the duration) of gating pulses S2 likewise changes. ~ence, the rate 112~8~6 at which control pulse signals S3 are gated, or passed, by NAND gate 35 as control pul~es S4 increases. Thus, it is seen that, as the period of the gating pulses increases, the rate at which the count of UP/DOT~n counter 22 changes also increases.
Accordinoly, if tunin~ knob 7 is rotated in the clockwise or countercl~ckwise direction by more than 20~ from its cneter position, the rate at which the tuning conaition of freouency synthesizer tuner 20 changes is increased. This is because the count of UP/DO~ counter 22 changes at an increasing rate to ~10 correspondingly change the dividing ratio of programmable diviaer 21, and thus establish the tuning condition of the tuner. That is, the rotation of control knob 7 adjusts the speed at which the count of the UP/DOWN counter, and thus the di~iding ratio of the programmable frequency divider, changes.
The user of the illustrated aDparatus may, therefore, vary the auto-scanning rate as desired.
Circuit 31 is adapted to provide an indication that the tuning condition of frequency synthesizer tuner 20 is chana-ing. It now should be appreciated that the tuning condition is changed if the count of UP/D~WN counter 22 is changed. The ~P/DOWN counter generates an output pulse S6 whenever its count is changed to change the least significant digit of the frequency to which the tuner is tuned. That is, when the tuner is operated in its FM mode, a pulse signal S6 is produced when the freouency to which the tuner is tuned is changed by 0.1 MHz. Similarly, when the tuner is operated in its AM ~node, pulse signal S6 is produced whenever the frequency to which the tuner is tuned is changed by 1 XHz. The presence of this pulse S6 is used by circuit 31 to provicle an inaication of a change in the tuning condition.

~ -23-88~

Circuit 31 includes an AND circuit 45, differentiating circuits 46 and 47 and a piezoelectric element 42. AND circuit 45 is adapted to sense when a pulse signal S6 is produced by ~P/DO~ counter 22 and to produce a sense pulse in response thereto. The leading and trailing edges of this sense pulse are differentiated by differentiating circuits 46 and 47 and used to trigger piezoelectric element 42. ~en tri~gered, the piezoelectric element generates an audible sound, thus indicating that the tuning condition of tuner 20 is changed.
It may be appreciated that other acoustic generators may be used in place of the piezoelectric element, such as a loudspeaker or other el~ectro-acoustic transducers.
AND gate 45 includes transistors Q2 and Q3 whose collector-emitter circuits are connected in series. A capacitor C2 is connected in series with these collector-emitter circuits, this series circuit beina connected between a source of operating potential +B and ground. The base electrode of transistor Q2 is connected to an input terminal 43 to receive a timing pulse 45 that is synchronized with the control pulse signals oenerated by pulse oscillator 36. Since the count of ~P/DOWN counter 22 changes in synchronism with these control pulses, it is appre-ciated that the pulse signal S6 and the timing pulse supplied to input terminal 43 are time-coincident.
The base electxode of transistor Q3 is connected to an input terminal 44 which receives the pulse S6 from VP/DOWN
counter 22. This input terminal also is connected to the base electrode of a transistor Q5 connected in common-emitter configuration. The collector of this electrode is connected to the base electrode of another transistor Q4 which also is connected in common-emitter configuration. The junction defined by the ~Z~881~;

collector and base electrodes of transistors Q5 and Q4 is connected to the junction defined by the emitter and collector electrodes of transistors Q2 and Q3. The collector electrode of transistor Q4 is coupled to capacitor C2.
Capacitor C2 addi`tionally is connected to the base electrode of transistor Q6 which functions as a phase inverter.
The collector electrode of this transistor is further connected to differentiating circuit ~6, formed of capacitor C3 and resistor R3, and also to the base electrode of a transistor Q7 which functions as a further phase inverter~ The collector electrode of transistor Q7 is coupled to dif~erentiating circuit 47 formed of a capacitor C4 and a resistor R4. Rectifiers Dl and D2, each poled to pass negatIVe-gOing pulses, couple differ-entiating circuits 46 and 47 to piezoelectric element 42.
: 15 In operation, let it be assumed that the count of ; UP/DOWN counter is changed, and the ~P/DOWN counter produces pulse signal S6, shown in FIG. 5B. This pulse signal is supplied to the base electrode of transistor Q3. Timing pulses S5, shown in FIG. 5A, are periodic timing pulses and are supplied to the base electrode of transistor Q2 As mentioned above, pulse signal S6 is in time-coincidence with timing pulse S5, as : indicated in FIGS. 5A and 5B. Transistor Q2 is rendered conduc-tive by timing pulse S5, and transistor Q3 is rendered conductive by pulse signal S6. ~'hen these transistors both are conductive, capacitor C2 is rapidly charged by current flowing from source ~B
through the collector-emitter circuits of these series-connected transistors. The voltage across capacitor C2 is shown as a pulse signal S7 in FIG. 5C.

.

~Z6BB~

In addition to rendering transistor Q3 conductive, pulse signal S6 renders transistor Q5 conductive. This, in turn, applies a relatively low potential to the base electrode of transistor Q4 to maintain this transistor non-conductive.
As will be described below, transistor Q4 functions to discharge capacitor C2. However, since this capacitor now is non-conductive, capacitor C2 is not discharged.
The signal S7 across capacitor C2 is inverted by transistor Q6 to the negative-going pulse signal S8, shown in FIG. 5D. Differentiating circuit 46 differentiates the leading eage of this negative-going pulse signal S8 to supply a negative pulse to piezoelectric element 42. Inverted pulse S8 is further phase-inverted by transistor Q7,`resulting in the positive-going pulse Sg, shown in FIG. 5E. The negative-going trailing edge of this pulse is differentiated by differentiating circuit 97 and passed via rectifier D2 to piezoelectric element 42. Thus, the piezoelectric element is supplied with negative pulses S10, shown in ~IG. 5F, in response to the pulse S7 which is produced across capacitor C2 when the count of UP/DOI~N counter 22 is changed.
At the next timing pulse S5, it is assumed that the count of the UP/DOh~ counter has not changed again. Thus, timing pulse S5 now is not accompanied by a pulse signal S6.
In the absence of pulse signal S6, only transistor Q2 is rendered conductive. That is, transistor Q3, as well as transistor Q5, remains non-conductive. h~en transistor Q2 is conductive, a relatively higher potential is supplied from source ~B via the collector-emitter circuit of this transistor to the base elec-trode of transistor Q4. This renders transistor Q4 conductive to discharge capacitor C2 and thus terminate pulse S7, as shown -26- ~

~lZ~i8~16 ~n FIG. 5C. It is, of course, recognized that the termination of pulse S7 results in the trailing edge which is differentated by differentiating circuit 47 and supplied by rectifier D2 to piezo-electric element 42.
Negative pulses S10 trigger the piezoelectric element to generate the audible sound, thereby indicating that the count of UP/DOW~ counter 22 has been incremented or decremented. This chanse in the count of the counter proauces a corresponding - change in the dividing ratio of programmable divider 21 which, 0 in turn, changes the tuning condition of freouency synthesizer tuner 20.
In the event that the count of UP/DOWN counter 22 is changed by a parallel BCD representation of the frequency to which tuner 20 is to be tuned, AND circuit 45, tooether with ~L5 capacitor C2, would not be necessary. However, in the afore-described embodiment, lt is assumed that the count o~ th~e ~P/
DOWN counter is incremented in response to individual control pulses S4 which are supplied thereto. AND gate 45 thus is provided to sense when the count of the UP/DO~ counter has been changed by a predetermined amount. In the example described herein, this predetermined amount has been assumed to be the least significant digit ~i.e., 0.1 MHz or 1 KHz) of the frequency to which tuner 20 may be tuned.
It may be appreciated ~hat the count of UP/DOWN counter 22 is changed at a rate determined by the user in response to his rotation of tuning knob 7. The rate at which this count is changed is inaicated by the audible sounds generated by piezoelectric element 42 and thus may be perceived by the user. This audible perception may be helpful in selecting the rate at which the tuning conditi~n is varied.
~ 2 7 . .

In accordance with the foregoing discus~ion, it is appreciated that the rate at which tuner 20 may be tuned to different broadcast frequencies can be changed continuously during the auto-scan mode, and this rate may be increased or decreased as desired. Furthermore, the tuning condition of the tuner may be changed to higher or :Lower broadcast frequencies, depending upon whether tuning knob 7 is rotated in the clockwise or counterclockwise direction. Still further, since the tuning condition can be changed in an incremental step-wise manner by the user's control over switches SW2 and SW3, the tuner may be tuned accurately to any desired broadcast frequency.
While the present invention has been particularly shown and described with referenoe to a preferred embodiment, it should be readily apparent that various changes and modifica-tions in form and details may be made without departing from thespirit and scope of the invention. For example, UP/DO~N counter 22 may be a multi-stage counter, or register, adapted to supply a binary count to programmable frequency divider 21. It is not necessary that the count of the UP/DOWN counter be a multi-digit BCD count that is supplied serially to the programmable frequency divider. Further, transistors Q6 and ~7 in circuit 38 may be replaced by a phase splitter circuit to provide positive-going and negative-going pulses to differentiating circuits 47 and 46, respectively. Also, AND circuit 45 may be replaced by other suitable circuitry for sensing when the count of UP/DOWN counter 22 has been changed and for gPnerating a pulse in response to that change.
It is, therefore, intended that the appended claims be interpreted as including the foregoing as well as various other such changes and modifications.

Claims (10)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. Apparatus for indicating a changing tuning condition in a frequency synthesizer tuner of the type having a phase-locked loop including a reference oscillator, a variable fre-quency oscillator to produce a local oscillating signal, a pro-grammable frequency divider coupled to the variable frequency oscillator for dividing the frequency of said local oscillating signal by a variable dividing ratio to produce a frequency-divided oscillating signal, a phase comparator for comparing the frequency-divided oscillating signal to the output of the reference oscillator to produce an error signal, and means for feeding back the error signal from the phase comparator to the variable frequency oscillator to adjust the frequency of the local oscillating signal and thereby adjust the tuning condition of the tuner, said apparatus comprising a source of counter pulses;
counter means for counting counter pulses supplied thereto, said counter means being coupled to said programmable frequency divider to determine the dividing ratio thereof; manually operable slide switch means slidable in a first range to enable only a predetermined number of counter pulses to be supplied to said counter means and slidable in a second range to enable counter pulses to be supplied continually to said counter means;
sensing means for sensing when the count of said counter means changes by a predetermined amount; and sound generating means for generating an audible sound indication in response to said sensed change in said count to indicate that said tuning condi-tion has changed.

2. The apparatus of Claim 1 wherein said sound generat-ing means comprises a piezo-electric element and a driving cir-cuit connected to said piezo-electric element to actuate same in response to said sensed change in said count.

3. The apparatus of Claim 2 wherein said driving circuit comprises pulse generating means for generating a pulse in response to said sensed change in said count; differentiating means for differentiating the leading and trailing edges of said generated pulse; and means for supplying the differentiated edges to said piezo-electric element.

4. The apparatus of Claim 3 wherein the count of said counter means is a numerical representation of the frequency to which said tuner is tuned; and said sensing means senses when a predetermined digit of said numerical representation changes to generate said pulse.

5. Apparatus for indicating a changing tuning condi-tion in a frequency synthesizer tuner of the type having a phase-locked loop including a reference oscillator, a variable fre-quency oscillator to produce a local oscillating signal, a programmable frequency divider coupled to the variable frequency oscillator for dividing the frequency of said local oscillating signal by a variable dividing ratio to produce a frequency-divided oscillating signal, a phase comparator for comparing the frequency-divided oscillating signal to the output of the reference oscillator to produce an error signal, and means for feeding back the error signal from the phase comparator to the variable frequency oscillator to adjust the frequency of the local oscillating signal and thereby adjust the tuning condition of the tuner, said apparatus comprising counter means for counting counter pulses supplied thereto, the count of said counter means being a numerical representation of the frequency to which said tuner is tuned, said counter means being coupled to said programmable frequency divider to determine the dividing ratio thereof; and indicating means responsive to a change in at least a predetermined value of said count to indicate that said count has changed and, thus, that said tuning condition has changed, said indicating means comprising a piezo-electric element for generating an audible sound indication in response to said change in said tuning condition and a driving circuit connected to said piezo-electric element to actuate same in response to said change in said tuning condition, said driving circuit comprising sensing means for sensing when a predetermined digit of said numerical representation changes, pulse generating means for generating a pulse in response to said sensed change in said predetermined digit, differentiating means for differ-entiating the leading and trailing edges of said generated pulse, and means for supplying the differentiated edges to said piezo-electric element; wherein said sensing means comprises an AND circuit connected to receive a pulse signal from said counter means when said predetermined digit changes and to receive a timing pulse synchronized with said counter pulses, the latter being counted by said counter means, to initiate the leading edge of said generated pulse when said pulse signal and said timing pulse coincide, and to produce the trailing edge of said generated pulse so as to terminate same in response to the next-following timing pulse.

6. The apparatus of claim 1 further comprising adjustment means manually operable with said slide switch means to adjust the rate at which said counter pulses are supplied to said counter means so as to correspondingly vary the rate at which the tuning condition of said tuner is adjusted, and including gate pulse generating means for generating respective gate pulses, said adjustment means being included in said gate pulse generating means for adjusting the repetition rate of said gate pulses, and gate means coupled to said source of counter pulses and enabled by said gate pulses to supply a predetermined number of counter pulses to said counter means in response to each gate pulse when said slide switch means is in said second range.

7. The apparatus of Claim 6 wherein said slide switch means comprises at least one segment defining said second range and a wiper element movable across said at least one segment, said at least one segment being coupled to said source of counter pulses and said wiper element being coupled to said gate means.

8. The apparatus of Claim 1 further comprising gate means coupled to said source of counter pulses for supplying said counter pulses to said counter means when said slide switch means is in said first range; bistate means having a first state for enabling said gate means and a second state for disabling said gate means, said bistate means exhibiting said first state when said slide switch means is in neither said first nor said second range; and delay means responsive to the operation of said slide switch means to said first range to trigger said bistate means to said second state after a predetermined delay.

9. The apparatus of Claim 8 wherein said slide switch means comprises at least one segment defining said first range and a wiper element movable across said at least one segment, said at least one segment being coupled to said source of counter pulses and said wiper element being coupled to said gate means.

10. The apparatus of Claim 1 wherein said slide switch means is coupled to said source of counter pulses and comprises a bidirectional rotary switch having first and second pairs of arcuate segments, each pair defining first and second ranges, re-spectively, and first and second wiper elements movable across said first and second pairs of segments, respectively; first gate means for receiving said counter pulses when said first wiper element is in contact with one of said first pair of segments; first gate control means for enabling said first gate means to pass only said predetermined number of counter pulses to said counter means; second gate means for receiving said counter pulses when said second wiper element is in contact with one of said second pair of segments; and second gate control means for repetitively enabling said second gate means to pass a preselected amount of counter pulses to said counter means, said second gate control means having means for adjusting the rate at which said second gate means is repetitively enabled.