CA1114515A - Processeur central pour executer des instructions de longueur variable - Google Patents
Processeur central pour executer des instructions de longueur variableInfo
- Publication number
- CA1114515A CA1114515A CA314,183A CA314183A CA1114515A CA 1114515 A CA1114515 A CA 1114515A CA 314183 A CA314183 A CA 314183A CA 1114515 A CA1114515 A CA 1114515A
- Authority
- CA
- Canada
- Prior art keywords
- operand
- instruction
- information
- central processor
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000012545 processing Methods 0.000 claims abstract description 46
- 230000004044 response Effects 0.000 claims abstract description 20
- 230000015654 memory Effects 0.000 claims description 127
- 238000012546 transfer Methods 0.000 claims description 51
- 238000000034 method Methods 0.000 claims description 16
- 230000008569 process Effects 0.000 claims description 14
- 230000000875 corresponding effect Effects 0.000 claims 1
- 230000008878 coupling Effects 0.000 claims 1
- 238000010168 coupling process Methods 0.000 claims 1
- 238000005859 coupling reaction Methods 0.000 claims 1
- 238000006073 displacement reaction Methods 0.000 description 16
- 238000013519 translation Methods 0.000 description 11
- 230000014616 translation Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 8
- 230000006870 function Effects 0.000 description 7
- 238000003491 array Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 238000013459 approach Methods 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- TVEXGJYMHHTVKP-UHFFFAOYSA-N 6-oxabicyclo[3.2.1]oct-3-en-7-one Chemical compound C1C2C(=O)OC1C=CC2 TVEXGJYMHHTVKP-UHFFFAOYSA-N 0.000 description 1
- 101100481176 Bacillus subtilis (strain 168) thiE gene Proteins 0.000 description 1
- 101100494344 Desulfobacterium autotrophicum (strain ATCC 43914 / DSM 3382 / HRM2) bzaF gene Proteins 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000002405 diagnostic procedure Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PWPJGUXAGUPAHP-UHFFFAOYSA-N lufenuron Chemical compound C1=C(Cl)C(OC(F)(F)C(C(F)(F)F)F)=CC(Cl)=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F PWPJGUXAGUPAHP-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000000717 retained effect Effects 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 101150029215 thiC gene Proteins 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/355—Indexed addressing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
- G06F9/3016—Decoding the operand specifier, e.g. specifier format
- G06F9/30167—Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3818—Decoding for concurrent execution
- G06F9/3822—Parallel decoding, e.g. parallel decode units
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US84505577A | 1977-10-25 | 1977-10-25 | |
| US845,055 | 1977-10-25 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1114515A true CA1114515A (fr) | 1981-12-15 |
Family
ID=25294286
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA314,183A Expired CA1114515A (fr) | 1977-10-25 | 1978-10-25 | Processeur central pour executer des instructions de longueur variable |
Country Status (9)
| Country | Link |
|---|---|
| JP (1) | JPS5931733B2 (fr) |
| AU (1) | AU518656B2 (fr) |
| BR (1) | BR7807060A (fr) |
| CA (1) | CA1114515A (fr) |
| DE (1) | DE2846520A1 (fr) |
| ES (1) | ES474427A1 (fr) |
| FR (1) | FR2407519B1 (fr) |
| GB (1) | GB2007887B (fr) |
| IN (1) | IN150275B (fr) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4415969A (en) * | 1980-02-07 | 1983-11-15 | Intel Corporation | Macroinstruction translator unit for use in a microprocessor |
| US4491908A (en) * | 1981-12-01 | 1985-01-01 | Honeywell Information Systems Inc. | Microprogrammed control of extended integer and commercial instruction processor instructions through use of a data type field in a central processor unit |
| US4586130A (en) * | 1983-10-03 | 1986-04-29 | Digital Equipment Corporation | Central processing unit for a digital computer |
| US5761491A (en) * | 1996-04-15 | 1998-06-02 | Motorola Inc. | Data processing system and method for storing and restoring a stack pointer |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3573851A (en) * | 1968-07-11 | 1971-04-06 | Texas Instruments Inc | Memory buffer for vector streaming |
| US3577189A (en) * | 1969-01-15 | 1971-05-04 | Ibm | Apparatus and method in a digital computer for allowing improved program branching with branch anticipation reduction of the number of branches, and reduction of branch delays |
| US3614741A (en) * | 1970-03-23 | 1971-10-19 | Digital Equipment Corp | Data processing system with instruction addresses identifying one of a plurality of registers including the program counter |
| US3614740A (en) * | 1970-03-23 | 1971-10-19 | Digital Equipment Corp | Data processing system with circuits for transferring between operating routines, interruption routines and subroutines |
| US3710324A (en) * | 1970-04-01 | 1973-01-09 | Digital Equipment Corp | Data processing system |
| US3999163A (en) * | 1974-01-10 | 1976-12-21 | Digital Equipment Corporation | Secondary storage facility for data processing systems |
| DE2419837B2 (de) * | 1974-04-24 | 1976-12-02 | Nixdorf Computer Ag, 4790 Paderborn | Schaltungsanordnung zur adressierung eines mikroprogramms in datenverarbeitungseinrichtungen und verfahren zur durchfuehrung von sprungbefehlen |
| JPS5145946A (ja) * | 1974-10-17 | 1976-04-19 | Fujitsu Ltd | Deetashorishisutemu |
| JPS5282149A (en) * | 1975-12-29 | 1977-07-09 | Fujitsu Ltd | Instruction address control system |
-
1978
- 1978-10-23 IN IN775/DEL/78A patent/IN150275B/en unknown
- 1978-10-23 ES ES474427A patent/ES474427A1/es not_active Expired
- 1978-10-24 BR BR7807060A patent/BR7807060A/pt unknown
- 1978-10-25 GB GB7841837A patent/GB2007887B/en not_active Expired
- 1978-10-25 CA CA314,183A patent/CA1114515A/fr not_active Expired
- 1978-10-25 DE DE19782846520 patent/DE2846520A1/de active Granted
- 1978-10-25 JP JP53132099A patent/JPS5931733B2/ja not_active Expired
- 1978-10-25 AU AU41045/78A patent/AU518656B2/en not_active Expired
- 1978-10-25 FR FR7830344A patent/FR2407519B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| BR7807060A (pt) | 1979-07-17 |
| AU518656B2 (en) | 1981-10-15 |
| AU4104578A (en) | 1980-05-01 |
| GB2007887A (en) | 1979-05-23 |
| GB2007887B (en) | 1982-07-28 |
| FR2407519A1 (fr) | 1979-05-25 |
| JPS5931733B2 (ja) | 1984-08-03 |
| JPS5484943A (en) | 1979-07-06 |
| FR2407519B1 (fr) | 1987-08-28 |
| DE2846520C2 (fr) | 1991-10-24 |
| DE2846520A1 (de) | 1979-04-26 |
| ES474427A1 (es) | 1979-04-16 |
| IN150275B (fr) | 1982-08-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4236206A (en) | Central processor unit for executing instructions of variable length | |
| CA1114518A (fr) | Unite centrale pour executer des instructions avec un specificateur d'operande special | |
| US4395758A (en) | Accelerator processor for a data processing system | |
| US4338663A (en) | Calling instructions for a data processing system | |
| US4454578A (en) | Data processing unit with pipelined operands | |
| US4524416A (en) | Stack mechanism with the ability to dynamically alter the size of a stack in a data processing system | |
| EP0071028B1 (fr) | Unité de manipulation d'instruction d'un système de traitement de données avec substitution d'instruction et procédé de travail | |
| US4394725A (en) | Apparatus and method for transferring information units between processes in a multiprocessing system | |
| US4297743A (en) | Call and stack mechanism for procedures executing in different rings | |
| US4241399A (en) | Calling instructions for a data processing system | |
| US4361868A (en) | Device for increasing the length of a logic computer address | |
| US6064815A (en) | System and method for generating fix-up code facilitating avoidance of an exception of a predetermined type in a digital computer system | |
| US3955180A (en) | Table driven emulation system | |
| US4620275A (en) | Computer system | |
| US4395757A (en) | Process synchronization utilizing semaphores | |
| US5442802A (en) | Asynchronous co-processor data mover method and means | |
| US4926317A (en) | Hierarchical memory system with logical cache, physical cache, and address translation unit for generating a sequence of physical addresses | |
| US4369494A (en) | Apparatus and method for providing synchronization between processes and events occurring at different times in a data processing system | |
| US4084224A (en) | System of controlling procedure execution using process control blocks | |
| US4316245A (en) | Apparatus and method for semaphore initialization in a multiprocessing computer system for process synchronization | |
| US5218712A (en) | Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption | |
| US5317717A (en) | Apparatus and method for main memory unit protection using access and fault logic signals | |
| USRE32493E (en) | Data processing unit with pipelined operands | |
| US5802359A (en) | Mapping processor state into a millicode addressable processor state register array | |
| US4812972A (en) | Microcode computer having dispatch and main control stores for storing the first and the remaining microinstructions of machine instructions |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MKEX | Expiry |