CA1104266A - Scr having high gate sensitivity and high dv/dt rating - Google Patents

Scr having high gate sensitivity and high dv/dt rating

Info

Publication number
CA1104266A
CA1104266A CA303,947A CA303947A CA1104266A CA 1104266 A CA1104266 A CA 1104266A CA 303947 A CA303947 A CA 303947A CA 1104266 A CA1104266 A CA 1104266A
Authority
CA
Canada
Prior art keywords
thyristor
layer
region
projection
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA303,947A
Other languages
French (fr)
Inventor
Victor A.K. Temple
Armand P. Ferro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Priority to CA303,947A priority Critical patent/CA1104266A/en
Application granted granted Critical
Publication of CA1104266A publication Critical patent/CA1104266A/en
Expired legal-status Critical Current

Links

Landscapes

  • Thyristors (AREA)

Abstract

ABSTRACT OF THE DISCLOSURE

A thyristor is provided having high gate sensitivity in combination with high dv/dt ratings. An amplifying gate structure is utilized having a pilot thyristor region including a first portion characterized by a first extent and at least one projection of said first portion extending therefrom and having a lateral extent greater than the extent of said first portion; and means substantially isolating said pilot thyristor region from the remainder of the device which means surround said first portion and the slides of said projection.

Description

1~4~66 This invention relates, in general, to thyristors and more particularly to an improved gate structure for amplify~
ing gate thyristors which provides increased sensitivity without reduction of dv/dt capability in thyristor devices as com-pared with devices according to the prior art.
It is desirable to provide thyristor devices having high sensitivities to gate signals for turning on the devices.
It has been the practice to provide increased sensitivity by increasing the area of the gate region of a thyristor device. This practice leads to devices having increased sensitivity to dv/dt turn on which is undesirable. The susceptibility of a thyristor to dv/dt turn on l~s related fundamentally to the depletion capacitance in the gate area of the device which in turn is directly related to the size of the pilot thyristor portion of an amplifying gate device.
It is desirable, therefore, to provide a device having as small a pilot thyristor region as possible consistent with the desired sensitivity. It will be appreciated that the twin aims of (1) increasing gate sensitivity and (2) de-creasing the susceptibility to dv/dt turn on are achievedby antithetical structures. Specifically, where a large gate area provides increased sensitivity (especially in radiation triggered devices), favourable dv/dt ratings are achieved with a small gate area.
Accordingly, it is an object of this invention to provide a thyristor and more particularly an amplifying gate thyristor having both high gate sensitivity and low susceptibility to dv/dt turn on.
It is another object of this invention to provide an improved thyristor of the type described requiring no external circuitry to achieve the objective thereof.

It is yet another object of this invention to provide - 1 - ~.

11~4~66 RD-7857 an improved thyristor structure of the type described which does not require extensive deviation from standard processing technology.
d Briefly st~tes and in accordance with one aspect of this invention, an improved thyristor having gate sensitivity and high dv/dt rating is provided which includes a pilot thyristor section having a first region characterized by a first lateral extent and at least one projection extending therefrom having a lateral extent greater than the lateral extent of said first region. In accordance with one particular embodiment of this invention, a radially symmetri-cal device is provided having a circular pilot thyristor emitter region including one or more projections extending therefrom in the form of radial arms and means isolating sides of both the radial arms and the external boundary of the central portion of the pilot thyristor from the remainder of the device. In accordance with a presently preferred embodiment of this invention, isolation is achieved by a groove extending from the surface of the thyristor down into the body thereof in order to increase the lateral base impedance in the area of the gate surrounding the pilot thyristor region described. In accordance with an alternative embodiment of this invention, isolation is achieved through selective planar diffusion of the pilot emitter. In ac-cordance with yet another aspect of this invention, isolation is achieved through a moat etch through the forward blocking junction of the thyristor. In accordance with yet another aspect of this invention isolation is achieved by a semi-conductor region of like conductivity type as the pilot emitter region partially surrounding the emitter region and laterally spaced therefrom.

The features of the invention which are believed to be novel are pointed out with particularity in the appended claims. The invention itself, however, both as to its organization and method of operation together with further objects and advantages thereof may best be understood by refer to the following description taken in connection with the accompanying drawings in which:
Figure 1 is a top view of the central portion of an improved thyristor in accordance with this invention.
Figures 2 and 3 are section views of two alternative embodiments of the invention taken along section line A-A.
Figures 1 and 4 are top views of the central portion of two embodiments of a thyristor in accordance with this invention.
Figures 2, 3, 5 and 6 are section views of alternative embodiments of this invention taken along section line A-A.
Fundamental to the operation of this invention is the different dependence upon gate structure of the turn-on sensitivity of a thyristor to external gate current as compared to displacement current (that is to say dv/dt current).
Radially symmetrical gate structures display a sensitive to an external gate signal which is related to the ratio of the outer to the inner radius of the gate. More specific-ally, the turn-on sensitivity for an annular amplifying gate structure may be described as IG threshold V threshold 2~r ~ ~

wherein e = 5 ~ (y) dy, o~(y) being the base conductivity and t being the thickness of the base layer. Generally, the sensitivity of a gate structure of this type will be seen to increase as the radius increases. While the sen-sitivity of an annular gate structure is determined by the overall dimensions of the structure, the initially turned-on 11~qL;2t~6 area is an area substantially less than the total area of the gate structure. Generally, the length of the initial-turn-on line is determined by the geometry of the gate and the lateral extent into the pilot emitter by the rise time and magnitude of the applied gate signal. Since the anode-cathode current flow transfers to main emitter region shortly after turn-on of the pilot thyristor the pilot thyristor need not be large in area. Since the sensitivity of the pilot to dv/dt turn-on is related to the area of the pilot emitter, it is desired to make that area small while still providing a sufficient gate area to accommodate the initial turn-on line. However, as was hereinabove de-scribed, reducing the outer radius of an annular gate structure reduces the turn-on sensitivity unless a cor-responding reduction is made in the inner radius. While simultaneous reduction of the outer and inner radii in order to keep the ratio thereof constant will be effective, it can readily be seen that the initial turn-on line length reduces with the inner radius. In the case of thyristors triggered by a current source, this method may be acceptable insofar as a certain minimum inner radius is maintained to facilitate the construction of the device and consistent with a certain minimum turn-on line length.
In radiation triggered designs, however, reduction of the inner radius of an annular gate region reduces the area exposed to radiation which may also be undesirable.
Referring now to Figure 1, there is illustrated the pilot thyristor portion of an amplifying gate thyristor device including a gate structure in accordance with this invention which provides both increased sensitivity to an externally applied gate signal (in this case a radiation signal~ and at the same time reduced sensitivity to dv/dt 11~4Z66 turn-on. Figure 1 is a top view of the device, while Figures 2 and 3 are cross section views of alternative embodiments of a thyristor in accordance with this invention utilizing different methods for achieving the required is-olation surrounding the gate region.
Figures 2 and 3 are taken along section line 2-2.
The device is a layered semiconductor structure including semiconductor layers of alternating conductivity type. A
first layer 10 is of p-conductivity type semiconductor material and is conventionally referred to as the anode of the device. While a device will be described in accord-ance with the teachings of this invention which is a p-n-p-n thyristor device. It will be understood by those skilled in the art that complementary conductivity types may be employed if desired to produce a complementary device. A
metal electrode 12 may conveniently be provided beneath semiconductor layer 10 to provide thermal and electrical contact thereto. The relative thickness of the electrode and the various semiconductor layers of the figures are not 2Q intended to be scale. Overlying p-layer 10 and forming a first junction 14 is ~ conductivity type,semiconductor layer 16. This layer is conventionally referred to as the n-base layer of the device. Further, p-conductivity type semiconductor layer 18 overlies layer 16 forming junction 20 therebetween, layer 18 being the p-base layer of the device. Each of the anode, n-base and p-base layers may conveniently be formed by epitaxial growth, diffusion into an appropriately doped wafer or otherwise as is well known to those skilled in the art. For example, the structure illustrated in Figure 3 presumes a mask diffusion method for forming semiconductor layer 22 which is generally analogous to layer 18 in Figure 2. In the case of Figure 3, semi-,.- RD-7857 11~4Z66 conductor layer 22 is formed by the diffusion of impurity atoms into an n-conductivity type semiconductor layer 16 which extends to the surface of the device. Similarly, layer 10 might be formed at the same time as layer 22 by diffusion or might be epitaxially grown on a surface of layer 16 or otherwise as is well known to those skilled in the art.
Those portions of the device is accordance with this invention hereinabove described are substantially visible only in Figures 2 and 3. The remainder of the device may be most clearly understood by reference now to Figure 1 in conjunction with Figure 2 or Figure 3 as indicated. Radia-tion sensitive area 24 is formed in p-conductivity type semiconductor layers 18 or 22. Region 24 may conveniently be polished, etched, coated or otherwise treated for the efficient collection of radiation impinging thereon. Light triggered and other types of radiation triggered thyristors are well known in the art and those techniques appreciated by one skilled in the art may readily be employed in con-junction with a device in accordance with this invention.
Accordingly, region 24 may conveniently be made thinner than the remainder of region 18 or 22 to most efficiently provide for the formation of carriers in that portion of junction 20 underlying radiation sensitive region 24.
Electrode 26 surrounds region 24 and provides for the equal distribution of carriers generated beneath region 24 for the initial turn-on of the device. Electrode 26 is optional and is illustrated herein as a preferred structu~e in ac-cordance with this invention as applied to light fired thyristor devices. In an electrically fired device region 26 would extend inward to cover region 24 for more convenient contact to the gate. N-conductivity type layer 28 surrounds ~ RD-7857 radiation sensitive region 24 and forms the pilot emitter of the device. N-type conductivity layer 28 is of generally annular shape and includes projection 28' extending radially outward therefrom. Electrode 30 overlies both n-conductivity type layer 28 in a portion of p-conductlvity type layer 18 and, in the case of Figure 3, p-conductivity type layer 22.
Electrode 30 forms both the cathode of the pilot thyristor portion of a device in accordance with this invention and the gate of the main thyristor section. The main thyristor portion of a device in accordance with this invention ln-cludes n-conductivity type layer 32 and electrode 34 which overlies layer 32 and contacts p-conductivity type layers 18 or 22 at a plurality of emitter shorts 36 if desired.
Emitter shorts 36 are preferably formed in accordance with this invention to increase the dv/dt capabilities of the main emitter portion of the device in accordance with well known principles. Accordingly, emitter shorts 36 may be omitted where desired.
The gate region of the pilot thyristor portion of a device in accordance with this invention, that is to say the region of the device generally defined as underlying n-conductivity type layer ~, is isolated from the remainder of the device; in Figure 2 by groove 38 and in Figure 3 by that portion of n-conductivity type layer 16 which extends to the surface of the device at 40. In both cases, the lateral resistivity of p-base layer 18 (or 22) is increased so that little or no current will flow out-ward from the gate area of the device except as constrained by the groove. Specifically, most of the gate current or photo gate current in a light fired device flows only under extension 28' of n-conductivity type pilot emitter layer 28.
While groove 38 is illustrated as extending only partially 1 l~P~ RD-7857 into layer 18 in Figure 2, it may, if desired, extend through junction 20 into layer 16 as illustrated in partial section view in Figure 5. Preferably, groove 38 is filled with passivating material as illustrated to increase the breakdown voltage of the thyristor.
In accordance with a further embodiment of this invention illustrated in Figure 6, a region of opposite conductivity type to layer 18 replaces groove 38. Region 70 is located adjacent the pilot emitter but spaced later-ally therefrom and provides isolation by reducing thethickness of a p-base layer 18 in the area of the additional region.
Figure 4 illustrates a thyristor in accordance with this invention which is substantially similar to the device of Figures 1, 2 and 3 except that four projections of the type exemplified by 28' are provided. This provides a some-what more symmetrical device while reducing both the sen-sitivity to an externally applied gate signal and the sensitivity to dv/dt turn-on. Referring now to Figure 4 which illustrates only a top view of the device, it being understood that the section views of Figures 2 and 3 substantially apply to the device of Figure 4 with the addition only of the additional projections, projections 50, 52, 54 and 56 are provided. The remaining reference numerals correspond to the like numerals of Figures 1-3.
While Figure 4 illustrates etched regions 58-61 as ex-tending radially outward a distance approximately equal to the length of projections 50, 52, 54 and 56, it will be understood that a narrow groove or other isolation region as described in conjunction with Figures 1-3, 5 and 6 may also be used. In that case, the groove would be located adjacent the boundaries of pilot emitter 28 and projections ll~';LZ~6 RD-7857 50, 52, and 56 extending therefrom.
The advantages of this invention may be readily ap-preciated by considering two examples of specific devices in accordance herewith. A first example will be provided wherein a device in accordance with the prior art and the device in accordance with the instant invention are designed to have equal sensitivities, the dv/dt capabilities being compared. A second example will compare the sensitivites of devices in accordance with the instant invention and the prior art having equal dv/dt capabilities. In both examples, the prior art gate structure which will be considered is an annular structure having a specified inner and outer radiud n+ gate emitter region. The structure in accordance with this invention will be of the type ill-ustrated in Figure 4 having a specified inner radius, a specified outer radius for the annularly shaped portion of the emitter and full projections of specified width and length, the length being measured in the same way as the aforesaid inner and outer radii, that is to say from - 20 the center of the device. In all cases, the p-base con-ductivity of the device is the same and is designated by and p-base thickness by t.
The first example utilizes a thyristor in accordance with the prior art having an annular gate emitter having an inner radius of 10 mils and an outer radius of 100 mils.
The sensitivity of such a thyristor may be calculated as approximately .366/ a t. The sensitivity to anode current density (C dv/dt) is approximately .0161/~t. For purposes of comparision, a device in accordance with the instant invention having the same sensitivity to an externally applied gate signal has an inner radius of 10 mils, an intermediate radius of 25 mils and an outer radius of 34 _ g _ 11~4~ti6 mils with a projection width of 10 mils. A device of these dimensions has a sensitivity to an externally applied gate signal of .365/~t and a sensitivity to anode current density of .0065/~t. It will be appreciated that the sensitivities to externally applied gate signals of the two devices is substantially equal while the sensitivity to anode current density is more than double in the prior art device.
According to the second example, a thyristor in ac-cordance with the prior art is provided having an inner radius of 20 mils and an outer radius of 106 mils. A
device of these dimensions has a sensitivity to an externally applied gate signal of .374/~t and a sensitivity to an anode current density of .070/~t. A device in accordance with this invention having a similar sensitivity to anode current density may be fabricacted having an inner radius of 20 mils, an intermediate radius of 35 mils, an outer radius of 70 mils and a projection width of 3.5 mils. A device of these dimensions has a sensitivity to an externally applied gate signal of 2.59/at and a sensitivity to anode current den-sity of .071/~t. It will be seen that with no sacrifice in dv/dt capability, a device is provided having a gate current sensitivity approximately 7 times that of a prior art device.
A thyristor in accordance with this invention has been provided having substantial benefits over prior art types in terms of sensitivity to an externally applied gate signal and relative insensitivity to dv/dt turn-on. A
thyristor in accordance with this invention while especi-ally suited to radiation triggered devices and, more particularly, light fired devices may equally well be utilized with devices triggered by a conventional current or voltage signal. Further, while devices in accordance with ~ 4 2 6~ RD-7857 this invention have been illustrated having one and four projections of generally rectangular shape, it will be understood by those skilled in the art that any number of projections may be used as desired, and that although rectangular projections are preferred, other forms may be utilized.
While the invention has been particularly shown and described with reference to several preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the true spirit and scope of the invention as defined by the appended claims.

Claims (9)

The embodiments of the invention in which an exclusive property or privilege is claimed are defined as follows:
1. An amplifying gate thyristor comprising:
a pilot gate characterized by a first emitter region having a first lateral extent and at least one projection extending therefrom having a lateral extent greater than said first lateral extent and an isolating region partially surrounding said first emitter region and said projection for preventing lateral current flow except under said projection.
2. The thyristor of claim 1 wherein said first emitter region comprises a substantially radially symmetrical region characterized by a first outer radius over a first portion ofsaid region and a second outer radius in the area of said projection.
3. The thyristor of claim 2 further comprising a radiation sensitive area within said radially symmetrical region responsive to the incidence of radiation thereon to cause an electrical current to flow under said projection to turn on said thyristor.
4. The amplifying gate thyristor of claim 1 wherein said isolating region comprises a groove extending from the surface of said thyristor into the body thereof for increasing the lateral impedance of the p-base layer of the thyristor in the area of the groove.
5. The amplifying gate thyristor of claim 4 wherein said groove extends completely through said p-base layer.
6. The amplifying gate thyristor of claim 1 wherein said isolating region comprises a region of the same con-ductivity type semiconductor material of said first emitter region.
7. A thyristor comprising first, second and third
Claim 7 cont'd semiconductor layers of alternating conductivity type comprising the anode, n-base and p-base layers of said thyristor respectively; a fourth semiconductor layer formed on said third layer, said fourth layer comprising the pilot emitter layer of the device and having a generally annular configuration including at least one projection extending radially outward therefrom; and isolating means partially surrounding said fourth layer for isolating said layer from said third layer to prevent the lateral flow of current therefrom except under said projection.
8. The thyristor of claim 7 wherein said means parti-ally surrounding said fourth layer comprises a groove, extending from a first surface of said third layer down into said third layer for increasing the lateral impedance of said third layer in the region of the groove.
9. The thyristor of claim 8 wherein said groove extends at least into said second semiconductor layer.
CA303,947A 1978-05-24 1978-05-24 Scr having high gate sensitivity and high dv/dt rating Expired CA1104266A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CA303,947A CA1104266A (en) 1978-05-24 1978-05-24 Scr having high gate sensitivity and high dv/dt rating

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CA303,947A CA1104266A (en) 1978-05-24 1978-05-24 Scr having high gate sensitivity and high dv/dt rating

Publications (1)

Publication Number Publication Date
CA1104266A true CA1104266A (en) 1981-06-30

Family

ID=4111534

Family Applications (1)

Application Number Title Priority Date Filing Date
CA303,947A Expired CA1104266A (en) 1978-05-24 1978-05-24 Scr having high gate sensitivity and high dv/dt rating

Country Status (1)

Country Link
CA (1) CA1104266A (en)

Similar Documents

Publication Publication Date Title
US4412242A (en) Planar structure for high voltage semiconductor devices with gaps in glassy layer over high field regions
US5489799A (en) Integrated edge structure for high voltage semiconductor devices and related manufacturing processs
CA1037160A (en) Semiconductor device having at least one pn junction and channel stopper surrounded by a protective conducting layer
KR940007968A (en) Semiconductor device with planar junction
US4012761A (en) Self-protected semiconductor device
US3771029A (en) Thyristor with auxiliary emitter connected to base between base groove and main emitter
US3961358A (en) Leakage current prevention in semiconductor integrated circuit devices
GB1573234A (en) Thyristors
CA1104266A (en) Scr having high gate sensitivity and high dv/dt rating
US4739387A (en) Amplifying gate thyristor having high gate sensitivity and high dv/dt rating
JPH06283727A (en) Power semiconductor element
US3337782A (en) Semiconductor controlled rectifier having a shorted emitter at a plurality of points
US4343014A (en) Light-ignitable thyristor with anode-base duct portion extending on cathode surface between thyristor portions
US4078244A (en) Semiconductor device
US4319262A (en) Integrated-circuit structure including lateral PNP transistor with polysilicon layer bridging gap in collector field relief electrode
JPH02237162A (en) Insulated gate bipolar transistor
US4352118A (en) Thyristor with segmented turn-on line for directing turn-on current
GB1569726A (en) Planar-type semiconductor device
NO123294B (en)
US3602779A (en) Epitaxial transistor with limited area buried layer and lifetimekillers
JPS63260078A (en) Overvoltage self-protection type thyristor
CA1087756A (en) High voltage thyristor
GB1576457A (en) Semiconductor devices
US4563698A (en) SCR Having multiple gates and phosphorus gettering exteriorly of a ring gate
US4577210A (en) Controlled rectifier having ring gate with internal protrusion for dV/dt control

Legal Events

Date Code Title Description
MKEX Expiry