CA1101127A - Semiconductor component with protective passivating layer - Google Patents
Semiconductor component with protective passivating layerInfo
- Publication number
- CA1101127A CA1101127A CA282,942A CA282942A CA1101127A CA 1101127 A CA1101127 A CA 1101127A CA 282942 A CA282942 A CA 282942A CA 1101127 A CA1101127 A CA 1101127A
- Authority
- CA
- Canada
- Prior art keywords
- layer
- vapour
- semiconductor component
- semiconductor
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/298—Semiconductor material, e.g. amorphous silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
- H01L21/02145—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing aluminium, e.g. AlSiOx
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
ABSTRACT OF THE DISCLOSURE
The current-voltage characteristic of a semiconductor component is kept stable by vapour-depositing a protective passivating layer of silicon to at least the peripheral surface of the semiconductor element. The passivating layer can be achieved at low cost and at low temperature. The layer may contain dopants, reactive gases, or metals. The presence of these materials in the layer influences the specific resistance and conductivity type of the layer.
The current-voltage characteristic of a semiconductor component is kept stable by vapour-depositing a protective passivating layer of silicon to at least the peripheral surface of the semiconductor element. The passivating layer can be achieved at low cost and at low temperature. The layer may contain dopants, reactive gases, or metals. The presence of these materials in the layer influences the specific resistance and conductivity type of the layer.
Description
llVllZ7 The present lnvention relates t~ semiconductor component-~having a se~iconductor element which consists of sillcon.
A basic pro~lem with semiconductor components is Xeeping the current-voltage characteristlc stable. In the case of rectifiers and transistors, the important characteristic ~
that in the blocking d~rection, whereas in the case o~ thyris-- tors, the attention must be given to the stabil~ ty of the characteristics in bo~h the block~ng and the tri~ger~ng direct-lons. It is already known to passivate the surfaces of the semiconductor elements of such semiconductor component~ by applying various organic or inorganic surface layers thereto.
Lacquers, rubbers and glass ha~e, for example, already been : proposed for this purposeO Generally speaking, it is possible ;~ to achieYe an adequate stability of the char cteristic by the use of such surface layers. However, on occas~on instabilitles have been found to occur, the causes of whlch may be found in unrecognised changes 1n the properties of the surface layers and~or of the surface of the semicond~ctor element. In the past, this has frequently led to heavy fluctuations in the 2Q yield of serviceable semiconductor components.
It has ~ ready been proposed to passivate a semiconductor element by thermally ~rowing a s~licon layer thereon. Howev~r this passivation process is extremely t~me-consu~ing and compl~-cated and, ~n additlon, necessitates the use of temperatures of between 600 and 700 C., which rules out its use for components which have ~ready been contacted, and possibly soldered. It ls also necessary to etch away the sllicon layer at those areas at -- 2 ~
llOllZ7 which it is not required.
It is an object of the present invention to provide a semiconductor component having a semiconductor element provided with a passivating silicon surface layer with which a substanti-ally stable current-voltage characteristic can be achieved at a basically low cost.
According to the invention, there is provided a semi-conductor component comprising a semiconductor element made of silicon having at least one pn-junction, that extends up to the surface of the semiconductor element, and a passivating protect-ive layer of silicon, that is deposited on the semiconductor - element by evaporation of silicon at least at that point where the pn-junction comes to the surface of the semiconductor ele-ment, wherein the vapour-deposited silicon contains at least one reactive gas.
The vapour-deposited silicon layer may also contain one or more dopants and/or metals. Preferably, the thickness of the vapour-deposited silicon layer is at least O.l~um. In order to increase the dielectric spar~-over resistance, the vapour-deposited silicon layer may be provided with a further pro-tective layer.
The invention will now be further described with reference to the drawing, in which:
Figure 1 is a schematic side-sectiona' view of a thy-ristor in accordance with the invention; and Figure 2 is a schematic side-sectional view of part of a thyristor similar to that shown in Figure 1 to illustrate operation of the component.
.~ ~
., .. . .
llOllZ7 Referring to Figure 1, a thyristor has a semiconductor - element having four zones, a cathode-side emitter zone 1, a cathode-side base zone 2, an inner base zone 3, and an anode-side emitter zone 40 P-n junctions 5, 6 and 7 are located be-tween the zones 1 and 2, 2 and 3, and 3 and 4 respectively.
The semiconductor element consists of silicon, and the zones 1,
A basic pro~lem with semiconductor components is Xeeping the current-voltage characteristlc stable. In the case of rectifiers and transistors, the important characteristic ~
that in the blocking d~rection, whereas in the case o~ thyris-- tors, the attention must be given to the stabil~ ty of the characteristics in bo~h the block~ng and the tri~ger~ng direct-lons. It is already known to passivate the surfaces of the semiconductor elements of such semiconductor component~ by applying various organic or inorganic surface layers thereto.
Lacquers, rubbers and glass ha~e, for example, already been : proposed for this purposeO Generally speaking, it is possible ;~ to achieYe an adequate stability of the char cteristic by the use of such surface layers. However, on occas~on instabilitles have been found to occur, the causes of whlch may be found in unrecognised changes 1n the properties of the surface layers and~or of the surface of the semicond~ctor element. In the past, this has frequently led to heavy fluctuations in the 2Q yield of serviceable semiconductor components.
It has ~ ready been proposed to passivate a semiconductor element by thermally ~rowing a s~licon layer thereon. Howev~r this passivation process is extremely t~me-consu~ing and compl~-cated and, ~n additlon, necessitates the use of temperatures of between 600 and 700 C., which rules out its use for components which have ~ready been contacted, and possibly soldered. It ls also necessary to etch away the sllicon layer at those areas at -- 2 ~
llOllZ7 which it is not required.
It is an object of the present invention to provide a semiconductor component having a semiconductor element provided with a passivating silicon surface layer with which a substanti-ally stable current-voltage characteristic can be achieved at a basically low cost.
According to the invention, there is provided a semi-conductor component comprising a semiconductor element made of silicon having at least one pn-junction, that extends up to the surface of the semiconductor element, and a passivating protect-ive layer of silicon, that is deposited on the semiconductor - element by evaporation of silicon at least at that point where the pn-junction comes to the surface of the semiconductor ele-ment, wherein the vapour-deposited silicon contains at least one reactive gas.
The vapour-deposited silicon layer may also contain one or more dopants and/or metals. Preferably, the thickness of the vapour-deposited silicon layer is at least O.l~um. In order to increase the dielectric spar~-over resistance, the vapour-deposited silicon layer may be provided with a further pro-tective layer.
The invention will now be further described with reference to the drawing, in which:
Figure 1 is a schematic side-sectiona' view of a thy-ristor in accordance with the invention; and Figure 2 is a schematic side-sectional view of part of a thyristor similar to that shown in Figure 1 to illustrate operation of the component.
.~ ~
., .. . .
llOllZ7 Referring to Figure 1, a thyristor has a semiconductor - element having four zones, a cathode-side emitter zone 1, a cathode-side base zone 2, an inner base zone 3, and an anode-side emitter zone 40 P-n junctions 5, 6 and 7 are located be-tween the zones 1 and 2, 2 and 3, and 3 and 4 respectively.
The semiconductor element consists of silicon, and the zones 1,
2, 3 and 4 are doped in the usual manner in accordance with the purpose for which the semiconductor component is to be used.
A protective layer 8 which consists of vapour-deposited silicon is arranged on the peripheral surface of the semiconductor element. This protective layer has a thickness of 0.1 /um. It may, however, be thicker, for example, it may have a thickness of 1 /um. In order to increase the dielectric spark-over resistance~
a further protective layer 9, which may consist, for example, of standard rubber or of a protective lacquer, is arranged on the vapour-deposited silicon layer 8.
The silicon layer 8 may contain one or more dopan~s, such as, for example, boron or phosphorus. One or more reactive gases, such as, for example, o~ygen, can also be incorporated in the silicon layer. The layer 8 may also contain one or more metals, such as, for example, aluminium. These additives serve to influence the specific resistance and conductivity type of the layer 8. By changing ~he specific resistance, it is possible to adjust the potential co~ditions at the peripheral surface of the semiconductor element. The layer 8 may be doped, for example~ ~ith phospho~us, and may have a specific resistance, of, for example, ;
1~01127 106 Ohm cm.
As already mentioned, the thickness o~ the layer 8 may be between 0.1 and 1 ~m. This layer has been vapour-deposited using a conventional vacuum-vapour-deposition system at a pressure of 5 x 10 6 ~orr. ~ silicon block may for example be used as the s~licon source. The energy source used to vaporise the silicon ~ay, for example, be an electron beam. Us~ng an electron beam at an acceleration voltage of 8 kV and a current o~ about 0.5 amps, a vapour-deposi~ion rate of 0.2S ~mfmin can be achievet. The vapour-deposition rate can be increased, for example, to 0.5 ~m/min by increaslng the electron current andf or by ~ncreasing its ener~y. It is also possible to construct the layer 8 of a plura~ity of su~-layers haYing di~ferent granule sizes. In thi~ way, it ls possible to achieve a change in ~he specific resi~tance within the thic~ness of the layer 8 and th~s to influence the potential cond~tions at the per~pher~
surface of the semiconductor element. Sub-layers of different granule size can be produced, for example, by using different growth rates for the deposited sil~con~
An essential ad~antage of using a vapour-deposited silicon layer is that the substrate, i.e. the semiconductor element? can remain cold during the vapo~r-depos~tion. EYen with other methods of vaporisat~on, for example, using radiat-ion heat, the semiconductor element can be ma~ntained at room temperature, for example~
Semiconductor elements which have ~een provided with a passivation layer made of vapour-deposited silicon~ exhibit a _ 5 _ -, ~ - , : .
-- : . :, , :- ' , , :
surprisingly good current-voltage characteristic stability.
This applies both to the characteristi~ in the blocXing directlon in the case of diodes and transistors, and also to the characteristics in both the blocXing and triggering directions, ~n the case of thyristors. Thls may be estab-lished, for example, by using known photoelectric methods to investigate the space-charge zones at the periphery of a semi-conductor element.
Figure 2 illustrates the form of the space-charge zone 10 in a conventional thyr~s~or without a layer ~ when the p-n ~unction 7 i5 ~iased ~n the blocking direction. At the start ~f the blocking biasing, the boundaries 11, 12 of the space-charge zone 10 run approximately parallel to t-he p-n ~un~tions.
If the bloc~ing b~as persists for a long period, the space-rharge zone expands in that the boundary 12 of the space-char~e zone 10 at the periphery of the semiconductor element shifts towards the p-n ~unction 6. At the same time, the boundary 11 of the space-charge zone 10 moves in a direction away from the p-n ~unction 7, although only to a considerably lesser extent since the zone 4 is doped more strongly than is the zone 3. The expansion of the space-charge zone is indi cated ~n broken lines in Figure 2. With an increasing expan-sion of the space-charge zone, the blocking current increases until, when the p-n ~unction 6 is reached at the periphery, so-called punch through occurs, whereupon the p-n junction 6 loses its capacity for blocking. The expansion also takes place correspondingly at the p-n ~unctions 5 and 7, when the '' ;. - : ' . -~, ' ll(~llZ7 semiconductor element is biased with a voltage in the reverse direction, i.e. in the triggering direction.
It has been established that, when a vapour-deposited s~licon layer is present, no expansion of the space-charge zone 10 takes place at the periphery of the element. This means that there is no increase in the bloc~ing currents, that ls to say, the char~cteristics remain stable. ~hls also applies to b~ as~ng of the semiconductor element at the operating t~7p-erature~
Although the invention has been descri~ed wlth particular reference to a thyristor, it can equally be used for diodes and transistors, and for other semiconductor components.
:
-: - - . ~ - - - ~
,; . ,, ~ - ~. . ' ' ~
,, : ~ . . ' :
A protective layer 8 which consists of vapour-deposited silicon is arranged on the peripheral surface of the semiconductor element. This protective layer has a thickness of 0.1 /um. It may, however, be thicker, for example, it may have a thickness of 1 /um. In order to increase the dielectric spark-over resistance~
a further protective layer 9, which may consist, for example, of standard rubber or of a protective lacquer, is arranged on the vapour-deposited silicon layer 8.
The silicon layer 8 may contain one or more dopan~s, such as, for example, boron or phosphorus. One or more reactive gases, such as, for example, o~ygen, can also be incorporated in the silicon layer. The layer 8 may also contain one or more metals, such as, for example, aluminium. These additives serve to influence the specific resistance and conductivity type of the layer 8. By changing ~he specific resistance, it is possible to adjust the potential co~ditions at the peripheral surface of the semiconductor element. The layer 8 may be doped, for example~ ~ith phospho~us, and may have a specific resistance, of, for example, ;
1~01127 106 Ohm cm.
As already mentioned, the thickness o~ the layer 8 may be between 0.1 and 1 ~m. This layer has been vapour-deposited using a conventional vacuum-vapour-deposition system at a pressure of 5 x 10 6 ~orr. ~ silicon block may for example be used as the s~licon source. The energy source used to vaporise the silicon ~ay, for example, be an electron beam. Us~ng an electron beam at an acceleration voltage of 8 kV and a current o~ about 0.5 amps, a vapour-deposi~ion rate of 0.2S ~mfmin can be achievet. The vapour-deposition rate can be increased, for example, to 0.5 ~m/min by increaslng the electron current andf or by ~ncreasing its ener~y. It is also possible to construct the layer 8 of a plura~ity of su~-layers haYing di~ferent granule sizes. In thi~ way, it ls possible to achieve a change in ~he specific resi~tance within the thic~ness of the layer 8 and th~s to influence the potential cond~tions at the per~pher~
surface of the semiconductor element. Sub-layers of different granule size can be produced, for example, by using different growth rates for the deposited sil~con~
An essential ad~antage of using a vapour-deposited silicon layer is that the substrate, i.e. the semiconductor element? can remain cold during the vapo~r-depos~tion. EYen with other methods of vaporisat~on, for example, using radiat-ion heat, the semiconductor element can be ma~ntained at room temperature, for example~
Semiconductor elements which have ~een provided with a passivation layer made of vapour-deposited silicon~ exhibit a _ 5 _ -, ~ - , : .
-- : . :, , :- ' , , :
surprisingly good current-voltage characteristic stability.
This applies both to the characteristi~ in the blocXing directlon in the case of diodes and transistors, and also to the characteristics in both the blocXing and triggering directions, ~n the case of thyristors. Thls may be estab-lished, for example, by using known photoelectric methods to investigate the space-charge zones at the periphery of a semi-conductor element.
Figure 2 illustrates the form of the space-charge zone 10 in a conventional thyr~s~or without a layer ~ when the p-n ~unction 7 i5 ~iased ~n the blocking direction. At the start ~f the blocking biasing, the boundaries 11, 12 of the space-charge zone 10 run approximately parallel to t-he p-n ~un~tions.
If the bloc~ing b~as persists for a long period, the space-rharge zone expands in that the boundary 12 of the space-char~e zone 10 at the periphery of the semiconductor element shifts towards the p-n ~unction 6. At the same time, the boundary 11 of the space-charge zone 10 moves in a direction away from the p-n ~unction 7, although only to a considerably lesser extent since the zone 4 is doped more strongly than is the zone 3. The expansion of the space-charge zone is indi cated ~n broken lines in Figure 2. With an increasing expan-sion of the space-charge zone, the blocking current increases until, when the p-n ~unction 6 is reached at the periphery, so-called punch through occurs, whereupon the p-n junction 6 loses its capacity for blocking. The expansion also takes place correspondingly at the p-n ~unctions 5 and 7, when the '' ;. - : ' . -~, ' ll(~llZ7 semiconductor element is biased with a voltage in the reverse direction, i.e. in the triggering direction.
It has been established that, when a vapour-deposited s~licon layer is present, no expansion of the space-charge zone 10 takes place at the periphery of the element. This means that there is no increase in the bloc~ing currents, that ls to say, the char~cteristics remain stable. ~hls also applies to b~ as~ng of the semiconductor element at the operating t~7p-erature~
Although the invention has been descri~ed wlth particular reference to a thyristor, it can equally be used for diodes and transistors, and for other semiconductor components.
:
-: - - . ~ - - - ~
,; . ,, ~ - ~. . ' ' ~
,, : ~ . . ' :
Claims (6)
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A semiconductor component comprising a semiconductor element made of silicon having at least one pn-junction, that extends up to the surface of the semiconductor element, and a passivating protective layer of silicon, that is deposited on the semiconductor element by evaporation of silicon at least at that point where the pn-junction comes to the surface of the semiconductor element, wherein the vapour-deposited silicon contains at least one reactive gas.
2. A semiconductor component according to claim 1, where-in the reactive gas is oxygen.
3. A semiconductor component as claimed in claim 1 or 2, wherein said vapour-deposited silicon layer contains one or more dopants.
4. A semiconductor component as claimed in claim 1 or 2, wherein said vapour-deposited silicon layer contains one or more metals.
5. A semiconductor component as claimed in claim 1 or 2, wherein the thickness of said vapour-deposited silicon layer is at least 0.1µ?m.
6. A semiconductor component as claimed in claim 1 or 2, wherein a further protective layer is arranged on said vapour-deposited silicon layer.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19762632647 DE2632647A1 (en) | 1976-07-20 | 1976-07-20 | SEMICONDUCTOR COMPONENT WITH PASSIVATING PROTECTIVE LAYER |
| DEP2632647.6 | 1976-07-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1101127A true CA1101127A (en) | 1981-05-12 |
Family
ID=5983502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA282,942A Expired CA1101127A (en) | 1976-07-20 | 1977-07-18 | Semiconductor component with protective passivating layer |
Country Status (10)
| Country | Link |
|---|---|
| JP (1) | JPS5313878A (en) |
| BR (1) | BR7704739A (en) |
| CA (1) | CA1101127A (en) |
| CH (1) | CH614809A5 (en) |
| CS (1) | CS202576B2 (en) |
| DE (1) | DE2632647A1 (en) |
| FR (1) | FR2359510A1 (en) |
| GB (1) | GB1580654A (en) |
| IT (1) | IT1076447B (en) |
| SE (1) | SE7708385L (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2730367A1 (en) * | 1977-07-05 | 1979-01-18 | Siemens Ag | PROCESS FOR PASSIVATING SEMICONDUCTOR ELEMENTS |
| CH661932A5 (en) * | 1978-09-18 | 1987-08-31 | Gen Electric | Process for the preparation of a coating composition for semiconductor components, this composition, and the use thereof |
| JPS55115386A (en) * | 1979-02-26 | 1980-09-05 | Hitachi Ltd | Semiconductor laser unit |
| DE2922005A1 (en) * | 1979-05-30 | 1980-12-04 | Siemens Ag | SEMICONDUCTOR COMPONENT WITH PASSIVATED SEMICONDUCTOR BODY |
| DE3021175A1 (en) * | 1980-06-04 | 1981-12-10 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR PASSIVATING SILICON COMPONENTS |
| DE3542166A1 (en) * | 1985-11-29 | 1987-06-04 | Telefunken Electronic Gmbh | SEMICONDUCTOR COMPONENT |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2789258A (en) * | 1955-06-29 | 1957-04-16 | Raytheon Mfg Co | Intrinsic coatings for semiconductor junctions |
| DE1184178B (en) * | 1960-02-20 | 1964-12-23 | Standard Elektrik Lorenz Ag | Process for stabilizing the surface of semiconductor bodies with pn junctions by vacuum evaporation |
| CH428947A (en) * | 1966-01-31 | 1967-01-31 | Centre Electron Horloger | Manufacturing process of an integrated circuit |
| JPS6022497B2 (en) * | 1974-10-26 | 1985-06-03 | ソニー株式会社 | semiconductor equipment |
-
1976
- 1976-07-20 DE DE19762632647 patent/DE2632647A1/en not_active Ceased
-
1977
- 1977-05-31 CH CH662677A patent/CH614809A5/en not_active IP Right Cessation
- 1977-07-08 GB GB28661/77A patent/GB1580654A/en not_active Expired
- 1977-07-13 IT IT25674/77A patent/IT1076447B/en active
- 1977-07-18 CA CA282,942A patent/CA1101127A/en not_active Expired
- 1977-07-18 FR FR7721891A patent/FR2359510A1/en active Granted
- 1977-07-19 CS CS774806A patent/CS202576B2/en unknown
- 1977-07-19 BR BR7704739A patent/BR7704739A/en unknown
- 1977-07-20 SE SE7708385A patent/SE7708385L/en unknown
- 1977-07-20 JP JP8721177A patent/JPS5313878A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| GB1580654A (en) | 1980-12-03 |
| BR7704739A (en) | 1978-04-18 |
| IT1076447B (en) | 1985-04-27 |
| CS202576B2 (en) | 1981-01-30 |
| CH614809A5 (en) | 1979-12-14 |
| DE2632647A1 (en) | 1978-01-26 |
| FR2359510A1 (en) | 1978-02-17 |
| FR2359510B1 (en) | 1982-12-31 |
| JPS5313878A (en) | 1978-02-07 |
| SE7708385L (en) | 1978-01-21 |
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