CA1083658A - Ballast circuit for accurately regulating hid lamp wattage - Google Patents

Abstract

BALLAST CIRCUIT FOR ACCURATELY
REGULATING HID LAMP WATTAGE

ABSTRACT OF THE DISCLOSURE
Circuit for regulating the wattage drawn by a high-intensity-discharge (HID) lamp and for limiting the line current drawn by the lamp during starting to less than the line current drawn during normal lamp operation. The circuit includes a lamp current controlling means which has two oper-ating modes, a first of which passes a less-than-nominal current to the lamp and a second of which passes a greater-than-nominal current to the lamp, with the ratio of the cur-rent of the second mode to the current of the first mode being less than 2:1. The lamp voltage is sensed and the line voltage also is sensed and these parameters are converted into separate current signals which are fed into a ramp cap-acitor to control the charging rate thereof. When the ramp capacitor achieves a predetermined level of charge during each half cycle of energizing potential, an AC switch is gated to shift the current controlling means from the first mode to the second mode. During lamp starting when the volt-age drop thereacross is relatively low, the current controlling means remains in the first mode for at least the substantial portion of each half cycle of energizing potential, and after the lamp is normally operating, the ramp capacitor control, coupled with the low ratio of relative currents passed by the current controlling means, provides for an accurate control of lamp wattage and excellent overall performance.
This application is a continuation-in-part of apply-cation S.N. 776,804 filed March 11, 1977 by Joseph C. Engel and Robert T. Elms, the present applicants, and owned by the present assignee.

Description

1~836~8 CROSS-REFERENCES TO RELATED APPLICATION AND PAT~NTS
In Canadian ~pplication Serial No. 329,809, filed June 14, 1979, and owned by the present assignee, is disclosed a variable inductance ballast apparatus ~or an HID lamp which comprises a laminated E-I core having non-magnetic gaps intermediate the E-conformed and I-conformed members. A main winding is carried on the leg of the E-conformed member to provide two closed magnetic paths, and a control winding is wrapped about another of the legs and encir¢les only one of the magnetic paths. When the control winding is closed, the resulting counter MMF decreases the inductance apparatus by a predetermined amount. Such a variable inductance ballast is particularly adapted for use with a control circuit as described herein.
In U.S. Patent No. 4,147,962, issued April 3, 1979 to Joseph C. Engel, and owned by the present assignee, is disclosed an illumination system which automatically dims the lamps after a fixed time period of operation at rated power input.
In U.S. Patent Mo. 4,147,961, issued April 3, 1979 to Robert T. Elms, and owned by the present assignee, is disclosed an illumination!system which operates lamps with a high degree of illumination during the early part of the night and automatically dims the lamps during the later part of the night when a lower degree of illumination can be tolerated. The relative period of time the lamps are operated at the higher and lower levels of illumination is automatically adjusted accordi~g to the day-night seasonal variations~

,~ . .
. ~

-2-- - .. - . .

108;~65~3 BACKGROUND OF THE INVENTION
This invention relates to ballast circuits for HID
lamps and, more particularly 9 to a ballast circuit which very accurately regulates the wattage of HID lamps, and particularly high-pressure sodium lamps, during prolonged operation thereof and which also limits the line current drawn by the lamp during starting to less that the line current drawn by the lamp during normal operation.
U.S. Patent No. 3,873,910 dated March 25, 1975 10 to Willis, Jr., discloses a variable inductor which includes ;~ -a main winding and a control winding positioned on opposite sides of a gapped shunt. The control winding is adapted to be closed by a gate-actuated AC switch, and upon closing, the inductance of the variable inductor is decreased by a predetermined amount? thereby controlling the power input ~ -to the ballasted lamp.
In U~S. Patent No. 4,037,148 dated July 19, 1977 to Owens, is disclosed a ballast device especially adapted to operate with a variable inductor as described in the afore-mentioned U.S. Patent No. 3,873,910 to ballast a high-pressure sodium discharge lamp wherein a non-linear amplifier is in-corporated in circuit. For actual control, lamp ~oltage and line voltage are sensed and these voltage signals are combined in a programmable unijunction transistor to control the firing time thereof, and thus the actuation of the gate-controlled

-3- -, 48,021 AC switch.
U.S~ Patent No. 3,886,405 dated May 27, 1975 to Kubo discloses sensing a variety of parameters in order to effect lamp control, including sensing both lamp voltage and line voltage to vary the impedance in circult with the lamp and thus regulate lamp power consumption. In the case line voltage is sensed, the sensed voltage is applied to a uni- ;
~unction transistor to control the firing time thereo~, as in the afore-mentioned No. 4,037,148.
In U.S. Patent No. 3,590,316 dated June 29, 1971, : ~:
to Engel and Elms, the applicants herein, is disclosed a transistorized wattmeter which is used to control a variable ; ~
impedance in order to control lamp wattage. The wattage is `` ' measured electronically and is converted into a current signal which is used to charge a ramp-type capacitor which in turn controls the firing oP a gate-controlled AC switch when a predetermined voltage is achieved across the capa-citor. ;i Lamp starter circuits for high-pressure sodium 20 lamps are well known such as described in U.S. Patent No.

4,072,878 dated February 7, 1978 to J. C. Engel and G. F.
Saletta.
SUMMARY OF THE INVENTION ~ I
There is provided an operating circuit for con- ;
trolling at about a predetermined nominal rated value the wattage drawn by an HID lamp during normal operation thereof and for limiting the line current drawn by the lamp during starting thereof to less than the line current drawn by the lamp during normal operation thereof. The lamp has the 3o usual terminals and a nominal rated operating voltage and ` ~
~3~S8 1l8,02l `

current. The circuit comprises the following elements:
Input terminals are adapted to be connected to an AC line voltage source having a predetermined nominal rating and output terminals are adapted to be connected to the lamp terminals, with a conventional power factor capacitor of predetermined rating desirably connected in circuit there-with.
A current controlling means is included in circuit intermediate the input terminals and the output terminals, lO and the current controlling means has a first operating mode ;
ln which a current less than the lamp nominal operatlng current is passed to the output terminals and through the lamp as connected thereacross. The current controlling means also has a second operating mode in which a current greater than the lamp nominal operating current is passed to ~ -the output terminals and through the lamp as connected thereacross. The ratio of the magnltude of the current passed to the output terminals in the second mode to the magnitude of current passed to the output terminals in the first mode ls less than 2 A switch is aperable to switch the current con-trolling means between the two operating modes thereof during each half cycle o~ the AC line voltage and the switch comprises a gate-controlled AC switch together with a ramp ;
capacitor of predetermined ratlng in circuit with the gate of the AC switch and operable to ef~ect the gating of the switch when a predetermined voltage slgnal is developed across the ramp capacitor. ~`
A line voltage sensing means measures the magni-tude of the AC line voltage and generates a first current

-5-.

- "
48,021 ~
~;~83~S~

signal, the magnikude o~ which is indicative of the devia-tion of line voltage from nominal, with the first current signal feeding into the ramp capacitor durinK each halP
cycle of AC line voltage.
A lamp voltage sensing means measures the voltage drop across the lamp both during startup when the voltage ~ ;
drop thereacross is relatively small and also during normal lamp operation and there is generated a second current signal, the magnitude of which is indicative of the devia-tion of operating lamp voltage from nominal, with the second current signal also feeding into the ramp capacitor during each half cycle of AC line voltage.
Means are provided to discharge the ramp capacitor to a predetermined potential at a predetermined time in each half cycle of the AC line voltage and the ramp capacitor is thereafter charged in the same half cycle, with the time in-terval, in each half cycle of the AC line voltage which is required to develop the AC switch gatlng signal being deter-mined by the cumulative charge delivered to the capacitor by the first current signal and the second current signal.
During startup of the lamp, the second current signal which corresponds to lamp voltage has a minimal value due to the low voltage drop across the lamp and this pro-vides at most only a slow voltage variation in the charge on the ramp capacitor which maintains the current controlling means in the first operating mode for at least a substantial portion of each half cycle of the AC line voltage. After the lamp is normally operating with approximately nominal voltage drop thereacross, the predetermined capacitance of the ramp capacitor coupled with the cumulative charge de-48,021 livered thereto by the first current signal and the second current signal coupled with the relatively small ratio of current passed by the current controlling means in the second mode to current passed by the current controlling means in the first mode providing a stable and accurate -control of wattage drawn by the normally operating lamp.
BRIEF DESCRIPTION OF THE DRAWINGS
For a better understanding of the invention, reference may be had to the preferred embodiment, exemplary of the invention, shown in the accompanying drawings, in which:
Flgure 1 is a connection diagra~m for the present operatlng ballast circult;
Figure 2 is a simplified diagrammatic sketch of the preferred variable inductor used as a part of the pre- `
sent apparatus;
Figure 3 is a circuit diagram of a portion of the control device with integrated circuit chips shown therein in block form; and Figure 4 is a detailed circuit diagram for the integrated circuit chip which completes the control device.
DESCRIPTION OF_THE PREFERRED EMBODIMENTS
With re~erence to the schematic circuit shown in Figure 1, this comprises an operating circuit 10 for con-trolling at about a predetermined nominal rated value the wattage drawn by a high-intensity-discharge lamp means 12 during normal operation thereof and for limiting the line current drawn by the lamp means during starting thereof to less than the line current drawn by said lamp means during normal operation thereof. The lamp 12 has terminals 14 and :' :

., . ~, ... ..

~83~S8 a nominal rated operating voltage and current. As a speci-fic example, the lamp is a high-pressure sodium lamp having a nominal rating of 250 watts, a nominal rated voltage of 100 volts, and a nominal current of 3.0 amperes. The cir-cuit 10 comprises input terminals 16 adapted to be connected to an AC line voltage source 17 having a predetermined nominal rating such as 240 VAC., and output ter~inals 18 are adapted to be connected to the lamp terminals. A po~er-factor capacitor means 20 rated at 330 VAC, 2~.2 ~f deslr-ably is connected in circuit therewith although the capaci-tor 20 can be omitted, if desired.
A current controlling means 22~is connected in circuit intermediate the input terminals 16 and the output terminals 18, and the current controlling means has a first operating mode in which a current less than the lamp nominal operating current is passed to the output terminals and through the lamp as connected thereacross, and the current controlling means also has a second operating mode in which a current greater than the lamp nominal operating current is passed to the output terminals and through the lamp as connected thereacross. In accordance with the present invention, the ratio of the magnitude of current passed to the output terminals and through the lamp in the second mode to the magnitude of current passed to the output terminals and the lamp in the first mode is less than 2:1, for reasons explained hereinafter. A preferred current control~ing means is shown in Figure 2 and this constitutes a variable reactor 22 as described in detail in the aforementioned Canadian application Serial No. 329,~09, filed June 1 1979. The current control j :, . . . .. .

~ 8 l~8,021 ling means thu~ compris~s a -~riab~e reactor where:~n t~le connections II and ~I are ~or the .r~aln winding 24~ the connections ~V and ~ are ~or the contr~l winding 26 3 and the connections II and lII are for the starting winding 28. As a specific example, the gaps 30 are each 889 mlcrons and the gap 32 is 4.064 mm. The connectlon points II-VI are shown in each of Figures 1, 2 and 3. ~ith the control winding open, ~or a 240 volt line, the reactor 22 will pass a cur-rent of 2.6 amperes to the connected lamp and with the control winding shorted, the reactor will p2SS a current of 4.6 amperes to the connected lamp.
In Figure 3 is shown a circuit diagram of the basic control unit, with the integrated circults or IC chips shown ::
therein in block ~orm, with numbered pins shown on ~Cl. For purposes of a description, the circuit will be broken down into the various functions which are performed3 with each portion identified by an appropriate letter designation.
POWER SUPPLY - .A
The power supply comprises two half wave diode rectifiers in order to produce a plus and a minus power supply. The current islgenerated through R308 and directed through the diode D3 for the positive power and through the diode D4 for the negative power supply. C4 and C5 filter these rectified currents to produce the DC voltages, with resistors R309 and R311 and Zeners Zl and Z2 providing the voltage regulation.
: LINE ~OLTAGE SENSI~G - ~ :
R3Q4 and R305 provide a Yoltage div~der and the divided v~ltage is peaX rectlfied by D2 and ~iltered b~ C3 and ~31q to provide a current which is proportional to line _g_ .. . . .. ..... . .

4~,021 ~836~3 volta~e~ less a re~erence Yoltage? ~hich current ls fed into the integrated clrcuit chip a~ Pin 1.

LI ~ ~OLT~CT~ Z~ R~SET - C
~30~, R3~2, R32/
Component~a~ ~&~ are an R-C phase shifting net~ork. This produces a very slight phase shift in order to provide a voltage which slightly leads the line volt-age for purposes of reset. Essentially the resistors and cap-acitors of this circuit portion merely provide a slight RC
phase shift, with the voltage input being applied to the integrated circuit at pin 4.
BIAS AND REFERENCE CURRENTS - D
The resistor R313 provides both bias ancl reference currents to the IC chip. The current through R313 also con-stitutes what amounts to a re~erence current which ls used for control.

~NER~IY STORAGE FOR ~ATE PULSE
AND HALF CYCLE TIMlNG - E
Pin 5 on the IC chip is charged negatively with respect to ground to approximately the negative power supply level. When it is desired to gate the AC switch, Q3019 all of the energy ~stored in C6 is discharged through pin 6 to the gate termlnal "g" of triac Q301. This discharge occurs in ~ rP 0 ~ cly less than ppr~ximatoly 10 mircroseconds. R303 and C2 which parallel Q301 provide for positlve operation of the triac.
The tlming of the discharge of C6 is accomplished by C7 which is charged through pin 3 by IC chip current sources, and ~hen the charge on C7 reaches approximately 7 volts~ the AC switch Q301 is triggered. C7 thus constitutes the ramp charging capacitor which provides the very large phase shifts in the triggering of ~he AC switch ~h~ch the -10- ~, - . . .. .. . , ,. : . , 48,021 , ~336~8 present ballast provides.
LAMP VOLTA~E SENSING - F
The voltage drop across R317 is related to peak lamp voltage and this is peak-detected through D6-R316 and ~ -~
stored in C10. The voltage is then converted to a current through R315 and divided through pins 12 and 15. Pin 12 is -';
effective during lamp startup and works through the chip (ICl) to minimize the time that the AC switch Q301 is on ~; ; -during lamp warmup, and after the lamp ls normally operating the current input to pin 15 is primarily effective to con-trol the operation of the AC switch through the chip ICl. ;
LA~P STARTER - G
The lamp pulse starting means (block G) has an output or starting winding 28 comprising a few turns of the main winding 24 to constitute an autotransformer therewith.
As a specific example, the main winding has 400 turns and the starting winding 28 has forty turns. A starting capaci-tor means Cll is adapted to charge upon inltial connection of the operating circuit to the AC source or line and then to discharge through the starting winding 28 when a prede-termined voltage level of 180 volts is achieved. The result-ing autotransformer function generates a high voltage start-ing pulse such as 1800 volts in the main winding 24 and across the lamp 12 to initiate the discharge therein. After the lamp 12 is operating, the starting capacitor Cll is never charged to the level at which it will discharge, thereby rendering the starting clrcuit inoperative.
More specifically, when the capacitor voltage exceeds the Zener voltage o~ Z3, SCR Q302 is trlggered which causes a high voltage pulse to appear across the lamp because 48,021 ~L~83~

of the autotransformer relationship of the main inductor 24, 28 (Figures 1 and 2). This breaks down the discharge path to start the lamp 12 and once the lamp ls operating, the lamp voltage drop never exceeds the Zener breakdown voltage of Z3 so that the lamp starter mechanism is thereafter essentially removed from the circuit.
AC SWITCH VOLTAGE SENSING - H
This is a voltage divider-resistor arrangement provided by resistors R306 and R307 whose function ls to reduce the AC switch voltage sufficiently to ensure that no damage will occur to the IC chip.
CLOCK MECHANISM - I
R320 and C8 provide the RC timing and the chip ICl provides clock pulses to the binary counter of the clock mechanism, shown as a chip IC2. Such a chip is commercially available from R.C.A. under the designation CD4020AF. Other similar chips can be substituted therefor. When the binary counter counts up to 214 pulses, the clock mechanism gen erates a signal which is fed back into the chip ICl in order to cause a dimming of the lamp. When llne power ls removed, such as by a momentary failure, or the opening of the photo-control switch on a standard luminaire, R314 and C9 act to reset the counter back to zero so that full power cycle operation for the lamp is again initiated and continues for another four hours. This prevents random startup of the lamp and controls the functioning of the timer. The use of the binary counter as a lamp dimmer does not form a part of the present invention and such structures are described in the aforementioned U. S. Patent 1~,1471962 and UO .~. Patent No~ 49147,961.

48~021 ~3~i8 For a specific i~entification of each of the cir-cuit components as shown in Figure 3, reference should be ; , made to the ~ollowlng component chart identified as Table I, TABLE I
Comp. Value % Tbl. pe Mfg. (or e~uiv~
R301 lM 1/2W 5 Carbon Comp. Ohmite R302 lOOK 1/4W 5 SEB Deposited Carbon R303 lK lW 5 Carbon Comp. "
R304 240K 1/2W 5 Carbon Comp. "
R305 25K Pot. 1/2W20 375 Cermet ~rimmerC.T.S.
R306 lM 1/2W 5 Carbon Comp. Ohmite R307 lM 1/4W 5 SBB Deposited Carbon "
R308 56K 2W 5 Carbon Comp. "
R309 2K 1/4W 5 S~B Deposited Carbon "
R310 lOOK 1/4W 5 " " " " `
R311 2K 1/4W 5 " " " "
R312 750 1/4W 5 " " " "
R313 120K 1/4W 5 " " " "
R314 lM 1/4W 5 " " " " ;
R315 750K 1/4W 5 " " " "
R316 lK 1/4W 5 " " " "
R317 1.2K 1/4W 5 " " " "
R318 lK 1/4W 5 " " " "
R319 lOK 8W 5 200 Wire Wound "
R320 IM 1/4W 5 SBB Deposited Carbon "
R321 lM 1/2W ! 5 Carbon Comp. "
Cl .01 MFD 50V MW50 Polyester Paktron C2 .068 MFD 600V PS Iubular Sangamo C3 1.0 MFD 35V 196D Solid Iantalum "
C4 10 MFD 15V " "

C6 .047 MFD 5~V MW50 Polyester Paktron C7 .01 MFD sav C8 3.3 MFD 15V " " ~7 C9 1.0 MFD 35V
C10 1.0 MFD 35V " " "
Cll 0.15 MFD 40~V PKM TubularCornell Dubilier C12 470 P~. 500V Ceramic " "
-13- ;`^`

3~3 48~021 TABLE I - Cont'd.
~ Value % Tol. Type l!~g. (or equiv.) D2 IN457 Texas Instrument D3 ' D4 " " "
D5 IN469 ~- "
D6 "
D7 IN457 " "
Zl 10 VoltsIN961 " "
Z2 8.2 VoltsIN959 Z3 180 VoltsIN991 " "
Ql Q6010 Teccor -Q2 C106B "
IC2 CD4020AF R.C.A.
GENERAL IC CHIP DESCRIPTION
The complete circuit diagram for the custom chlp ICl is shown in Figure 4. All of the resistors which are numbered in the 200 range are included purely for purposes of chip interconnections and serve no other circuit f'unc-tions. Reslstors whlch do serve circult f'unctions are ~;~
numbered from Rl to R34.
BIAS CURRENT SECTION - J
Bias current is in~ected into pin lO through R313 (Flgure 3) and develops a voltage at the base of Q7 whlch constltutes a blas level for a multiplicity of transistors.
This bias level is one base-emitter ~unction drop (Q8) plus the voltage drop across R9. This current source essentially serves all NPN transistors. The current from Q7 is fed to Q105 and develops the current sources for all PNP transis-tors.
TIMED PULSE GENERATOR - K
C8 charges through R320 (see Figure 3) untll C8 !

~ ' ' 48~021 ~, ~ 33'~'5;8 reaches the breakdown of Q3, at which point Q2 conducts to turn on Ql, which regeneratively turns on Q4 and Q103. Thls discharges C8 (see Figure 3) which pulls R4 toward the level of the negative power supply. When C8 is discharged to a level of about 2 volts, Q4 and Q103 regeneratively turn off.
During the time C8 is being discharged, Q1 and Q4 are turned on and Ql produces a low signal at pin 13 which provides the clock input pulse. When Ql and Q4 turn off, Q101 pulls the pin 13 toward the positive power supply. The pulses are then timed by R320 and C8 to about 2 seconds. Thus the function of the timed pulse generator essentially relates to energlzing the clock circuit, which need not be used and need not be included in the circuit if lamp dimming is not to be provided.
TRIAC TRIGGERING - L
The energy storage capacitor (C6 in Figure 33 is tied to pin 5 and this is at the negative voltage level as previously described. Pin 6 is tied to the gate of the triac Q301 and when a trigger condition occurs, current is pulled through Q31 to the bases of QllO and Q22, causing QllO, Q22, Q23, and Q24 to regeneratively turn on. This produces a very low impedance between pin 6 and pin 5 and discharges C6 to the control terminal or gate of triac Q301 (Figure 3). Q27 which is tied to pin 5 is used to charge C6 from the negative power supply.
GATE DRIVE INHIBIT CIRCUIT - M
It is desirable to withhold any gate drive until the AC switch is in a nonconducting state and this circuit achieves that function. The voltage at pin 9 is provided by the voltage divider R306, R307 as previously descrlbed.

~ , , , ~

~ ~836~8 l~8~021 When the ~urrent from the voltage divider R306 R307 is negative and in excess of approximately 14 volts, current flows through Q13 and Q25 in the reverse direction and through Q26, and by virtue of the base-emltter matching, Q112 carries a current equal to Q113 which flows into the base of Q34, provided a gate pulse is required at that point in time If a gate drive is not required, Q20 is turned on and this sorts out any signals. To trigger the AC switch, the current through Q34 is mirrored by virtue of the base-emitter ~unctions in order to provide a signal to turn onthe triac trigger which shorts pin 6 to pin 5 to discharge the capacitor C6 into the triac gate terminal to trigger same. When the AC switch voltage is positive and in excess of about 14 volts, current ~lows through Q26 ln the reverse direction and then through Q5, then through Qlll into Q34 and the operation thereafter is as previously descrlbed RAMP TIMING P~IASE CONTROL
FOR TRIAC TRIGGER - N
Pin 11 is at ground potential and the tlming or ramp capacitor means C7 (Figure 3) is tled from pin 11 to pin 3. Numerous internal current sources, as will be des-cribed hereinafter, are tied to pin 3 to control the charg-ing rate of the ramp capacitor C7. Q108 is a constant current source as is Q15 with the current provided by Q15 being twice that provided by Q108. Whenever the voltage ; charge on Q7 is less than the Zener voltage drop of Q17, the current from Q15 flows through Q18 and to ground. When the capacitor voltage C7 equals or exceeds the Zener voltage of Q17, the current from Q15 flows through Q17 and Q]6 to the emitter resistor R20 tled to Q108. Under these conditions, ~ 48,021 ~
~8~i51~ -Q108 is non-conducting. With Q108 non-conducting, Q20 receives no base drive and is non-conducting and this per-mits the drive from the AC switch voltage to trigger the triac at a predetermined time. When the voltage at capaci-tor C7 is less than the Zener breakdown of Q17, however, Q108 is conducting and this turns on Q20 which shunts the current signal ~rom the AC switch to ground, thereby pre-venting triggering of the triac Q301 (Figure 3). `
LINE VOLTAGE ZERO RESET - O
The input signal to pin 4 is obtained from the RC
network previously described under Figure 3 entitled "Line Voltage Zero Reset". When thls voltage l~s in excess of approximately 60-70 volts, current will flow through Q6 ln reverse direction and through Q5 into the base of Q10. Q10 is thus turned on which shorts the bias current flow nor-mally flowing into Q29 to ground, which turns Q29 of~. In the negative direction, when the line voltage exceeds minus 60-70 volts, current flow is from ground through Q106 through Q5 in the reverse direction and through Q6 to pin 4. Thls causes Q106 to be turned on, again shorting the base drive to Q29 to turn same off. Whenever the line voltage i9 within the limits o~ plus or minus 60-70 volts, no current flow occurs in pin 4 which means that both Qlo and Q106 are in a non-conducting state and this permits the bias current of Q116 to flow into the base of Q29 causing it to be in a low impedance state and this resets the capacitor C7 tied to pin 3 to ground level.
LINE VOLTAGE SENSING - P
The voltage at the negative terminal of C3 (Figure ; 30 3) is proportional to the line voltage and the voltage ~ -17-,~ :

~ 836~8 118,021 across R310 (Figure 3) ls equal to khe voltage across C3 mlnus the Zener voltage drop of Q12. Therefore, the current through R310 flowlng into pln 1 is proportlonal to the line voltage less a reference. Thls current then flows through Qll and into pin 3, which causes the capacitor C7 to charge at a slower rate wlth lncreaslng line voltage and at a higher rate with decreasing line voltage.
LOW LAMP VOLTAGE (STARTING CONDITION) - Q
When the voltage at the negatlve terminal of C10 (Figure 3), whlch is proportional to lamp voltage, is less than approximately 14 volts, all o~ the currenk flow through R315, which is proportional to ~he volta~e across C10, flows into pin 12. This current ~lows through Q28 into Q114 which is mlrrored by the base-emltter ~unction matching to current flow Q115 lnto pin 3. This in turn causes the capacitor C7 to charge at a higher rate as the lamp voltage increases.
As a result, during lamp warmup, when the lamp voltage ls very low, C7 charges at a very slow rate thereby triggering the triac Q301 (Flgure 3) at a much later tlme ln each half cycle which minimlzes lamp current durlng warmup. The overall effect is to limit the line current drawn by the lamp during the starting thereof to less than the line current drawn by the lamp during normal operation thereof and this is desirable from an installation and lamp perfor-mance standpoint.
HIGH LAMP VOLTAGE SENSING - R
.
After the lamp is normally operating, when the voltage at the negative terminal of C10 (Flgure 3) exceeds about 14 volts, any further increased current flows through R315 (Figure 3) into pin 15 and the current flowing into pin 1~8,,021 ' 1~3~S~3 ~

15 is proportional to the lamp voltage minus the reference voltage of Q14 which is acting as a Zener reference. This current ls conducted through Q13 to the emitter Or Q107 and this subtracts from the normal emitter current of Q107 with ~`
the following result: As pin 15 current increases, the current through Q107 flowing into capacitor C7 (Flgure 3) through pin 15 causes C7 to charge at a slower rate, whlch ~
of course has the effect of decreasing the average current -drawn by the operating lamp. ~.
Summarizing the foregoing operation, the rarnp capacitor means, C7, is in circuit with the gate of the AC
switch means (Q301) and is operable to effect gating of the swltch means when a predetermined voltage signal is devel-oped across the ramp capacitor. The line voltage is sensed and there is generated a first current slgnal, the magnitude of which is indicative of the deviation of line voltage from nominal, with the first current signal feeding into the ramp capacitor during each half cycle of the AC line voltage. A
lamp voltage sensing means measures the voltage drop across the lamp~ both during lamp startup when the voltage drop thereacross is relatively small and also during normal lamp operation, and there is generated a second current signal, -the magnitude of which is indicative of the deviation of operating lamp voltage from nominal, and the second current signal also feeds into the ramp capacitor C7 during each half cycle of the AC line voltage.
As described hereinbefore, the line voltage zero reset portion of the circuit resets the ramp capacitor C7 to a predetermined potential at a predetermined time in each half cycle o~ the AC line voltage, and the ramp capacitor is ~3~58 48,021 thereafter charged in the same half cycle, with the time interval in each half cycle in the AC line voltage which is required to develop an AC switch gating signal being deter-mined by the cumulative charge delivered to the ramp capaci-tor C7 by the first current signal which ls indicative of line voltage and the second current signal which is indica-tive of lamp voltage. Of course, during startup of the lamp, the second current signal which is indicative of lamp ~:
voltage has only a minimum value due to the low voltage drop across the lamp, which provides at most only a 810w voltage variation in the charge on the ramp capacitor which main-tains the triac Q301 open and which in turns maintains the inductor 22 ln the first or high reactance mode for at least the substantial portion of each hal~ cycle of the AC line voltage. After the lamp is normally operating with approxi-mately nominal voltage drop thereacross, however, the prede~
termined capacitance of the ramp capacitor C7 coupled with the cumulative charge delivered thereto by the first current signal and the second current slgnal, indicative of line voltage and lamp voltage, coupled with a relatively small ratio of current passed by the variable inductor in its two operating modes provides for a stable and accurate control of wattage drawn by the normally operating lamp, wlth the current inputs to the ramp capacitor providing a very sensitive and accurate control which can be varied over a substantial portion of each half cycle of energizing poten- .
tial.
Remaining sections of the chip ICl~ which is ~:
custom designed, deal with lamp dimming such as might be used by stage lighting and form no part of the present r ,. . . ..
~ I '. . . ` ., ' , ~ "

~836~8 48,021 invention. This will be briefly described hereinafter, however, so that the description will be complete.

LAMP DIMMING CIRCUIT WHICH FORMS
NO PART OF PRESENT INVENTION - S
The squaring circuit (S) operates as ~ollows: With a positive current flow into pln 1, Q118 conducts into Q41 and Q42 and Q41, Q42, Q43 and Q47 constitute a logarlthmic multlpllcation circuit wherein Q47 is the constant current source. Q43 therefore produces a current which is propor-tional to the input current squared divided by a constantcurrent. The resultlng network, that ls, that the resistor-transistor Q44, Ql16, Q45 network is to produce a constant current ln Q47. The current through Q43 iB then conducted through Q40 and ls ~iltered by a capacitor (not shown) tied to pin 2 and the resistor 30. A current through Q40 then flows directly into the timing capacitor C7 which of course controls the triac Q301 and thus the dimming of the lamp.
SQUARE ROOTING CIRCUIT - T

- :
This also ls a part of the dlmming circuit and 20 when positive current flows lnto pin 12, lt ls conducted ;
through Q117 and Q36 by the mirror clrcult of Q48 and Q39 to circult ground. Thus the current through Q36 is proportional to the current enterlng pin 12. The current through Q35 i9 a constant current produced by Q102. Q35, Q36, Q37, and Q38 ~orm a logarithmic multiplier with the feature that the current through Q37 is equal to current through Q38, which i~ equal to the square root of the current through Q36 times the constant current in Q35. Thus the output current is proportional to the square root o~ the input current. The ;~
current through Q37 flows into Q114 and is mirrored into ~.

. . .

~ 3~S~ 48,021.

Q115 to pin 3 to charge the capacitor C7. In the foregoing circuit, the lamp voltage is squared to develop a signal in order to charge the timing capacitor to phase control the lamp. Squaring the lamp voltage to develop a signal pro-vides a better control of the lamp brightness. In the square rooting circuit, the functional effect is to provide what essentially is a linear relationship between control voltage and light output. Thus the present dimming circuit enables two types o~ control to be achieved, namely, a linear light relationship which is valuable for use with cameras and an apparent light relationship which can be used in stage llghting for human response.
GENERAL DESIGN CONSIDERATIONS
As a general comment, lt is desirable to minimize the size of the lamp ballast inductor from an expense stand-point and to provide an inductor with as little voltage drop ~`
across it as possible, commensurate with reasonable regula-tion. With a large change in inductance in the inductor, lamp starting currents tend to be excessive and to minimize lamp starting currents, it is highly desirable to limit the change~ in inductance to a relatively small ratio, i.e., less than 2:1. This in turn requires a very large phase shift control, especially where high pressure sodium lamps are involved, to adequately control the power into the lamp throughout its life where increases in lamp voltages with life can normally be anticipated. The present circuit achieves these obJectives.
To complete the description of the custom chip ICl, shown in Flgure 4, precise values for all components 3 thereof are set forth in the following Table II.

-- . . , . . , ............... .. , ....................... :
, .; ~ : , ~8365~ 48j021 ~

TABLE II
Component Value Rl 3.15K

R3 2.7K

R5 3.6K
R6 450 Q ;~
R7 3.6K
R8 gooilL ~;
R9 1.8K

Rll 3.6K
R13 3.6K `i R14 3.6K
R15 1.3K
R16 3.6K
R17 1.8K
R18 4.95K
Rl9 3.6K
R20 4~05K

R22 7.9K
R23 1.8K
R24 6.75K ;
R25 10.4K
R26 , 900f~
R27 3.6K
R28 3.15K
3 R29 1.35K
R30 3OK (Pinch) R31 13OK ~Pinch) R32 130K (Pinch) R33 30K (Pinch) R34 1.35K
C200 (connection resistors) R201 1.35K
R202 1.8K
R203 ~OO~L

j : ; , . ;
., : : . ~ .,: . . . -, . . .

~8365~ 48,021 TA~L~ Cont'd.
Componenk ~lue R204 ' 3.6 R206 450 n R207 200 n ~208 400n ~`, R20~ 2.7K ,~j R210 1.8K
R211 1.35K
R212 200Q .;~:
R213 200Q ' R214 1.35K
R215 3.6K :
R216 4soQ
R217 5.4K
R218 1.8K ; : ~:

R220 3.6K
R221 700n :-R(C and 201-221) resistors are included in chip to facilitate fabrication and not for circuit operation.
Schottky diodes are rated at 100 micro :. -amps forward current, 20V blocking.
All transistors rated at 20V collector-emitter breakdown.
Large NPN (Q5, Q24) rated at 200 ma; other NPN ~1-50 series) rated at 20 ma; PNP (100 series) rated at 2 ma. ! : :
,~

~ ' ' ' ' ' ' ,' ,:;
~`"' ! :
:

Claims (4)

CLAIMS:

1. In combination, an operating circuit for con-trolling at about a predetermined nominal rated value the wattage drawn by a high-intensity-discharge lamp means during normal operation thereof and for limiting the line current drawn by said lamp means during starting thereof to less than the line current drawn by said lamp means during normal operation thereof, and said lamp means having lamp terminals and a nominal rated operating voltage and current, said circuit comprising:
a. input terminals adapted to be connected to an AC line voltage source having a predetermined nominal rating, and output terminals adapted to be connected to the terminals of said lamp means;
b. current controlling means in circuit intermediate said input terminals and said output terminals, said current controlling means having a first operating mode in which a current less than said lamp means nominal operating current is passed to said output terminals and through said lamp means as connected thereacross, said current controlling means also having a second operating mode in which a current greater than said lamp means nominal operating current is passed to said output terminals and through said lamp means as con nected thereacross, and the ratio of the magnitude of current passed to said output terminals and said lamp means in said second mode to the magnitude of current passed to said output terminals and said lamp means in said first mode being less than 2:1;
c. switch means operable to switch said current controlling means between said two operating modes thereof during each half cycle of said AC line voltage, said switch means comprising a gate-controlled AC switch, and ramp capacitor means of predetermined rating in circuit with the gate of said AC switch means and operable to effect the gating of said AC switch means when a predetermined voltage signal is developed across said ramp capacitor means;
d. line voltage sensing means for measuring the magnitude of said AC line voltage and generating a first current signal the magnitude of which is indicative of the deviation of line voltage from nominal, and said first current signal feeding into said ramp capacitor means during each half cycle of said AC line voltage;
e. lamp voltage sensing means for measuring the voltage drop across said lamp means both during lamp startup when the voltage drop thereacross is relatively small and also during normal lamp operation and generating a second current signal the magnitude of which is indica-tive of the deviation of operating lamp voltage from nominal, and said second current signal also feeding into said ramp capacitor means during each half cycle of said AC line voltage;
f. means for discharging said ramp capacitor means to a predetermined potential at a predetermined time in each half cycle of said AC line voltage, and said ramp capacitor means thereafter being charged in the same half cycle a with the time interval in each half cycle of said AC line voltage which is required to develop said AC switch gating signal being determined by the cumulative charge delivered thereto by said first current signal and said second current signal; and g. during startup of said lamp means, said second current signal having minimal value due to the low voltage drop across said lamp means to provide at most only a slow voltage variation in the charge on said ramp capacitor means and to maintain said current controlling means in said first mode for at least the substantial portion of each half cycle of said AC line voltage, and after said lamp means is operating normally with approximately nominal voltage drop thereacross, the predetermined capacitance of said ramp capacitor means coupled with the cumulative charge delivered thereto by said first current signal and said second current signal coupled with the relatively small ratio of current passed by said current controlling means in said second mode to current passed by said current controlling means in said first mode providing a stable and accurate control of wattage drawn by said normally operating lamp means.

2. The combination as specified in claim 1, wherein said lamp means comprises high-intensity-discharge sodium lamp means, and power factor capacitor means of predetermined rating is connected in circuit with said operating circuit.

3. The combination as specified in claim 29 wherein said current controlling means comprises a variable inductor in series with said AC source and said lamp means, said switch means is electrically connected in series with a control winding on said variable inductor, said switch means when closed causing a current to flow in said control wind-ing on said variable inductor to decrease the reactance thereof and place same in said second operating mode, and said switch means when open preventing current flow in said control winding on said variable inductor to increase the reactance thereof and place same in said first operating mode.

4. The combination as specified in claim 3, wherein said variable inductor includes a main winding, lamp pulse starting means having an output winding comprising a few turns of said main winding to constitute an autotrans-former, starting capacitor means included as a part of said lamp starting means and adapted to charge upon initial connection of said operating circuit to said AC source and then to discharge through the output of said lamp starting means when a predetermined voltage level is achieved across said starting capacitor means, with the resulting autotrans-former function generating a high voltage starting pulse in said main winding and across said lamp means to initiate a discharge therein, and after said lamp is operating, said starting capacitor means is not charged to the predetermined voltage level at which it will discharge thereby to render said lamp starting means inoperative.