CA1057412A - Semiconductor device and method of manufacturing same - Google Patents

Semiconductor device and method of manufacturing same

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Publication number
CA1057412A
CA1057412A CA250,679A CA250679A CA1057412A CA 1057412 A CA1057412 A CA 1057412A CA 250679 A CA250679 A CA 250679A CA 1057412 A CA1057412 A CA 1057412A
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CA
Canada
Prior art keywords
zone
groove
doped
base
collector
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA250,679A
Other languages
French (fr)
Inventor
Walter H. M. M. Smulders
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
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Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Application granted granted Critical
Publication of CA1057412A publication Critical patent/CA1057412A/en
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/732Vertical transistors
    • H01L29/7325Vertical transistors having an emitter-base junction leaving at a main surface and a base-collector junction leaving at a peripheral surface of the body, e.g. mesa planar transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Bipolar Transistors (AREA)

Abstract

ABSTRACT:

A high voltage transistor having successively an emitter zone, a highly doped base part, a low doped base part, a low doped collector part and a highly-doped collector part.
At a distance from the highly doped base part, a groove is provided which extends down into the highly doped collector part and forms therebelow a channel stopper. The groove may be passivated with neutral, or, if desired, with positively charged glass or oxide while still maintaining a high collector-base breakdown voltage.

Description

- PHN. 8~11.

The invention relates to a semiconductor devi oe having a semioon~uctor body comprising at least a transistor having an emitter zone of a first conductivity type adjoin-ing a substantially flat surface of the body, a base zone of' the second conductivity type which adjoins said surface, sur-rounds the emitter zone entirely and forms therewith a first E~n junction which terminates at the surface, and a collector zone of the firs~ conductivity type which adjoins the base ~
zone, f~rms with the base zone a second E~n junction which ; ~' extends substantially parallel'to the'surface, the base zone oomprising a more highly doped first part which surrounds the "
.. .
emitter zone entirely, forms therewith the first ~n junction, and a lower and substantially homDgeneously doped second part -which adjoins the'collector zone and forms therewith the second ~n junction, the'two parts of the base zone mutu~lly '~
forming a junction termdnlting at the'surface, a recess which ' ;
surr~unds the'base zone entirely and intersects the second p-n junction being provided'in said Æ face.
m e i~vention furthermore relates'to~a method of m~nu~acturing such 'a device.' ' A semiconductor device as described above ls known :: j . . . .
frGm British Patent Specification I,098,760 - Sony Corporation ~ - ~
.~ ., .
- ~anuary 10, 1968.
In order to obtain a high v~lta~e transistors collector-base:breakdown voltages'which are as high as poss.ible, :~
~he breakdown should preferably occur within the semiconduc~or material instead o~ at the surfaoe. In order to achieve this, . ., ~
various measures have been'pr~posed in the'course of time. ~ ..
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One of the best known and most frequently used measures is the bevelling of the edge fa oe of the semiconductor wafer in which the transistor is pr~vided at such an angle that the field strength at the edge face at the area of the line of intersection with the collector base junction is reduced. One of the drawbacks of this method is that the passivation of the oollector-base junction presents difficulties. Nor can this method be used for the manufacture of planar high voltage transistors.
Hcwever, high voltage transistors having a planar ' ~ ~' or quasi-plan æ structure æ e often desired. This is the ca~e -;~
inter alia when such a transistor is to be oo~bined with one or more other circuit elements to form a monolithic integrated '~
circuit. In the case of transistors ha~ing an entirely planar ' structure, hcwever, it is substantially impossible to obtain very hi~h collector-base bre~kdbwn vDltages, since the~breakdown ' ;~
will occur either at the sur~ace, or at the considerably curved edge of the ~_ junction below the surface where the field `~
strength is considerably higher than in the flat part of the E~n '' junction ext:nding parallel'to the surface. ; ' ' It has been endeavoured (see, for example, United States Patent Specification 3,463,'681 Winstel et al - August 26, 1969) to improve this by first manufacturing a planar ' ~
collector-base junction terminating at the'flat surface of ~` ' the silioon wafer'and then etching a recess, ~or example a ;' ' gm ove, in the surface at ~he area of the edge of the ~n - ~ ' junction so that the oonsiderably curv~d edge part of the ~n '~
junction disappears and only the'substantially flat ~ '~
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part of tlle junction wliich extends parallel to the surface and termlnates in the groove remains. Xn thls way a configwration is obtained ln whicll thc collector-base junction terminates on a ~all part of the groove which encloses an angle with the p-n jwnction differing from 90. However, this angle generally proves to be just in the wrong direction, that is to say such that as a result of this the field strength at the area of the line of intersection between the ~-n junction and the wall of *he groove ls lncreased instead of decreasedO This can be compensated for by covering the wall of the groove with a glass layer in which electric charge~ generally a negative charge, is bwilt in. Besides~
the complicatlon of dosing the glass layer with the correct charge, a ~rawback of this method is that the charge of the glass layer tends to dis~ppear at somewhat higher temperaturesO Another method of preventing surface breakdown in this structure is the ~ -~...................... . .
use of one or two field electrodes which ectend on the glass layer across the ~-n jwnction and are connected electrically respectively to the base zone, as to the base zone and the collector zone. However, this also provides an extra complication~
of~the manufacture, while in addition the voltage across the glass~
layer near the edge of the field electrode is very high and may present a risk of breakdown through the glass layer~ or b0tween the two field electrodes pro~ded in the groove.
A further drawbaclc of the known structures is that in general extra provisions have to be made to prevent ;~ -an inversion channel across the collector zone as a result of which undesired leakage currents m:~ght occur along the edge of the semiconductor plate, ' , .

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One of the objects o~ the present invontion i.s to avoid or at least reduce considerably the clrawbaclcs occurring in known devices o~ tho kind described.
'l`ho invontion i# inter alia based on the recognition of the ~act that it :Ls possible to give such a device such a structure that a pas~ivation with an insulating layer, for example a gla~s layer, can be used without a negative charge, and, i~
- desired~ even with a positive charge, in which the use o~ ~ield electrodes as described above is in general not necessary and no extra ohannel-stopping xones or provisions need be provided, .
while in addition the device may have a substantially ~lat sur~ace.
~ semiconductor device.oP the kind dascribed in the preamble 18 there~ore charactQrized according to the invention `.`~: :
15 in that the collector zone comprises a substantially homogeneous, - lower doped first part which ~orms the second ~-n junction with . : ;~
the second part of the base zone and a second more highly doped .::~
part which ~orms a junction with the first part o~ the collector .
zone, which junction extends substantially parallel to the : surface, and that the reoess is a groove which is provided at a ,-- distance from the ~irs-t part o~ the base zone, is ooated with an -. ~. .-electrically insulating material9 intersects the second, lower ..
doped.part of the base zone and extends down into the second, more highly doped part o~ the collector zo.ne, the bottom of the . : .;:
groove having such a high doping that the ~ormation therein o~ ~:
an inversion layer is avoided. .
The transistor structure according to the invention .
has inter alia the great advantage that ~or passivating the ~:

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~ . ., collector-base junction the groove may be coated with any dielectric material which need not contain any negative charge and, if desired, may even be charged positively, while also field electrodes may be omitted. A11 this is possible due to ~
the fact that in the device according to the invention the ~; ;
field stren~th at the surface is everywhere considerably smaller `~
than inside the body.
Generally, in the operating condition of the structure according to the invention and at the maximun permis-sible collector-base voltage the lower-doped second part of the base zone is depleted substantially entirely and the lower doped first part of the collector zone is depleted for the greater u .: .
part, and preferably is also substantially entirely depleted, the boundaries of the collector-base depletion zone being present approximately at the area of the junction between the first and ';
the second part of the base zone and the junction between the first and the second part of the collector zone. In this case . ~
the voltage at the Æ face is taken up substantially entirely by `~ ~
a region extending between the line of intersection of the grnove ~ `
with the junction between the highly doped and the low doped part of the collector zone ar.d the line of interæ ction of the surface - ~ith the junction between the highly-doped and the Iow doped part ~-of the base zone. m is is in contrast with most of the kncwn high voltage transistors in which said voltage is substantially entirely across the low doped part of the collector zone, so . ;:.
across a much smaller distance, taken along the surface. As a ~ ~
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result of all this the field strength at the surface is lcwer than within the body. The mEJuDnDm field strength occurs at the :,.
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~lat part o~ the collector-base ~-n ~unction which extends parallel to the surface and which is presont below the highly dopGd part of the base zone so that the breakdown voltage is determined qubstantially only by the properties o~ the semi-conductor ma-terial within the body and not by sur~ace state~
or by the edge curvature o~ a ~-n ~unction. As a result of this 9 `, ~,.
very high collector-base breakdown voltages can be achieved, dependent upon the dopings.
A further advantage o~ the device according to ~ -bhe invention is that, since no breakdown occurs at the sur~ace, the overall thickness o~ the low~doped part o~ the base æone -and o~ the low-doped part of the collector zone may be smaller than in a transistor having the same permissible collector~base voltage in which sur~ace breakdown does occur~ which leads to .: . .
a higher voltage o~ the cut of~ ~requency and to a higher gain ~actor, both at high current strength.
~ . .
The invention ~urthermore relates to a very suitable ~ ;
. . .
method o~ manufacturing the device described. According to -- the invention, this method is characterized in that the starting ~
material is a highly doped substrate of the ~irst conductivity ~ -. .
type, that a first lower doped layer of the ~irst conductivity ~ ;
type and a second layer of the second conductivity type are grown~
` thereon ~uccessively and epitaxially and without the device being removed ~rom the ~rowth apparatus, that dop~ng àtoms to form a more highly doped region o~ the second conductivity type are then provided selectively in a part o~ the sur~ace . : -and over a part o~ the thickness of the second layer~ after ,- ~ . . :
which an emitter zone o~ the ~irst conductivity type is ' ~ . .
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provided in said more highly doped region and a groove is formed ~ in the surface at a distance from the more highly doped region j of the second conductivity type, which groove surrounds said more highly doped region and extends down into the subs~rate, after , 5 which the groove is coated with an insulating layer.
It is of great importance that the epitaxial growth ~ -~, process should not be interrupted between the growth of the n and ~; ~
,.; ... .
p-type material, since, in the case of such an interruption, ~` impurities may deposit on the surface and, when growing is continued, may give rise to lattice disturbances just in those places where the field strength becomes maximum. This would ~;, give rise to a decrease of the breakdown voltage. At the ` 1 beginning of the epitaxial growth this plays no part since the , dopant of the highly doped substrate during the process diffuses , ., :1 ~, . . ..
`j 15 into the lower-doped collector layer, so that the lattice defects ;~ arisen on the original substrate surface become located in the . ,. j . , .
`~ substantially field-free region.
The invention will now be described in greater detail with reference to a few embodiments and the drawing, in `~ 20 which ~ Figure 1 is a diagrammatic cross-secticnal view ~ :
;1 of a semiconductor device according to the invention and.
-I Figures 2 to S show the device of Figure 1 in ~' successive stages of manufacture by using the method according ' 25 to the invention. -1 The figures are diagrammatic and not drawn to I scale, inter alia the dimensions in the direction of thickness -1 being considerably exaggerated for clarity. Corresponding parts ~ ~

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are g~nerally reforrod to by th~ same rof0rence num0rals. Semi-conductor zones of the same conduct:ivity t~pe are shacled in the same dlrection. c ; ~
Fi~ure 1 is a dlagrammatic cross-s0ctional view ;
of a semiconductor device according to the :Ln~ention. The device comprises a semiconductor body 1, in thls example of silicon, -~
in which a high voltage translstor is provided. The high voltage transistor comprlses an emitter zone 3 of a first conductivity type, preferably9 as in this example, of the n-conductivity type, adioining a substantially flat surface 2 o:~ the body, The :... .
high voltage transistor furthermore comprises a ~-type base zone (4, 5) which adjoins the surface 2 and which surrounds the emitter zone 3 entireIy and forms therewith a f`irst ~-n junc-tion 6 terminating at the surface 2, and a base zone-adjoining n- `~
:, ~
type collector ~one (7, 8) which forms with the base zone a ~
:~ :
second ~-n junction 9 extending substantiall~ parallel to the surface 2. The base zone compriscs a more highly doped first part ~ ~ whioh surrounds the emitter zona 3 entirely and forms therewith -- the ~n junction 6a and a lower doped second part 5 ha~ing a i substantially homogeneous doping concentration~ which second par*
~ 5 adjoins the collector zone and forms therewith the second ~-n - ~
junctlon 9. The two parts 4 and 5 of the base zone mutuall~ form a junction 10 terminating at the surface 2. In the surface 2 is i`~
furthermore provlded a recess 11 which surroundssthe base zone (~, 5) entirely and intersects the second ~-n junotion 9. ~ ~! j;. .
According to the invention, the collector zone comprlses a substantlally homogeneous low~r doped f`lrst par-t 7 in this example in the form of an epitaxial layer~ which part _9_ ' ~ :
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forms the second _-n junction 9 with the second part 5 of th~
base zone, and a second more highly doped part 8 which forms, with the first part 7 of the collector zone, a junction 12 extending substantially parallel to the surface 2. Finally, according to the invention, the said recess is formed by a groove 11 which is coated with an electrically insulating ~ ~ -material 13 and is provided at a distance from the first part 4 of the base zone, which groove intersects the n-type conductive -epitaxlal layer 7 and extends dcwn into the more highly doped second part of the collector zone, the doping of said second part 8 being so high that the bottom of the groove has a suffici- ~ -ently high doping to avoid the formation of an inversion layer .~, in the bottom of the groove.
Due to its favourable structure, the transistor lS according to the invention may show a very high collector base ~reakdown vDltage in spite of the fact that the bevel of the collector-base junction 9 at the area of the groove 11 is usually unfav~urable. In this example the doping of the part 5 of the base zone is higher than that of the part 7 of the collector `~ ~
zone, in which case, with a favourable angle of bevel, the acute ~ ~; h angle would not lie in the part 5 of the base zone but in the lower-doped part 7 of the collector zone. m e invention is therefore of particular interest in the case in which the first lower doped part of the collector zone has a lower doping than the se~ond lower doped part of the base zone. ~ ;
Of great importan oe is also the advantage that, `~
according to the invention and without extra measures or process steps, a channel stopping zone is obtained in the highly doped bottcm of the groove so that an undesired leakage path to the "' ' ' .

PHN. 8011.
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edge of the semiconductor plate is avoided.
In addition, although this is not strictly necessary, in the example described the doping of the second part 5 of the base zone according to a prefexred enbcdiment is such that at the -highest admissible oollector-base voltage the parts 5 and 7 are both depleted substantially entirely. For that purpose, the second lcwer-doped part 5 of the base zone beside the first ~Dre highly doped part 4 between the surface 2 and the second E~n junction (the o~llector-base junction 9) should have an overall doping of at most 3.10l2 atoms per cm2 and preferably, as in the present example, of 1.5.1012 atoms per cm2. In this case the ~hole base~
collector vDItage at the surface 2 and the wall 14 of the groove ll is taken up substantially between the points B and C (see Figure l) so over a large length along the surface, instead of between the points A and s as is the case in many known transis-tors. As a result of this, the surface field strength is every-where com~aratively low in such manner that, according to a "`
preferred e~xxdimsnt, the groove ll may be coated with a glass layer in which substantially no electric charges are incorporated. `
m e groove may even be ooated with a dielectric material having a positive electric ch æ ge, for e~ample, with a thermally grown layer of silicon oxide. This is an important advantage since glass layers with incorporated negative ch æ ge which are usually required in prior æ t transistors are difficult to manufacture `~
and in addition lose their chArge entirely or partially at temperatures above approximately 120C.
Various preferred embodlments of the devi oe result ~; ~
in an optimun collector-base breakdcwn voltage. For example, the ~ ~ ;

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second E~n junction 9 is preferably located at a distance from the surface 2 which is more than twice the distance of the junc-tion 10 between the parts 4 and 5 of the base zone to the surface.
In the example described the distance of the junction 9 to the surface 2 is 25 microns and the distance from the junctior~ 10 to the surEace 2 is 10 microns, so that this condition is fulfilled.
According to another preferred embodLment, in order to obtain a surface field strength which is as low as possible, the distance between the edge of the groove 11 and the first part 4 of the base zone, measured in a direction parallel ~; ~
to the surface 2, is at least equal to the thickness of the ~ -first part 7 of the collector zone. In this example the distance between the edge of the groove 11 and the part 4 of the base zone is 200 microns and the thickness of the layer 7 is 45 microns so lS that this condition is also fulfilled.
In order to obtain a very high breakdown voltage, the doping of the high-ohmic collector part should also remain ~ ~ ~
between a certain limit and should preferably be at m~st 2 x 1014 r ' ,.!~, doping atoms p~r c.c. In this ex~mple, said doping is 1.5 x 1014 atoms per c.c. and the collector-base brealcdown voltage is more than 1000 v~lts. m e doping of the part 4 of the base zone which serves to prevent punch-through through the base zone, and also serves as a base contact zone, is approximatel~ 1017 atoms per - c.c. (resistance per square measured at the surface 50 Ohm per square). -~
The formation of the ~type inversion channel in ~` ;
the bottom of the groove 11 should be avoided according to the invention to prevent a possible connection of the base zone 5 :

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via a collt:inuous ~-type channel to the edgo part 5~ of the base layer ancl to tho poorly dofined edge surface of the plate. I?or tha-t purposo, the doplng of the second more higllly cloped part o~
the collector zone at tho area of the ~ottom o:~ the groove is pre~erably at least 5 x 1017 a-toms per c.e. In this oxample sa:id doping is approximately 5 x 101 atoms per c.c., amply suffiei.ent for the formatlon of an efficien~ channel-stopping zone~
~he inner diameter of the groove 1l is approximately 3000 microns, the width of the groove is approximately 250 microns. The annular groove 11 in this examp:l.e is circular but :~- - -may also have a di~ferent shape and be, for example, square or rectangular, having preferably rounded-off corners. The emitter and base zones are eontacted via wiildows in the oxide layer 13 `~
by means of the metal layers 15 and 16. The collector zone is ~;
contacted at the bottom of the plate to a metal layar 17. ,~ ~ -~ ~, .
Accordlng to the invention, the semiconduetor device deseribed ean advantageously be manufaetured as follows. Starting material (see Figure 2) is a highly doped n-type silicon sub-. ~ .
strate 8 having a doping of approximately 5 x 1018 atoms per e.c. and a thickness of approximately 200 microns. On said subT
strate are grown epitaxially and ~uccessively and without removing~
the silicon plate from the apparatus, an approximately 60 microns thick n-type layer 7 and an approximately 25 microns thick ~-type ~ ~ ;
layer 5, for example, by thermal decomposition o~ SiC14, while ;~

using epitaxial growth methods generally known in semiconductor technology. The layer 7 preferably has a doping of at most 2.10 4 atoms per c.c., in this example of 1.5.101~ atoms per c.c. In this example the layer 5 has a dopi.ng of 501014 atoms per c.c.

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m e structure shown in Figure 2 is then obtained.
The surface is then provided with a layer 20 of silicon oxide, for example by thermal oxidation, after which doping atoms are selectively provided in a part of the surface and over a part of the thickness of the second layer 5 by dif-fusion while using kncwn photolithographic etching methods, so as to form a m~re highly doped ~type base region 4 (for e ~ le, by in-diffusion of boron) and an n-type emitter zone 3 present in said region 4 (for example by in-diffusing phosphorus).
~uring said diffusion, the provided zones 3 and 4 are covered with an oxide layer or glass layer; for simplicity, the layer 20 in this example is drawn so as to have equal thickness everywhere, . ;~
although this need not be the case. The oxide layer may also he removed entirely after providing the zones 3 and 4 and be replaced .
by a fresh layer 20. m e resulting structure is shown in Figure 3.
Again while using conventionally used photolitho~
graphic etching methods, a groove 11 is formed in the surface at a distance from the ~Dre highly doped ~type region 4, which groove surrounds said region 4 and extends down into the substrate, after which the groove 11 is coated with a glass layer 13. Said ~;
.
glass layer 13 may be provided in any arbitrary manner and need ;~
not contain any incorporated electric charge. m e layer ~ay be obtained, for exa~ple, by thermal oxidation, in which case a ;~
certain redistribution of the dopings in the semiconductor body should, of course, be taken into account. m e glass layer may -~
also be obtained pyrolytically in known nanner by vapour-depositing silicon oxide or by means of electrophoresis, or be obtained by providing and then sintering a glass mass. In accordance with :.: : : . : ~ : : : . ~.

PHN. 8011.
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the method used, the gr~ove 11 will be filled with glass to a greater or smaller extent. Finally the contact holes and the -metallisation are provided, after which the device is provided with a suitable envelope. ~ `
It is of importance to note that during the subse-quent treatments at high temperature the layer 7 ultimately obtains a thickness of 45 microns by outdiffusion of donors frcm the substrate. The lattice defects originally formed on the interface of the substrate and the layer 7 become located within the highly doped n-type region 8 which is substantially field free so that said lattice defects are harm~ess there. As a result of the successive provision of the layers 7 and 5 without inter-ruption, substantially no lattice de~ects occur at the interface 9 therebetween.
Of course, the invention is not restricbed to the embodiment described, since many variations are possible to those skilled in the art without departing from the scope of this invention. For example, instead of an npn transistox, a transistor may also be used. In certain cixcumstances, the lcw- ~ ~
doped part of the base zone may be formed, instead of by an -epitaxial layer, also by a diffused layer having a very flat dif~
fusion profile obtained, for example, by diffusion of aluminium.
In certain circumstances, the lcw-doped part of the collector zone may also be formed, instead of by an epitaxial layer, by the starting material of the semiconductor plate in which the highly doped part of the collector zone may then be pro~ided, for example, by diffusion. m e edge parts 5A in Figure 1, formed -by the me~hod of manufacturing described, may be omitted when ;`' , , . ,- .- . . . . . . .

~0~7~ PHN. 8011 other methods are used in which the layer 5 does not extend throughout the surface. Furthermore, in certain circum~
stances, the parts 5A and 7A in Figure 1 may be omitted for the greater part by cutting the semiconductor plate within ;
the outer edge of the groove 11 but while m~aLntaining the channel-stopping groove bottom. Other variations are possible, for example, by the choice of a semiconductor . "
material other than silicon, for example germanium or Ga~s, and by a different choice of the material for the dielectric layers used.

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Claims (11)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE PROPERTY
OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:
1. A semiconductor device comprising:
(a) a semiconductor body having a substantially flat surface and comprising at least a transistor, (b) said transistor having, (i) an emitter zone of first conductivity type adjoining said flat surface, (ii) a base zone of second conductivity type which adjoins said flat surface and surrounds said emitter zone entirely, said emitter and base zones forming a first p-n junc-tion which terminates at said flat surface, and (iii) a collector zone of said first conductivity type which adjoins said base zone, said collector zone forming with said base zone a second p-n junction which extends substantially parallel to said surface, said base zone comprising both a more highly doped first part which surrounds the emitter zone entirely and forms therewith said first p-n junction, and a lower and substantially homogeneously doped second part which adjoins said collector zone and forms therewith said second p-n junction, said two parts of said base zone mutually forming a junction terminat-ing at said flat surface.
(c) a groove provided in said flat surface, which groove surrounds said base zone entirely and intersects said second p-n junction, said flat surface extending at both sides of said groove, (d) said collector zone comprising a substantially homogeneous, lower-doped first part which forms said second p-n junction with said second part of said base zone and a more highly-doped æ second part which forms another junction with said first part of said collector zone, said other junction extending substantially parallel to said surface, said groove being pro, vided at a distance from said first part of said base zone and being coated with an electrically insulating material, which groove intersects only said second, lower-doped part of said base zone and extends down into said second, more highly doped part of said collector zone, the bottom of said groove having such a high doping that the formation therein of an inversion layer is avoided.
2. A semiconductor device as claimed in Claim 1, char-acterized in that the first, lower-doped part of the collector zone has a lower doping concentration than the second, lower-doped part of the base zone.
3. A semiconductor device as claimed in Claim 1, char-acterized in that the second lower-droped part of the base zone in as far as located beside the first more highly doped part of the base zone has between the surface and the second p-n junc-tion an overall doping of at most 3.1012 atoms per cm2 prefer-ably substantially 1.5.1012 atoms per cm2.
4. A semiconductor device as claimed in Claim 1, 2 or 3, characterized in that the groove is coated with a glass layer in which substantially no electric charges are incorporated.
5. A semiconductor device as claimed in Claim 1, 2 or 3, characterized in that the groove is coated with a dielectric material having a positive electric charge.
6. A semiconductor device as claimed in Claim 1, char-acterized in that the second p-n junction is present at a distance from the surface which is more than twice the distance of the junc-tion between the first and the second part of the base zone to the surface.
7. A semiconductor device as claimed in Claim 1, char-acterized in that the distance between the edge of the groove and the first highly doped part of the base zone, measured in a direction parallel to the surface, is at least equal to the thickness of the first low-doped part of the collector zone.
8. A semiconductor device as claimed in Claim 1, char-acterized in that the first part of the collector zone has a doping of at most 2.1014 atoms per c.c.
9. A semiconductor device as claimed in Claim 1, char-acterized in that the doping of the second more highly-doped part of the collector zone at the area of the bottom of the groove is at least 5.1017 atoms per c.c.
10. A semiconductor device as claimed in Claim 1, char-acterized in that the emitter zone is n type conductive.
11. A method of manufacturing a semiconductor device, characterized in that the starting material is a highly-doped substrate of the first conductivity type, that a first lower doped layer of the first conductivity type and a second layer of the second conductivity type are grown thereon epitaxially and successively and without the device being removed from the growth apparatus that doping atoms to form a more highly doped region of the second conductivity type are then provided selectively in a part of the surface and over a part of the thickness of the second layer, after which an emitter zone of the first conductivity type is provided in said more highly doped region and a groove is formed in the surface at a distance from the more highly doped region of the second conductivity type, which groove surrounds said more highly doped region and extends down into the substrate, after which the groove is coated with an insulating layer.
CA250,679A 1975-04-28 1976-04-21 Semiconductor device and method of manufacturing same Expired CA1057412A (en)

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NLAANVRAGE7504990,A NL185484C (en) 1975-04-28 1975-04-28 SEMICONDUCTOR DEVICE WITH A SEMICONDUCTOR BODY CONTAINING AT LEAST A TRANSISTOR.

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BE (1) BE841135A (en)
CA (1) CA1057412A (en)
CH (1) CH600572A5 (en)
DE (1) DE2616925C2 (en)
FR (1) FR2309980A1 (en)
GB (1) GB1541067A (en)
IT (1) IT1064230B (en)
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DE3030564A1 (en) * 1980-08-13 1982-03-11 SEMIKRON Gesellschaft für Gleichrichterbau u. Elektronik mbH, 8500 Nürnberg Semiconductor device for high inverse voltages - with outer layer of pn junction enclosed by peripheral zone
JPS63253664A (en) * 1987-04-10 1988-10-20 Sony Corp Bipolar transistor
DE4119904A1 (en) * 1991-06-17 1992-12-24 Telefunken Electronic Gmbh SEMICONDUCTOR ARRANGEMENT

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DE1439417B2 (en) * 1964-07-21 1976-09-23 Siemens AG, 1000 Berlin und 8000 München METHOD OF MANUFACTURING A SEMICONDUCTOR ARRANGEMENT
US3442723A (en) * 1964-12-30 1969-05-06 Sony Corp Method of making a semiconductor junction by diffusion
US3772577A (en) * 1972-02-10 1973-11-13 Texas Instruments Inc Guard ring mesa construction for low and high voltage npn and pnp transistors and diodes and method of making same
JPS5026477A (en) * 1973-07-09 1975-03-19

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AU1333676A (en) 1977-11-03
AU497831B2 (en) 1979-01-11
BE841135A (en) 1976-10-26
NL185484B (en) 1989-11-16
FR2309980B1 (en) 1981-09-18
GB1541067A (en) 1979-02-21
DE2616925C2 (en) 1983-04-14
NL7504990A (en) 1976-11-01
JPS5724933B2 (en) 1982-05-26
SE414095B (en) 1980-07-07
FR2309980A1 (en) 1976-11-26
DE2616925A1 (en) 1976-11-11
JPS51139782A (en) 1976-12-02
CH600572A5 (en) 1978-06-15
NL185484C (en) 1990-04-17
IT1064230B (en) 1985-02-18
SE7601693L (en) 1976-10-29

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