CA1052911A - Automatic writing systems and methods therefor - Google Patents

Abstract

ABSTRACT OF THE DISCLOSURE-Automatic writing systems and method therefor are provided in accordance with the teachings of the present invention wherein, according to a preferred embodiment, a central processor and a plurality of peripherals including at least a keyboard, a printer unit, a buffer and a transport station for recording data on a record media are each connected to a common data bus, a common status bus, and a common instruction word bus.
Alphanumeric character data, format data, and function data may be entered from the keyboard and the presence of such data is indicated to the central processor on the common status bus. Upon receipt of a data presence condition, program control is initiated by the central processor calculated to achieve the designated function or functions with the alphanumeric or format data presented.
The program control of each peripheral by the central processor is carried out on the common instruction word bus while the degree of completion of the co?mand issued to a peripheral is indicated to the central processor on the common status bus. Data is conveyed among the peripherals and the central processor through the common data bus for example, in a record mode, alphanumeric data entered at the keyboard is placed on the common data bus and entered on a per character basis into the central processor. Thereafter such data is again placed on the common data bug and applied on a per character basis to the printer and buffer under program control.
When a line of characters has been entered into the buffer, the contents of the buffer are recorded, again under program control, and each character to be recorded is first loaded into the central processor and there-after applied to the transport station for recording purposes. Conversely, in a playback mode, a line of characters is read from the record media and loaded into the buffer. Thereafter, each character loaded is applied to the printer unit, under program control, with the transfer of each character taking place through and under the control of the central processor. This manner of asynchronous operation in data translation between a plurality of peripherals and a central processor enables a multitude of editing, revision, control and manipulation steps to be accomplished in the central processor, under program control, while allowing the overall automatic writing system to be highly flexible in operation and readily expandable.

Description

MANDES OU BREVETS VOLUMINEUX

LA PRFSENTE PARTIE DE CETTI DEMANDE OU CE BREVET
COMPREND PLUS D'UN TOME.
. .

NOTE: Pour les tomes additionels, veuillez contacter le Bureau canadien des brevets ~L_ JUMBO APPI ICATIONS/PATENTS

THIS SI~CTION OF THE APPLICATION/PATENT CONTAINS MORE
THAN ONE VOLUME

TIHIS IS VOLUME ~ OF 4 `

NOTE: For additional volumes please contact the Canadian Patent Offica .

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This invention relates to recording, editing and playback methods and apparatus therefor, employing data processing techniques and more particularly to automatic writing techniques and systems enabling an operator to rapidly transform draft copy material into an edited, finalized format which may be retained on a record medium for additional utilization and further enables the automatic preparation of finalized copy from the selective merger of pre-recorded material from a plurality of sources.
Although modern business equipments have markedly increased the speed and efficiency with which documents are prepared and transmitted, the secretary-operated typewriter remains the principal implement for the preparation of original documents. In an effort to render the preparation of original documents more efficient, specialized equipment has been developed for repetitive tasks such as instances where the same letter or other addressed document is mailed to à large number of parties and each party is considered to be of sufficient note to warrant an individually addressed letter format. This specialized business equipment usually acts to drive a printer or input/output typewriter from a plurality of pre-recorded record media wherein, for instance, one media contains the bulk of the letter while another record media contains name and address information for each party. The printer or input/output typewriter is then alternately driven by the pre-recorded record media so that information therefrom is selectively merged and printed to ` 11)5Z9~i rapidly produce a large number of individually addressed ; letters having an identical content. Though highly suitable - for their intended use, this ty~pe of equipment generally does not have other applications than that of preparing merged format documents and hence, due to their lack of general application, equipment of this type does not represent a practical investment for businesses requiring this capability on an infrequent basis.
The second form of equipment developed in an effort to speed the preparation of documents is the so-called automatic typewriter which acts to record character and format information on a record media as the draft of the document being prepared is typed. The record media may then be utilized to drive a typewriter which is an input/output device and hence, if the draft is only changed in minor fashion in its evolution towards final copy, the record medium may be employed to drive the input/output typewriter so that portions of the final copy which have been identically retained from the draft may be automatically prepared from the media. In addition, in more sophisticated versions of such automatic typewriter equipment, the record media prepared with the draft of the document may be selectively transferred to a second record media to thereby prepare updated or corrected records for automatically driving an input/output typewriter as the evolution into final copy progresses.
The record media employed in automatic typewriter equipments of the foregoing variety may take the form of -~L0529~1 paper tapes, magnetic tapes, discs and drums of various types or the so-called magnetic cards. Additionally, when automatic typewriter equipment of this type employs a plurality of record media, such equipment generally does S have a somewhat limited abilit~r to merge information from each of the media so that batched letters may be prepared without employing other forms of specialized equipment.
The editing capabilities of such automatic typewriter equip-ment are generally limited to the correction of errors observed in the recording process and a rough form of margin control. The correction of errors observed during recording is generally achieved by backspacing the typewriter to a point just prior to the error observed and retyping the correct information. As the movement of the recording media is keyed to the movement of the typewriter carriage, the corrected information is recorded over the erroneous material. However, when the error remains unnoticed for several typewritten lines, this technique is of little utility. Under these conditions, an operator desiring to correct an unnoticed error might well complete the recording of the draft and thereafter correct the subsequently noticed error by playing out the draft in final form, stopping at a point just prior to the occurrence of the error and then typing the corrected information directly on the document without attempting to correct the record media. Where the automatic typewriter equipment employs more than one record media station, a ,~, ~ , . ...

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corrected record media may be obtained with the production of a final document by transferring data from the originally recorded media as the final document is automatically typed to a second record media. At a point just prior to the occurrence of a subsequently noticed error, the transfer operation is stopped, the error is correctly typed in the previously mentioned manner and directly recorded onto the second media. Thereafter, automatic playback from the initial record media and transfer of the data from this media to a second media may resume so that a finalized document is produced together with a corrected record media. Where, however, it is unnecessary to retain a corrected record media for further use, the preparation of a corrected record media is often a wasteful process as it is extremely time consuming. However, since there is always a possibility that the next version of the document being prepared will not in fact be the final version, it is generally good procedure to always correct the record media as corrections are intro-duced into the copy format. under these conditions, it would be highly desireable if corrections, particularly minor corrections, could be made on the original record media while the same is being selectively played out. Thus, the ability to make minor revisions in the data contained in a record media on a selective basis would be a highly desireable feature.
This feature, though highly desireable, is not generally available with the majority of automatic typewriter equipment .. . i - ~ . . -l~)SZ~
currently present in the marketplace except to a highly limited degree which allows only the revisions of a few alphanumeric characters. Furthermore, where it is desired to prepare a corrected tape through a transfer procedure in a two record media device, it is not always necessary to prepare a document in the course of such transfer operation.
Instead, it would be desireable to selectively duplicate portions of one record media onto the other at a speed compatible with the recording process and not one limited to the speed of a printing operation. This feature, however is not generally available in automatic typewriter equipment because conventionally available equipment of this type has generally been designed as an extension of the typewriter so that all recording operations and the like are performed in a manner to be consistent with the reproduction capabilities of an input/output typewriter and hence, a printing operation usually accompanies all playback regardless of whether or not it is desireable for the operation then being performed.
The margin control features of the majority of conventionally available automatic typewriter equipment has also generally been designed as an extension of typewriter equipment. More specifically, the seven (7) character margin zone of a conventional typewriter is usually employed to designate a hot zone where a margin control will operate provided a predetermined occurrence takes place. Thus, when printing is being carried out in the seven (7) character margin zone, an automatic carrier return will result if a ` - ~
~)5Z911 hyphen or a space occurs within such margin zone. However, if a space, carriage return or hyphen does not occur within this zone, automatic playback will continue until the end of the zone is reached. At this point, automatic playbac~ ¦
is stopped and operator is left ~o either propèrly hyphenate the word then being played out or to inactivate the margin end zone and finish playing out the word already started on a per-character basis. However, since the operator does not get the opportunity to exercise discretion in this matter until the end of the margin zone, proper hyphenation or the completion of the word, under these conditions, always results in a substantial extension o~ the right most margin on the document being prepared so that the resulting margin has an extremely ragged appearance. ~ clearly better approach to margin zone control would be to scan the characters to be printed in the margin zone prior to their printing and if a space or hyphen code does not appear for appropriate carriage return operation and the word to be printed extends through the predetermined margin zone, to allow the operator to exercise discretion as to hyphenation or completion of the woxd before the printer enters the margin zone. However, despite the desirability of this technique, it has not been generally available in conventional automatic typewriter apparatus.
~vailable automatic typewriter apparatus of the type described above is highly complex in structure and frequently re~uires a substantial èconomic expenditure for maintenance in the business establishment. In addition, such , .
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automatic typewriter apparatus is not highly reliable and often exhibits substantial down time. Furthermore, when the costs associated with the purchase or rental of a system is considered, the lack of sufficient reliability and the lac~ of versatility which precludes general use throughout an office frequently results in a finding that such costs are unjustified. Additionally, substantial operator training is often required for systems of this type to be utilized to full potential; so that, whell ali factors are considered, the rather slow acceptance of automatic typewriter equipment as a generaily utilized business machine is understandable.
The lack of versatility, the unreliability, the slowness of operation in non-recording modes and the inadequacies with which certain operations, such as margin control, are perfol~ed may all be traced generally to the design concepts employed in automatic typewriting equipment of th~ type described above. More particularly, automatic typewriting equipment which is conventionally available in the marketplace today has generally been designed from the standpoint of extending the capabilities of a typewriter which has been modified for input/output operation. This has meant that the overall operation of an automatic type-writex system is keyed to function as a recorder and play-back device for an input/output typewriter. Thus, information is frequently recorded and played back on a per-character basis which gives rise to relatively slow speeds of operation.
In addition, modes of operation, such as margin control, are _ 9 _ .

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~: keyed to detect information supplied to or obtained from an input/output typewriter and hence, general data pro-cessing techniques have been avoided. This ~ode of design leads to system inflexibility deriving from the modifi-cation of an input/output typewriter which was never intended to operate within the framework of a data processing system.
Thus, the various editingr control and trans~er modes of operation now present :n conventional automatic typewriting apparatus were appended as afterthoughts to a system in which they were never considered. Therefore, such design techniques must, almost by definition, lead to system inflèxibility and modes of operation implemented in a manner which is less desireable than that which could be achieved were the design of a new system initiated at the outset.
1~ When the steps involved in the evolution of a draft document into e~ited, inaliYed copy are reviewed there are many points at which data processing techniques may be employed to speed and simplify the textual revision process - so that edited, finalized copy may be-~uickly prepared without the duplication of effor-ts properly and accurately expended during the preparation of draft copy. In addition, modern data processing techniques allow data to be trans-lated and manipulated at such high rates of speed in comparison to those required for the keyboard insertion o~
data and/or the printing thereof that such data processing techniques may be readily employed to speed and simplify a textual revision process without slowing or otherwise iOS'~9~1 inhibiting the normal function of an operator. Further-more, the adaption of data processing techniques to the design of automatic typewriter equipment can readily provide system versatility and compatibility which has heretofore been unknown in the majority of automatic typewriter systems presently employed and, so long as the operator is provided with a reasonably close facsimile of a conventional type-writer configuration, system simplicity may be maintained.
SUMMARY OF THE INVENTION
In accordance with one aspect of the present invention there is provided a word processing system having a plurality of different modes in which words may be processed, comprising: a common data bus for cQnveying character information in a bit parallel format throughout the entire system: a keyboard peripheral for providing character information to be further processed, the keyboard peripheral being connected to said common data bus and applying, when active, character information in a bit parallel format thereto; a printer peripheral for receiving character information from said common data bus and being capable of printing alphanumeric character representations and achieving print position displacements and document indexing functions in response to the received character information, said printer peripheral being connected to said common data bus and receiving character information in a bit parallel format therefrom: a record medium peripheral for receiving character information from said common data bus for storage by a record medium and for applying character information to said common data bus from storage by a record medium, said record medium peripheral being connected to said common data bus and being adapted to exchange character information in a bit parallel format therewith; a buffer peripheral for accumulating . .

~`'` ~os~s~l character information in a bit parallel format, said buffer peripheral being connected to said common data bus and exchanging character information in a bit parallel format therewith; a character register connected to said common data bus for accepting character information in a bit parallel format on one by one basis from said common data bus and supplying character information in a bit parallel format thereto; and means for transfe:rring character information through said common data bus from one peripheral to another peripheral in accordance with a mode of word processing which has been selected, said transferring means including an arithmetic logic unit; and a common instruction word bus connected to each of said peripherals for transmitting instructions thereto from the character information trans-ferring means; each transfer of character information beingachieved by entering each character of information from said one peripheral into said character register via said arith-metic logic unit, and said character register acting upon said entered character information whereby either to supply it to said common data bus for application to said another peripheral or to return it to said arithmetic logic unit for logical operation thereupon, the action of said character register being in response to instructions supplied thereto by the common instruction word bus.
In accordance with another aspect of the present invention there is provided a method of word processing in an automatic word processing system wherein alphanumeric character infol~ation is entered at a keyboard peripheral and applied to a destination peripheral via a common data bus under the c:ontrol of a character information transfer means interconnecting said peripherals by means of a common instruction word bus in accordance with a one of a plurality -- 1~ --105Z9~1 of different word processing modes that may be performed comprising the steps of:
(a) generating character information in a parallel bit format at a keyboard peripheral for each depression of 5 the key thereat;
(b) applying the character information to a common data bus for transmission to and for insertion on a one by one basis into a character register via an arithmetic logic unit in parallel bit format, (c) inspecting, on a per-character basis, the character inormation inserted in the character register in response to instructions supplied from the common instruction word bus to ascertain whether it comprises alphanumeric character information for application to selected one of said designation peripherals or should be returned to the arithmetic logic unit for logical operation thereupon.
In accordance with a presently preferred embodiment of the instant invention, an autom~tic writing system is provided wherein a central processor and a plurality of peripherals including at least keyboard means, printer means, buffer means and means for recording data on a record media are each connected to a common data bus, a common status bus, and a common instruction word bus. Alphanumeric character data, format data, and function data may then be entered from the keyboard and the presence of such data is indicated to tlle central processor on the common status bus.
Upon receipt oiE a data presence condition, program control is initiated by the central processor calculated to achieve the designated function or functions with the alphanumeric or format data presented. Program control :
of each peripheral by the central processor is carried out on the co~non instruction word bus while the degree : ~ ~ 3 lOSZ91:1 of completion of the command issued to a peripheral is indicated to the central processor on the common - 13a -1~ .

lOSZ9lil `~ status bus. Data is conveyed among the peripherals and the central processor thro~gh the data bus. For example, in a record mode, alphanumeric data entered at the keyboard is placed on the data bus and entered on a per character basis in the central processor and thereafter such data is again placed on the data bus and applied on a per character basiis to the printer and buffer under program control. When a line of characters has been entered into the buffer, the contents of the buffer are recorded again under program control wherein each character to be recorded is first loaded into the central processor and thereafter applied to said means for recording. Conversely, in a playback mode, a line of characters is read from the record media and loaded into the buffer means. Thereafter, each character loaded is applied to the printer under program control with the transfer of each character taking place through and under the control of the central processor.
The above-described manner of asynchronous operation in data translation between a plurality of peripherals and a central processor enables a multitude of editing, revision, control and manipulation steps to be accomplished in the central processor under program control while allowing the overall automatic writing system to be highly flexible in operation and readily extendible. These and other aspects and advantages of the present invention will be more clearly understood below in conjunction with a detailed description of the presently preferred embodiment.

BRIEF DESCRIPTION OF THE DRAWINGS
-Fig_re 1 is a pictorial view of one embodiment of an automatic writing system in accordance with the teachings of the present invention;

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Figure 2 is a block diagram which schematically illustrates the overall apparatus contained in the embodiment of the invention depicted in Figure l;
Figure 3 is a block diagram schematically illustrating the logic details of a printer unit suitable for incorporation into the embodiment of the auto:matic writing 15 & 16 system depicted in Fig~ure 2, Fi~ure 4 schematically illustrates an interface ~or the printer unit depicted in Figure 3;
Figure 5 illustrates a ~eyboard con~iguration suitable ror incorporation into the embodiment o~ the automatic writing system shown in Figures 1 and 2;
Figure~6A and 6B are flow charts illustrating a simpliPied underscore program sequence of operations;
Figure 7 lllustrates an inter~ace for the keyboard configuration shown in Figure 5;
Figure 8 schematically depicts a buffer suitable for use as either the read only or read/write buf~er, schematically illustrated ~or the automatic writing system in Figure 2;
15 . Figure 9 schematically depicts record media write apparatus suitable for use in the embodiment o~ the automatic writing system depicted in Figure 2;
Fl~ure 10 illustrates record media read apparatus suitable for incorporation into the embodiment of the automatic writing system schematically shown in ~igure 2;
Figure 11 schematically illustrates record media transport control apparatus suitable for use in the embodi-ment o~ the automatic writing system shown in Figure 2;
F'igures 12A - 12C illustrate exemplary modes of organization for recorded information stored on a record media wherein Figure 12A schematically depicts an ~os~9~
exemplary mode of organization for a typical line of information, Figure l~B schematically shows an exemplary mode of organization for a typical bloc~ address and Figure 12C schematically represents an exemplary mode j 5 o.f organization for a typical E~D OF Record Mark;
Fiqure 13 illustrates a highly simplified flow diagram of alphanumeric character and function data for an exemplary print mode operation in the automa-i.c writing system according to the present invention;
. Fiqure 14 illustrates a highly simplified flow diagram of alphanumeric character and function data for an exemplary record mode operation in the automatic writing- system according to the present invention;
- Fiqure 15 illustrates a highly simplified flow diagram of alphanumeric character and function data for an exemplary single record medià play mode operation in the automatic writing system according to the present invention;
Fiqure 16 illustrates a highly simplified flow diagram of alphanumeric character and function data for an exemplary play mode operation in the automatic writing system according to the present invention wherein infor-mation from a plurality o* prerecorded record media may ~e selectively merged;
Fiqure 17 illustrates a highly simplified flow diagram of alphanumer.;.c character and ~unction data for an .

~05'~911 ~ QXemplary transfer mode of operation in the automatic writing - System according to the present invention;
Figure 18 illustrates a highly simplified flow diagram of alphanumeric character and function data for an exemplary revise mode operation in the automatic writing system according to the present invention;
Figure 19 illustrates a h:ighly simplified flow diagram block address data for an exemplary search mode of operation in the automatic writing system according to the present invention;
Figures 20 and 20A-D are diagrams of read only mer.lory (ROM) addressing circuits suitable for use in the micro-processor portion of the automatic writing system according to the present invention; -Figures 21 and 21A-D are diagrams of ROM circuits suitable for use in the microprocessor portion of the auto-matic writing system according to the present invention;
Figures 22 and 22A-D are diagrams of Arith~etic Logic Unit ~ALU) circuits suitable for use in the microprocessor portion of the automatic writing system according to the present invention;
Figures 23 and 23A and B are diagrams of a Return Address Stack suitable for use in the microprocessor portion of the automatic writing system according to the present invention;
and Figures 24 and 24A-D are diagrams of Main and General Purpose Registers suitable for use in the microprocessor portion of the automatic writing system according to the present invention.
It should be noted that all circuitry depicted in Figs.
20-24D is constructed with integrated circuits available from Texas Instruments, Inc., Dallas, Texas, U.S.A. and are labelled with Texas Instruments' part numbers. Descriptions o~ those cir- -cuits may be found in "The Integrated Circuits Catalog" published ~ , ~ -19-~3 ~ ` l~S'~9~1 , .
~' b y Texas Instruments, Inc., particularly the first edition (cc-401) and other subsequent additions.
TABLE OF CONTENTS FOR THE SPECIFICATION
Pages , General Description 22 ; Detailed Description of an Exemplary Embodiment 26 The Typewriter Configuration 27 The Typewriter Configuration Interface 31 The Buffer Storage Apparatus 40 The Record Media Transport Apparatus 44 The Microprocessor Apparatus 60 The Processing and Computational Portions of the Microprocessor76 The Common Data Bus 88 The Common Instruction Word and Status Buses 105 The Printer Unit 120 The Printer Interface 157 The Status Conditions Monitored163 -19a-~os;~9~
Pages The Data Conveyed to and From the Common Data Bus 171 The Printer Control Signals Produced at The Interface 188 The Keyboard Configuration 196 The Standard Keyboard Array 197 The Mode Control Keys 209 The Action Keys 233 The Thumbwheels 281 The Encoded Functions 284 Keyboard Interface 431 The Status Conditions Monitored 435 The Data Conveyed to and From the Common Data Bus 456 The Read/Write and Read Only Buffer And The Control Therefor 473 The Data Buffer 475 The Buffer Control Circuits 501 The Status Conditions Monitored 578 Data Translating Roles 589 Record Media Transport Station 609 The Record Media Write Apparatus 610 The Record Media Read Apparatus 634 Record Media Transport Control Apparatus 662 lOSZ9~1 Pages The Modes of Organization of Recorded Information on the Record Media 796 Line Information 801 Block Information 845 End of Record Marks 866 Simplified Data Flow Diagrams For The Data Conveyed Through The Common Data Bus for The Various Modes of Operation Which May Be Established In The Embodiment of the Automatic Writing System Illustrated in Figure 2 890 The Print Mode of Operation 894 Data Flow Associated With A Record Mode of Operation 906 Single Record Media Play Mode Of Operation 920 MultiRecord Media Play Mode of Operation 960 Transfer Mode of Operation 971 A Revise Mode of Operation 983 Data Flow Diagram For Actual Block Address Data in a Search Mode Operation 1005 Conclusion 1012 - . . . ~. - .
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GENERAL DESCRIPTION
Referring now to the drawings and more particularly to Figure 1 thereof, there is shown a pictorial view of one embodiment of an automatic writing system in accordance with the teachings of the present invention7 The exemplary embodiment of the automatic writing system depicted in Figure 1 comprises keyboard means 1, printer means 2 and a record media and processor control console 3. The keyboard means 1 and the printer means 2 are enclosed within a common housing and arranged to give the appearance of an input/output typewriter configuration 4. This arrangement is desirable because it presents an operator with a familiar typewriter configuration while placing, as shall be seen below, substantially all elements of the automatic writing system which require manipulation at the operator's fingertips. Although, as shall be appreciated by those of ordinary skill in the art, any input/output typewriter apparatus could be utilized with the instant invention, independent keyboard means and printer means are here preferred. The keyboard means 1 may take the form of a conventional electronic keyboard such as those manufactured by The Microswitch Division of Honeywell Corporation or The Keytronics Corporation of Spokane Washington and conventionally available. Physical characteristics of the keyboard such as touch and feel should preferably approach those of conventional electric typewriters so that input operations carried out at the keyboard will not adversely affect the operator or convey the impression that -. .; . . . ~

~05'~9~1 alien equipment is being employed. The keyboard means 1, as further described hereinafter, includes all the standard 44 alphanumeric character keys found on conventional typewriters. In addition, as better illustrated in Figure 5 a plurality of specialized function keys have been added to the conventional keyboard and a plurality of additional functions have been added to certain selected ones of the conventional alphanumeric keys.
The printer mean~ 2, as further described in conjunction with Figure 3, may take the form of a serial electronic printer wherein a servo controlled daisy wheel mounted on a servo controlled carriage effects printing while paper indexing and the like is controlled by a servo associated with the roll 5. Although any conventional serial printer may be employed, this type of serial printer is preferred as it allows printing to be accomplished at essentially twice the rate available with conventional input/output modified Selectric* typewriters when the printer is being driven from the record medium. The keyboard means 1 and printer means 2 arranged in a typewriter configuration 4 is connected through a multiconductor cable 6 to the record media and processor control console 3.
The record media and processor control console 3 depicted in Figure 1 includes first and second cassette mount~
in~ chambers 7 and 8, rewind/eject buttons 9 and 10 associated with each of the cassette chambers 7 and 8 as well as digital displays 11 and 12; in addition, a power switch 13, for *Trade mark ;` 105;~911 energizing the automatic writing system depicted in Figure 1 is also provided on the record media and processor control console 3. Although the embodiment of the automatic writing system depicted in Figure 1 has been illustrated as employing multiple record media in the form of magnetic tape cassettes, it will be appreciated by those of ordinary skill in the art that any suitable recording media such as magnetic cards, magnetic tapes, magnetic belts or even paper punched tape could be substituted therefor. In addition, as shall be apparent to those or ordinary skill in the art as the disclosure of the present invention preceeds, although a two (2) station recording and playback system has been depicted in Figure 1 and will be described below, the common bus operation of the instant invention allows more or fewer recording and playback stations to be employed without deviating a bit from the concepts of the instant invention.
Accordingly, if it were desired to provide an automatic writing system having more limited capabilities than that of the embodiment disclosed herein, a single recording and playback station could be employed while if it were desired to add further capability three (3) or more recording or playback stations could be utilized.
Similarly, cassettes, preferably of the conven-tional Phillips type have been illustrated in Figure 1, because they are highly desireable from the standpoint of operator handling and filing while allowing substantial amounts of information to be recorded on a single media.

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However, should a limited system be desired such as a system wherein a single letter is provided per record media, magnetic cards or belts could be readily substituted for the cassettes depicted in the Figure 1 embodiment of the present invention. The structure and function of the cassette chambers 7 and 8 and rewind/eject buttons 9 and 10 therefor are entirely conventional. Thus, in the well known manner, the depression of one of the eject buttons 9 and 10 results in the rewinding of the record media and the opening of the cassette chamber associated therewith, whereupon a cassette may be loaded or removed. As shall be seen below, the condition of the cassette chambers 7 and 8 are monitored so that the status of each system is continuously available to a central processor. The digital displays 11 and 12 associated with each record station act in the conventional manner to indicate, by their illumination, which of the stations is active and additionally provide in a manner to be detailed hereinafter, a digital display indicative of the portion of the record media then being utilized. Although not illustrated in Figure 1, the record media and processor control console 3 houses the majority of the logic and processing equipments employed in the automatic writing system illustrated. Thus, as shall become apparent in connection with the description of Figure 2, the record media and processing control console 3, houses the central processor, the buffers, the control and transport equipment associated with the record media lOSZ9~
stations and interface equipment for the printer means and keyboard means 1 and 2.
Accordingly, ihe embodiment of the automatic writing system illustrated in Figure 1 comprises a type-writer configuration~which pro~ides all control, format and aplhanumeric input elements at the operator's fingertips and a r,ecord media and processor control console which houses the logic associated with th`e instant automatic writing system and the record media stations as well ~ the power switch 13 which acts to energize and deenergize the entire system.
DET~LED DESCR~PTION OF AN EXEMPIARY EMBODI~E~T
Referring now to Figure 2 there is shown a block diagram schematically representing the embodiment of the automatic writing system depicted in Figure 1. The e~bodi-ment o~ ~ha auto~ati~ writing system sch~matically illustrated in Figure 2 comprises a keyboard means 1 and printer means 2 arranged in a typewriter configuration 4, as briefly described in conjunction with Figure 1, and the electron,c structure contained in the record media and processor control console 3 which comprises a typewriter configuration interrace indicated by the dashed block 15, a central processor which takes the form of a microprocessor indicated by the dashed block 16, buffer storage apparatus indicated by the dashed kloc}; 17, record media control wxite and read apparatus indicated by the dashed block 18, a common data bus 19, a common instruction word bus 20, and a common status bus 21.

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l~SZ9~1 THE TYPEWRITER CONFIGURATION
The keyboard means 1, as mentioned above, may take the form of a conventiona:L electronic keyboard such as that manufactured by the Microswitch Division o~ Honeywell Corporation or the Keytronics Corporation and should exhibit touch and feel characteristics similar to those of a conventional electric typewriter. The keyboard means 1 includes a standard 44 character set of keys which are each capable of three functions, to wit, lower case, upper case, and an encoded function. As each key on the keyboard means 1 is depressed an eight (8) bit ASCII code associated with the character is produced in parallel by the keyboard in the conventional manner. In addition, certain of the keys within the standard forty-four (44) character set are typamatic or repeatable as is also conventional in electric typewriters and/or electronic keyboards. Such typa-matic or repeatable keys should include at least the underscore key, the hyphen key and the x-key and act in the conventional manner to repeat the character code associated with the key depressed whenever such typamatic key is held depressed for longer than a predetermined interval of time such as five hundred milliseconds (500ms). In addition to the forty-four (44) conventional alphanumeric character keys, the keyboard means 1 should also include conventional input keys or levers such as space bar, shift, shift lock, carrier return, tab set, tab clear and tab as will be further des-cribed below. A typical configuration for the keyboard employed in the instant invention is shown in Figure 5. In addition to the conventional keys found on the majority o~
electric typewriters, the keyboard means 1, as shown in ilDSi~9~1 Figure 5 also includes a plurality of specialized function keys such as record, revise, alternate reader, code prlnt, search. code, line correct, margin control, duplicate, skip, play, auto, paragraph, line, ~ord, character stop and paper index keys as shall be more fully discussed below. Further-more, as an independent printer is here employed, levers are provided on the keyboard ~o control the margin settings and the intermediate line soacin~. These levers, as shall be seen below are necessary because the electronic printer 1~ which is preferably em~loye.d in this e~.b.odiment of the inst.~nt invention does not utilize physical stops for margin settings, but in contradistinction thereto ~mploys a.counter ~Ihich selectivel~ controls the limits at tYhich the sincle element printer carriage may mo~e. ~here~ore, margin settings are 1~ electronically set and counted and paper spacing intermediate lines is controlled by an indexing operation.
The ke;~board means 1 is connected to the typewritel7 configuration interface indicated by the dashed block 15 through a multiconductor control cable 22 and an eight ~8) bit data cable 23. The multiconductor control cable 22 comprises a plurality of lndividual conductors through which control information is interchanged between the keyboard means 1 and other apparatus present ln the record media ~nd - processor con-trol console 3. Although the control signals supplied to the conductors in the multlconductor cable 22 will be described in detail in conrection with the description of Figure 7, lt should be here noted that in .
' ' ' ' : , ~0529~

essence control signals indicative of conditions at the keyboard are supplied to the apparatus within record media and processor control console 3 and command signals indicative of the nature of dat:a to be gated onto the eight (8) bit data cable are suppliecl to the keyboard from the record media and processor control console 3 through the multiconductor cable 22. The eight (8) bit data cable 23 comprises eight (8) parallel conductors which are each bi-directionally gated to form a full duplex conductor. The eight (8) bit data cable 23 is employed to supply each eight (8) bit ASCII code sequence generated at the keyboard upon the depression of a key thereat in parallel to the apparatus within record media and processor control console 3, while information employed to produce a status indication such as by the illumination of a key or the sounding of an alarm at the keyboard is supplied through the eight (8) bit data cable 23 to the keyboard means 1 from apparatus in the record media and processor control console 3. Additionally, an alarm may be sounded.
The printer means 2, as aforesaid, takes the form of an electronic serial printer. Although any conventional serial printer or for that matter any input/output typewriter may be employed in the instant embodiment of the automatic writing system in accordance with the teachings of the present invention, The Diablo* model 1200 HyType* I serial printer, available from Diablo Systems Incorporated of Haywood, California is here preferred. The printer means 2 will be more fully described in conjunction with Figures 3 *Trade marks 1~5Z9~1 and 4 below; ho;ever, it should be no~ed that the Diablo 1200 ~Type I serial pr~n~er is viewed as highly desireable ror applications such as those present in automatic writing systems of the ty?e here being described bec~use a single element print carriage employin~ a rotating daisy wheel is utilized and results ln a serial printer which operates at twice the rate Or conventional input/output devices while such serial printing is accomplished without the high ambient noise attendent ln both normal line.printers and input/output typewriters. In addition, print element positioning, carriage displ cement and paper movement or indexing are all accomplished electronically and hence the unit exhibits exceptionally high reliability characteristics due to the avoidance Or the ma~ority of mechanical parts nor-mally employed to accomplish these ~unctions in both lnput/output type~Jriter devices and line printers. Further-more, as a plurality o~ the so-called daisy wheel print ronts are available, type styles and rormat may be rapidly and easily changed by an inexperienced operator. The printer

2~ means 2 1s connected to the typewriter conriguration inter-~ace indicated by the dashed block 15 through a multicon-ductor control and status cable 24 and an eleven (11) bit data cable 25. The multiconductor control and status cable 24 will be described in greater detail in con~unction with ~igure 4. Ho~ever, it may be noted that the multiconductor control and status cable 24 is employed to supply status inrormation as to the various conditions monitored at the 105~911 printer to the apparatus contained in the record media and processor control console 3 and to supply strobe information for character data, carriage movement data and paper indexing or movement data from the apparatus in the record media and processor control console 3 to the printer means 2. The eleven (11) bit data cable comprises eleven (11) parallel conductors employed to convey the character data, carriage displacement data and paper inclexing information between the printer means 2 and apparatus in the record media and processor control console 3. When character data is being supplied from apparatus in the record media and processor control console 3 to the printer means 2 only seven (7) of the individual conductors within the eleven (11) bit data cable are employed as only a seven (7) bit ASCII code or the like need be`utilized for character information at the printer means 2; however, carriage displacement information or paper indexing information requires an eleven (11) bit input and accordingly for this information, all eleven (11) conductors within the eleven (11) bit data cable 25 are employed. Tbe eleven (11) bit data cable 25 is indicated as only providing an input to the printer means 2 because once such an input is supplied, the printer means 2 has sufficient logic to carry out the designated function and provide an indication of its status, i.e., ready, busy or the like, on the multiconductor control and status cable 24.
THE TYPEWRITER CONFIGURATION INTERFACE
The typewriter configuration interface indicated by the dashed block 15 comprises a keyboard interface 26 and a printer interface 27. Each of the interfaces 26 and - ~35'~9~
: 27 is described in greater detail below in conjunction with Figures 7 and 4 respectively. Therefore, at this juncture in the description of the present embodiment of the instant invention, it is only necessary to note that the keyboard interface 26 and the printer interface 27 perform a plurality of common functions with respect to the printer means 2 or keyboard means 1 with which they are associated and the remaining apparatus in the record media and processor control console 3. More particularly, the keyboard interface 26 serves to appropriately gate eight t8) bit data characters between the keyboard means 1 and the remaining apparatus in the record media and processor control console 3 and in addition thereto receives control and command information from the apparatus present in the record media and processor control console 3, supplies and receives command and status information from the keyboard means 1 and supplies status information on a command basis to the remaining apparatus in the record media and processor control console 3.
Similarly, the printer interface 27 receives seven (7) bit and multiple bit data representing character information, carriage displacement information or paper movement infor-mation from the remaining apparatus within the record media and processor control console 3 and supplies the same as an input to the printer means 2. In addition, the printer interface 27 receives control and command in~ormation from the remaining apparatus within the record media and processor control console 3, supplies control information to and -~05'~9~1 receives the same from the printer means 2 and provides a status indication on a command basis as to a selected status condition of the printer to the remaining apparatus within the record media and processor control console 3.
Both the keyboard interface 26 and the printer interface 27, additionally act in the traditional role of conventional in-terfaces in providing for the raising of the various forms Or data conveyed to appropriate logic levels for translation to the logic device at the designated destination as well 10 as in the usual Gating roles. ~he Xeyboard interface 26 is connected to the multiconductor cont-ol cable 22 and the eight (8) bit dat`a ca~le ?3. both of which are associated with the ~eybo~rd ~eans 1. Thus, control and status in-~ormation are e~changed bet~reen the ~eyboard me~ns 1 and the 15 keyboard interface 26 through the multiconductor control cable 22 ~:rhile the data in the for~ of eight (~) bit characters, wherein each bit of a characte~ is conveyed in parallel, is exchanged between the keyboard means 1 and the keyboard interface 26.
The keyboard interface 26 is connected to the remaining apparatus within the record media and processor control console 3 through an eight (8) bit data cable 28, a sixteen tl6) bit instruction word cable 29 and a single bit status conductor 30. As shall become more apparent as the 25 disclosure of the instant invention proceeds, the automatic writing system disclosed herQin is organized as a single address data processing system wherein all data is c`onveyed 105'~9~1 in parallel along the com~on data bus 19~ all instructions are con~eyed along the co~mon instruction word bus 20, ~hile all status information as to the various conditions of the peripherals is conveyed along the common status bus 21.
Furthermore, the addressing technique employed is such that the microprocessor indicated by the dashed block 16 initially goes through an idle pro~ram Ln which it selectively samples a plurality o~ status conditions at each of the peripherals in sequence. Thus, in this idle program the microprocessor indicated by the dashed block 16 essentially waits for a des~cnated e~ent-of one type o~ another to occur at one of the ~eripneràls. When such àn ev~nt oc~urs as indi~àted by a ~lag on tne status bus, tne ~ro~ram shifts as a function of th~ even~ at the peripheral for ~hichthe ~7 a~ a~peared on the co~non status bus 21 to thereby accomplish appropriate processing for the condition at the peripheral indicated.
Accordincly, ~o achieve this mode of organization, the eight (8) bit data cable 28 is connected from the keyboard interface 26 to the co~non data bus 19, the sixteen (16) bit instruction word cable 29 is connected in'ermediate the keyboard inter-~ace 26 and the common lnstruction word bus 20 ~hile the single bit status conductor 30 is connected between the keyboard inter~ace 26 and the common status bus 21. Thus, eight (8) bit character data is conveyed between the common data bus 19 and the keyboard interface 26 through the eight (8) bit data cable 28, instruction words in the form of command and control in~ormation is supplied to the keyboard _ 34 _ - - , - -, - . - .

: .

-~OSZ9~1 interface 26 through the sixteen (16) bit instruction word cable 29 from the common instruction word bus 20 and status information, representing a condition on the keyboard which the microprocessor seeks to monitor is supplied from : 5 the keyboard interface 26 to the common status bus 21 through the single bit status conductor 30. Therefore, as shall become more apparent in connection with the description in Figure 7, the keyboard interface 26 acts to logically accept commands issued by the microprocessor indicated by the dashed block 16 on the common instruction word bus 20, to indicate the status of various conditions to be monitored at the keyboard and to logically gate eight (8) bit character data to and from the common data bus 19 so that characters are maintained on a separate basis on the common data bus 19.
The printer interface 27 is connected to the printer means 2 through multiconductor control and status cable 24 and through an eleven (11) bit data cable 25. In addition, in a similar manner to the keyboard interface 26, the printer interface 27 is connected to the remaining apparatus in the record media and processor control console

3 through an eight (8) bit data cable 31, a sixteen (16) bit instruction word cable 32 and a single bit status con-ductor 33. The eight (8) bit data cable 31 is connected to the common data bus 19 and may take the same form and provide the same function as the eight (8) bit data cable 28 connected intermediate the common data bus 19 and the key-~ lOSZ911 ,l board interface~ The eight (8) bit data cable 31, as indicated in Figure 2, thus acts to convey characters in the form of eight (8) or less parallel bits from the common data bus 19 to the printer interface 27 for subse~uent application through cable 25 to the printer means 2 and, as shall be seen in conjuction with Figure 4, printer position information maintained at the printer -j interface 27 to the common data bus 19. ~s will be fully apparent to those of ordinary skill in the art, the eight (8) bit data cable 31 need not be a gated full duple~ cable in that the gating function is here achieved by output apparatus located at the printer interface 27 which responds to instructions issued by the microprocessor indicated by the dashed block 16 while the printer means 2 is capable of independently acting upon instructions and placing an instruction completed flag, as shall be more fully described below, on the single bit status conductor 33.
The single bit status conductor 33 is connected to the common status bus 21 and may take the same form and provide the same function as the single bit status conductor 30 connected intermediate the keyboard interface 26 and the common status bus 21. Thus, as shall also be seen hereinafter, the single bit status conductor 33 serves to provide status indications on the co~non status bus 21 as to the condition of the printer and more particul arly, as to the ready, busy or instruction completed condition of the various aspects of the printer means ~ which are being selectively monitored.

rA~ .

- . . . . . . .

lOS;~9i~

Although both the keyboard interface 26 and the printer interface 27 will be separately discussed and described in connection with F:igures 4 and 7 respectively, it should now be apparent that the typewriter configuration interface indicated by the dashed block 15 provides an independent interface for the printer means and the keyboard means and that each interface so provided carries out three separate and distinct functions in addition to the normal logic functions of raising inputs to and outputs from a destination device to appropriate logic levels. The first of these functions is to provide a status indication to the common status bus 21 as to the status of the condition within the printer means 2 or the keyboard means 1 which is then being monitored. For instance, if operation is being initiated and the microprocessor indicated by the dashed block 16 is in an idle program and is thus waiting for some action to occur at one of the peripherals, when a flag goes up on the single bit status conductor 30 and a data presence condition is being monitored, the microprocessor will branch into A Data Presented From The Keyboard program and run through the appropriate program steps to insure that the data character presented from the keyboard is appropriately processed. Similarly, the single bit status conductor 33 from the printer interface 27 is employed to indicate the status of the printer means 2. Thus, for example, if a print step has been issued to the printer, through the combined action of the microprocessor and data supplied from . - .

~0529~1 the con~on data bus 19, the status condition supplied to the common status bus 21 through cable 33 will indicate, in a manner to be more fully explained below, that the print : instruction has successfull~ been completed, that it is still ` 5 in process, or that further instructions may now be provided to the printer means 2.
The second distinct function of the typewriter configuration inte.rface indi.cated by the dashed block 15 is to selectively gate alphanumeric character data or other selected forms of data from the common data bus 19 to the -keyboard means 1 or the printer means 2 and to assure that data on the common data bus 19 is appropriately gated at the proper interval to these peripherals or that data from the peripherals is gated at appropriate intervals to the common data bus 19. For example, in a recording operation each eight (8) bit data character presented by an operator to the keyboard means 1 will be selectively gated from the ~eyboard interface 26 to the common data bus 19 through the eight (8) bit data cable 28 and such gating, which occurs under program control, will ensure that only one eight (8) bit character is supplied to the common data bus 19 in a given processing interval. Similarly, in a printing opera-tion, the printer interface 27 functions to ensure that seven (7) bit character information is gated from the common data bus 19 to the printer at intervals in which the printer means 2 is ready to receive such infQrmation and that no subsequent character information is supplied to the ~ ~05'~9~
.
printer before a previous printing operation has been completed.
The third distinct function of the typewriter configuration interface indicated by the dashed block 15 is to selectively receive address and instruction data from the common instruction word bus 20 to thereby enable the peripheral which has been addressed and to cause such peripheral to acquire the appropriate data from the common data bus 19 and further to perform the appropriate command upon receipt of such data. For instance, when data has been inserted by an operator at the keyboard means 1, a Gate Data To The Data Bus command will be presented on the common instruction word bus 20 and in a manner to be fully described below, the eight (8) bit ASCII code or a modification thereof supplied by the keyboard means 1 is gated through the eight (8) bit data cable 28 to the common data bus 19. Similarly, when a character is to be printed an Acquire Data From The Data Bus command will be presented on the common instruction word bus 20 and supplied to the printer interface 27 through the sixteen (16) bit instruction word cable 32, assuming a proper status indication on the common status bus 21 had previously been received. In response to this command, the printer interface 27 will cause the printer means 2 to acquire the data present on the common data bus 19 and respond in an appropriate manner thereto. From the foregoing description of the keyboard means 1, the printer means 2, the keyboard interface 26 and the printer interface 27, it will be apparent that no direct lO~Z911 connection of any type is established between the keyboard means 1 and the printer means 2. Therefore, unless appropriate commands for printi.ng are received from the common instruction word bus 20 and appropriate character : 5 information is supplied to the printer means 2 from the common data bus 19, the depression of a key at the keyboard means 1 will not automatically result in the printing of a character representing the key depressed at the printer means 2.
THE BUFFER STORAGE APPARATUS
The buffer storage ~pparatus indicated by the dashed block 17 comprises a read/write buffer 35, a read only buffer 36 r a read/write buffer control 37 and a read only buffer control 38. Both the read/write buffer 35 and the read only buffer 36 may take the conventional form of a dy-namic shift register connected in a recirculating shift register configuration. The actual construction of such dynamic shift registers and the recirculating shift register configuration therefor together with the control circuitry employed therewith is described in detail in connection with Figure 8. Therefore, it is here sufficient to appreciate that both the read/write buffer 35 and the read only buffer 36 act to store character information supplied thereto from the common data bus 19 on a per character basis until a complete line, as indicated by a carriage return character, has been stored therein. Thereafter, the entire contents of the read/wr:ite buffer 35 may be read out onto the common lOSZ911 data bus 19 for application and recording on a record m~dia . .
` at the record station indicated by dashed block 18 while the contents of the read only buffer 36 are utilized for additional processing. Although the read/write buffer 35 and the read only buffer 36 may take the identical form, these buffers are differently designated due to the functions performed thereby in the instant embodiment of the automatic writing system according to the present invention.
Fo~ instance, as shall be more fully described hereinafter, while the read/write buffer 35 is employed for storing data originating from any peripheral within the instant embodiment of the automatic writing system, the read only buffer 36 is not employed to store data originating from the keyboard means 1 nor is data therefrom generally recorded on a record media. It is for these reasons that the buffer 35 has been designated as a read/write buffer while tbe buffer 36 is designated a read only buffer. However, as will be apparent to those of ordinary skill in the art, these designations and functions of buffers 35 and 36 are arbitrary and a multitude of variations thereof may be relied upon without deviating from the teachings of the instant invention.
The read/write buffer 35 is connected to the common data bus 19 through an eight (8~ bit data cable 39 and similarly the read only buffer 36 is connected to the common data bus 19 through an eight (8~ bit data cable 40. The eight (8) bit data cables 39 and 40 may . .:

~05'~9~
each take the form of eight (8) parallel conductors for . conveying eight (8) bit character information in parallel between the common data bus 19 and its associated buffer ; 35 or 36. The read/write buffler 35 is connected to the read/write buffer control circuit 37 through a multiconductor control cable 43 and the read only buffer 36 is connected to the read only buffer contro:L circuit 38 through a multiconductor control cable 44. The multiconductor control cables 43 and 44 may each take the form of a plurality of individual conductors which serve to convey operational and control signals between the buffer and buffer control circuit associated therewith.
The read/write buffer control circuit 37 and the read only buffer control circuit 38 may take the same form and function in identically the same manner to control the operation of their respective buffers 35 and 36. Although the structure and operation of the buffer control circuits 37 and 38 will be described in detail in connection with Figure 8, it should here be appreciated that the buffer control circuits 37 and 38, in essence, act to control the manner in which data is read out, acquired and stored in the buffers 35 and 36 as well as to provide a status indication as to the conditions which obtain at such buffers. More particularly, as will become apparent below, each of the - , -~osz9~

buffer control circuits 37 and 38 includes a pointer ~` counter which acts to monitor the position of the last data character entered into the buffers 35 and 36. In addition, through their control functions, the buffer control circuits act to properly locate the character in storage in the recirculating buffers 35 and 36, to cause the insertion, recirculation and output of data in the buffers 35 and 36 and to provide a status condition indication as to the various conditions monitored in the buffers 35 and 36. Each of the buffer control circuits 37 and 38 is connected to the common status bus 21 through single bit status conductors 45 and 46.
The operational and instruction signals provided by the buffer control circuits 37 and 38 are generated pursuant to commands presented on the common instruction word bus 20. The read/write buffer control circuit 37 is connected to the common instruction word bus 20 through a sixteen (16) bit instruction cable 47. Similarly, the read only buffer control circuit 38 is connected to the common instruction word bus 20 through a sixteen (16) bit instruction word cable 48. Thus, as is true for any other peripheral employed in the instant automatic writing system, the buffer storage apparatus indicated by the dashed block 17 acts to acquire data or provide data to the common data bus 19 in response to commands provided on the common instruction word bus 20 and provides status indications to the common status bus 21 so that the program sequence being carried on in :: . . . . .
- . . .

:~ ~os~9~
- the microprocessor indicated by the dashed block 16, may be advanced in response to an indication that the buffer . .
storage apparatus indicated by the dashed block 17 is : available to receive additional character information and/or has completed a previous command. More particularly, the ` buffer storage apparatus indicated by the dashed block 17 ` includes two (2) separate and independent peripherals in the form of a read/write buffer 35 and control configuration and a read only buffer 36 and cont:rol configuration and each of these peripherals provides its own status indications to the common status bus 21, may obtain or provide data to or from the common data bus 19 and receives commands from the common instruction word bus 20. However, as will be readily apparent to those of ordinary skill in the art from the organizational mode employed by the instant invention, a single read/write buffer configuration could be employed should it be desired to provide an automatic writing system with fewer capabilities than the embodiment of the automatic writing system presently being disclosed and conversely additional buffers or buffers employing other conventional configurations could be utilized to provide an embodiment of an automatic writing system having enhanced or varied capability.
THE RECORD MEDIA TRANSPORT APPARATUS
The remaining peripheral employed in the instant em-bodiment of the automatic writing system according to the present invention is the record media control write and read apparatus indicated by the dashed block 18. Like the buffer storage apparatus indicated by the dashed block 17 the record media control write and read apparatus indicated by the dashed block 18 actually comprises two record media ` stations wherein one of said rlecord media stations is `. 5 employed for both writing data on and playing data from a record media while the other station is employed solely to ; read data from a record media which has previously been recorded. This mode of organization, though arbitrary, has here been employed so that recording will always take place at the same record station to avoid possible operator confusion; however, it will be apparent from the portions of this disclosure that follow that both record stations could be supplied with a writing capability without any deviation from the concepts of the invention here being disclosed. The record media control write and read apparatus indicated by the dashed block 18 includes a read/write station comprising a write decoder means 50, a read decoder means 51, a read/write station control circuit 52 and a read/write record media transport 53 which includes recording, playback heads and a read only station comprising a read decoder means 54, a read only station control circuit 55 and a read only record transport 56 which includes a playback head.
The read/write record station acts, as aforesaid, to either receive data in parallel on a per line basis from the common data bus 19 and to cause such data to be serially recorded on a record media or to read data in a series on a ~ ~05Z9~l per line basis from a record media and apply such data in parallel to the common data bus 19. Accordingly, although the write decoder means 50 will be further described in connection with Figure 9, the write decoder means 50 may here be consider-ed to take the form of a conventional parallel to series con-verter which acts in the well known manner to convert an eight (8) bit data character received in parallel to a serial format and present the converted character on a single output con-ductor. The write decoder means 50 is connected through an eight (8) bit data input cable 57 to the common data bus 19, through a single output conductor 58 to the read/write record media transport 53 and through a multi-bit control cable 59 to the read/write station control circuit 52. The eight ~8) bit data input cable 57 may take the form of eight (8) parallel conductors each of which is connected to one of the eight (8) data bit conductors in the common data bus 19. Thus, the eight (8) bit data input cable 57 may take precisely the same form as the other data cables employed to convey data between one of the peripherals utilized in the instant invention and the common eight (8) bit data bus 19. The single bit output conductor 58 is connected intermediate the write decoder 50 and the read/write record media transport 56 and more particularly, as shall be seen below, to the recording head ~` . - - ~

, .~;`

. . .

:

105'~911 therein. Accordin61y, the single bit outpu~ conduc~or ,8 - acts to supply each data character applied ~o the ~Irite decoder means 50 t~ the write head ~ hin the read/wri~e record media transport 53 a~er such data has been converted into serial ~ormat.
The multibit control cable 59 is connected between the write decoder means 50 and the read/write station control circuit 52. As shall be more ~ully described in connection with Figures 9 and 11, the multiblt control cable 59 is e~ployed to convey control in~ormation between the ~rite decoder means and the read/wri~e station control c~rcuit 52 ~or the control Or both the write decoder means 50 and the read/write record media transport.
More particularly, the multibit control cable 59 is employed to supply enabling signals to the write decoder means 50 so that data ~rom the common data bus 19 is selectively ~ated thereto and in addition, data presence in~ormat~on is applied from the write decoder means 50 to the read~write station control circuit 52 for controlling the read/write record media transport 53. The read/write station control circuit 52 will be described in detail in conjunction with Figurell; here, however, it is su~icient ~o appreciate that the read/write station control circuit 52 acts to control the selective enabling of the write decoder means 50 and the read decoder means 51 in response to commands ~`ro~ the microprocessor 16 applied thereto from the co~mon instruction word bus 20. In addition, the _ 47 -` 105Z9~

read/write station control circuit 52 acts to control the operation of the read/write record media transport 53 in a manner which is consistent with the command instructions received and to provide a status indication of such operation to the common status bus 21. For instance, the read/write station control circuit 52 controls the speed and direction of the read/write record media transport 53 in a manner which is consistent with the speed and directional requirements of the command received. Thus, if a search operation has been commanded, the read/write station control circuit 52 will cause the read/write record media transport 53 to drive the record media at a fast rate, i.e. about seventy inches per second (70 ips), in an appropriate direction to locate the appropriate material being searched.
Conversely, if a read or write operation has been commanded, the read/write station control circuit 52 will cause the read/write record media transport 53 to drive the record medium at a reduced speed, about twenty inches per second (20 ips) in an appropriate direction for reading or writing and will enable the appropriate write decoder means 50 or the read decoder means 51 when the speed mandated has been obtained. Furthermore, the read/write station control circuit 52 will provide a status indication to the common status bus 21 as to the status of the mode of operation of the read/write record transport 53 so that such status indications may be employed in the microprocessor indicated by the dashed block 16 to cause further commands, under ~ ~ .

lOS~911 program control, to be issued for completing or furthering the operations commanded.
The read/write station control circuit 52 is connected to the read/write record media transport 53 through a multiconductor control cable 60 and to the common status -~ bus 21 through a single bit status oDnductor 61. The read/wri-te record media transport 53 may take the form of a convention record media transpolPt means which inclldes recording and playback heads. More particularly, as the record media employed in this embodiment of the present invention takes the form of conventional ~ type cassettes, the read~write record media transport would ta]ce ~he form of a conventional cassette drive or transport system having a record or playb-~ck speed of approximately ~wenty inches per second (~0 ips) and a fast forward and rewind speed, which is hera e~ployed for media manipulation as well as searcl. purposes, of appro~imately seventy inches per second (70 ips). Furthermore, such conventional record media transport would include record and playback heads together with an appropriate biasing source and preferably a common record and playback head having low noise characteristics would be employed. However, as will be apparent to those of ordinary skill in the art, the record media upon which recording takes place does not matter a to the input and output electronics associated therewith and hence, conventional cassette drives, magnetic belt drives, or even paper punch tape drives, togather wiLh appropriate recordr 105~9i~
playback and erase transducers could be readily substituted for the read/write transport 53 here described. Further-more, if a record media better suited to the parallel recording of character information than the instant cassettes being described were selected, it would be obvious to those of ordinary skill in the art that the write decoder means 50 and the read decoder means 51 could be replaced by direct, gated connections to the common data bus 19.
Although, as aforesaid, any suitable read/write record media transport could be employed in the practice of the instant invention, the manner in which the record media is manipulated and operated on an intermittent basis required a transport system having an ability to rapidly come to speed and stop so that only limited amounts of the record media are wasted during such operations. In addition, relatively constant speed characteristics which are capable of being monitored are preferred. For this reason, it is preferable that the record media transport system disclosed in conjunction with U. S. Patents 3,818,297 issued June 18, 1974 and 2Q 3,829,745 issued August 13, 1974 and Canadian application Serial No. 189,626 filed January 7, 1974, each assigned to the same Assignee as the instant application be employed.
The read/write record media transport is connected to the read decoder means 51 through the single bit conductor 62 and to the write decoder means 50 through the single bit output conductor 58, as aforesaid. The single bit input conductor 62 is connected at the read/write record media transport 53 to the read head therein while the single _ 50 ~

_ ~05;~91~
bit output conductor 58 is C~n~cTo d to the write head;
of course, in cases wllere a common read/write transducer is employed, which t~ould be the prererable case, both con-ductors 58 and 62 would be connected to ap~ropriate transducer portion.s in the same head. In addition, the record media transport electronics for controlling the speed and direction of the transport as well as the on or off input for selectively enabling the transport are controlled by the read/write station control circuit 52 through the multiconductor control cable 60. A more detailed des-cription of the various modes of control exercised over the transport by the read/ttrite station control circuit 52 is setforth in connection with Figure 11.
The read decoder means 51 is described in greater ~etail in connection with Figure 10. Here, howe~er, it is sufficient to appreciate that the read decoder means 51 comprises a con~entional serial to para.llel con~ert~r ~.~hich acts in the well ~no~n manner to accept serial character information in the form of eigllt (8) bits applied to the single bit ir.put conductor 62 and to transform the character f format thereof into an eight (8) bit parallel code for application to the common data bus 19. The read decoder means 51 is connected through an eight (8) bit data cable 63 to the common data bus 19 and through a multibit control cable 64 to the read/write station control circuit 52. The read decoder means 51 thereby act.s, under program control .

- . , - ~ , . .

~ --- lOS~9~1 supplied to the read/write station control circuit 52, to accept serial cllaracter data read from the record media on the single bit input conductor 62 and to transform such data into an ei~ht (8) bit parallel format for application to the common data bus 19 through t:he ei~ht (8) bit data output cable 63. The multibit control cable 64, in similar manner i to the multibit control cable 59, is employed to convey instruction and status infoY~mation between the read decoder means 51 and the read/write station control circuit 52.
Thus, the operation of the read decoder means 51 is selec-tively enabled in response to commands supplied to the read/write station control circuit 52 on the common instruction word bus 20 ~hile the sta-tus of the data at the read decoder means 51 is indicated through the multibit con~rol cable 6~ to ~he read/write station control circuit 52 so that such status may be indicated to the microprocessor and employed to e~tend the program commands for the continuation or altering of the operation being performed.
The write decoder means 50, the read decoder means 51, the read/write station control circuit 52 and the read/write record media transport 53 thus form a complete record media station having the capability for both recording data on a record media and reading data therefrom.
Thus, as will be apparent to those of ordinary s~ill in the art, were it desired to provide a more limited automatic writing system, not having, as shall be more readily appreciated hereinafter, the capability for transferring - . ' :............ .. .

~5;~91i information between the record media, no further record station apparatus would be employed. Such a more limited embodiment of the present invention could utilize the single read/write record station and both the buffers depicted in the dashed block 17 or only a sin~le buffer could be employed. This same approach to prividing a more limited system could be here utilized regardless of whether or not cassettes, magnetic cards, belts, tapes or paper punch recording and playback apparatus were utilized. ~t this juncture in the disclosure of the present invention, it should be appreciated that the read/write record media station formed by the write decoder means 50, read decoder means 51, the read/write station control circuit 52 and the record media transport 53 operates with respect to the over-all automatic writing system disclosed herein in the samemanner as any other peripheral in the instant embodiment of the autonatic writing system. Thlls, the read~write recoxd media station receives or applies character information in the form of eight (8) bit data characters to the common data bus 19, receives commands from the microprocessor indicated by the dashed block 16 from the common instruction word bus 20 and indicates the status of its response to such commands on the common status bus 21. Furthermore, the operation of the read/write record media station is characteri2ed in that character information loaded into the buffers enclosed within the dashed block 17 is accumulated until a line of information has been obtained. Thereafter, .. . .

~OSZ91i the buffer is dumped onto the recording medium through the ac.ion of the microprocessor and the read/write station.
Alternatively, a complete line of data is read from the record me~ia, supplied through the common eight (8) bit data bus to the buffers enclosed within dashed block 17 and read out from said buffers on a per character basis to further peripherals within the system.
The read only record media station enclosed ~ithin dashed bloc~ 18 comprises as aforesaid, the read decoder means 54, the read only station control circuit 55 and the read only record transport 56 which includes at least a playback head. The read decoder means 54 may take the same form as the read decoder 51 and hence acts as a serial to parallel converter in transforming the format of eight (8) bit character information received in series into parallel and applying the same to the common data bus 19. The read decoder means 54 is connected to the co~non data bus 19 through an eight (8) bit data output cable 67 and to the output of the read head in the read only record media station 56 through a single bit input conductor 68. The read decoder means 54 thereby acts to receive character infor-mation in serial format, to trans~orm such character information into a parallel format and thereafter apply such character information in a parallel format to the common data bus 19. In addition, the read decoder circuit means 54 is connected through a multiconductor con~rol cable 69 to the read on:Ly station control circuit 55. The multiconductor -` ~OS'~91~
control cable G9 is employed to exchange status and control information between the read decoder means 54 and the read only station control circuit 55 in the same manner and for the identical purposes as control information and status information is exchanged between the read decoder circuit 51 and the read/write station control circuit 52 through the multiconductor control cable 64.
The read only record media transport 56 may take the same form. perform the same functions and admit to the same variations as the read/write record media transport 53 with the exception that no write apparatus need be provided therefor since a recording ~unction is not utilized in the read only record media station in this embodiment of the present invention. However, ~anufacturing expediency may dictate that the read only record media transport 56 be identical to the transport employed in the rèad/~rite recor~
mPdia station and that t~e write inputs thereto ~ot be connected. This view is taken because when a common recording and playback transducer is employed, the cost differential between a read only transport and a read/write transport such as employed in this embodiment of the instant invention is insubstantial. The playbac~ head present in the read only record media transport 56 is connected to the single bit input conductor 68 so that data read from the record media during the operation thereof may be applied to the read decoder means 54 through the single bit input conductor 68 in the manner aforesaid. The read only record media trans-- i,."; ,. ~ "",",~ "" ~ ", " ~ ,, 105~91~
port 56 is connected to a multiconductor control cable 70 to the read only station circuit 55. The read only record media transport 56 is controlled, throu~h the multiconductor control cable 70, by the read only station control circuit 55 in the same manner that the read/write media transport 53 is controlled by the read/write station control circuit 52 though the multiconductor control cable 60 except that no information associated with a write function is applied ~ thereto. The read only station control circuit 55 may take a similar form to the read/write station control circuit 52 except that no information associated with a write function is supplied thereto and accordingly no control in~ormation associated with such a write function is generated thereby.
However, the read only station control circuit 55 acts in the same manner as the read/write station control circuit 52 to selectively enable and control the operation of both tlle read only record media t~ansport 56 and the read decoder means 54 under program instructions and commands received from the common instruction word bus 20. The read only station control circuit 55 is connected to the common status bus 21 through a si.ngle bit status conductor 71 and thereby acts to apprise the microprocessor enclosed within the dashed block 16 as to the status of the various aspects of the read only record media transport 56 and the read decoder means 54 which are monitored for the purposes, as shall be further explained below, of implementing the program con~land.s and instructions placed on the common ~: ~os~9~ ;
instruction word bus 20. The read only station control circuit 55 is additionally connected to the common ;~ instruction word bus 20 through a sixteen (16) bit instruction word cable 72. In this manner, the read only station control circuit 55 receives instructions and commands produced by the microprocessor and applied to the common instruction word bus 20 and provides control instructions in accordance with such commands to the read only record media transport 56 and the read decoder means 54.
Although a more detailed description of the operation o~ the read only record media stat.on formed by the read decoder means 54, the read only record media transport 56 and the read only control circult 55 will be presented hereina~ter, the basic relationship between the read only record media station and the read/wr.ite recora media station enclosed within the dashed block 18 may be readily appreciated by a basic recognition of their roles within the system. Thus, the read/write record nledia station is employed whenever it is desired to record data ~rom any peripheral on a record media~ Such data may origina-te ~.rom the keyboard means 1 and/or the read only record media station. Once the data is introduced to the common data bus 19, it is manipulated in a manner which is consistent with the operation in progress and eventually is loaded on a per character basis into the read/write bu~er 35. Once a ~ull line o~ data has been loaded into the ~05'~9~1 read/write buffer 35, the buffer is dumped and the entire contents of the buffer are recorded on the record media present in the read/write record media transport 53. If a record operation from the keyboard is in progress, the read only station will not be employed; however, if it is desired to duplicate in whole or in part, the contents of a previously recorded record media, this record media is loaded at the read only station and is read on a per line basis at the read only station and is read on a per line basis into the read only buffer 36. .If the line of data thus read from the record media at the read only station is to be duplicated completely, th~ read only buffer will be dumped into the read/write buffer which is subsequently dumped and recorded on a record media at the read/write record station. However, if only partial recordation of the line loaded into the read only buffer 36 is desired, the read only buff~r 36 is selectively read out on a per character basis and such characters as are read out are selectively loaded into the read/write buffer 35. For instance, such data characters as are read from the read only buffer 36 may be merged with other data characters placed onto the common data bus 19 by the keyboard so that a reorganization of the data applied in sequence in a selective manner to common data bus 19 results. Once a complete line of data is loaded into the read/write buffer 35 the line is read out in its entirety through the common data bus 19 and applied to the read/write. record media station where it is recorded in a serial manner on the record media .

lOS2911 loaded at the record media transport 53.
In the modes of operation just described the read only station was employed as a reader while the read/write station was employed as a data recordin~ station. In a playback mode, however, either the read only station or the read/write station may be employed to read the record media ' located thereat on a per line basis and to insert the data read thereby into an appropriate one of the buffers 35 and 36. Thereafter, the buffers are read on a per character basis and each character applied thereby to the common data bus 19 is applied to the printer to obtain document pro-duction. In a further mode o~ operation to be described, both the read only station and the read/write station are employed as readers and data obtained therefrom is selectively applied to the printer so that batched letters and the liXe may be obtained. Thus, it is seen that the rèad/write station and the read only station employed in the instant embodiment of the present invention provides an automatic writing system having substantial flexibility and versatili-ty; however, should lesser capability be desired the read only record station could be omitted while if greater flexibility were thought to be advantageous, additional read only or read/write stations could be added as they are merely individual peripherals to be connected in the same manner as the read/write station and the read only station to the common data bus 19, the common status bus 21 and the common instruction word bus 20.

.

.. .. .. .. .

105~9:11 ;
THE MICROPROCESSOR APPARATUS
The central processor, which takes the form of a microprocessor, is indicated by the dashed block 16. To properly appreciate the structure and various modes of operation of the automatic writing system according to the present invention, a general acquaintance as to the structure, modes of operation, and programming techniques employed in the microprocessor indicated by the dashed block 16 is appropriate.
For this reason, a general description of the structure and mode of operation of the microprocessor indicated by the dashed block 16 will be set forth in conjunction with Figure 2, and exemplary programs, addressing techniques and the use and function of instructions at the peripherals will be described below. However, for a detailed appreciation of the microprocessor enclosed within the dashed block 16, reference .::
should be made to the material appearing in the Appendix hereto and in Figures 20 - 24.

osr~9~
The central processor in the form of themicroprocessor indicated by the dashed block 16 comprises a read only memory 80, a ROM address register 81, a return address register 82, general purpose registers G and H as 5 indicated by the block 83, an arithmetic logic unit 84 and a main register ~ The read only memory 80, may take the form of a preprogrammed, hard wired memory having

4,096 sixteen (16) bit instruction words, wherein each of the instruction words designates a specific system 10 operation. The sixteen (16) bits of each instruction word are designated Bo - B15 in Figure 2 and in the remaining figures of this application as will be described hereinafter.
The read only memory 80 may take the form of a plurality of MSI chips organized in a three-dimensional array having 15 four sections. Each section is divided into rows and columns. The rows can be considered as dividing each section into four major pages, there being a total of six-teen major pages in the three-dimensional array. Each major page contains 256 of the sixteen bit words. Within 20 each major page, the section columns divide each such major page into sixteen minor pages. Each minor page thus contains a total of sixteen of the sixteen bit instruction words. Although any conventional semi-conductive, LSI or hard wired magnetic read only memory configuration may be 25 employed in the formation of the read only memory 80, MSI
chips are here preferred because they may be readily organized into the three-dimensional structure described above in a mannler such that each chip forms one of the six-teen major pages described `' ~LOS'~9~1 above. In an actual embodiment of this invention which was constructed and tested, sixty-four (64) INTERSIL*
5603c chips, each of which is 256 bits long and 4 bits wide were employed to form the read only memory 80. Although a read only memory having 4,096 sixteen tl6) bit instruction words is here being discussed, it will be readily appreciated by those of ordinary skill in t:he art that the read only memory 80 may be readily expancled, through the use of either the addition of major pages internally or the use of an external memory, if additional capability should be required.
The output of the read only memory 80, which takes the form of a sixteen (16) bit instruction word is connected to the common instruction word bus 20 through a sixteen (16) bit instruction word cable 85. The sixteen (16) bit instruction word cable 85 may take the form of sixteen (16) parallel conductors which each receive a single bit of a sixteen (16) bit instruction word readout each time the read only memory 80 is addressed and acts to apply each bit of the sixteen (16) bit instruction word in parallel to the common instruction word bus 20. As shall be appreciated by those of ordinary skill in the art, the organization of the read only memory 80 is such that two (2) bits are required to address each section and two (2) bits are required to address each row so that a total of four (4) bits are required to uniquely address each of the sixteen (16) major pages each of which contains 256 sixteen (16) bit instruction words.

*Trade mark . ~ . ; , ~ . .. ..

~QS'~91~
Therefore, as eight (8) bits are required to uniquely define each word of a major page, a twelve (12) bit address ; is employed in the addressing of the read only memory 30.
In addition, the read only memory 80 is further organized in a manner such that each major page is divided into six-teen (16) minor pages each of which is sixteen (16) bits wide. Therefore, of the eight (8) bits required to uniquely define each of the 256 sixteen bit instruction words within a major page, the four (4) high order bits may be viewed as defining the minor page therein while the four (4) low order bits uniquely define one of the sixteen (16) instruction words in that minor page. Thus, of the twelve (12) bits reguired to address the read only memory 80, the four (4) high order bits define a major page, the four (4) middle order bits define a minor page, while the lower order four (4) bits define a given instruction within the minor page. Details of the read only memory 80 may be found in Figure 21.
The read only memory 80 is connected to ROM
address register 81 through a twelve (12) bit address cable 86. As shall be seen below the twelve (12) bit address cable 86 receives a twelve (12) bit address from the ROM
address register 81 and applies such twelve (12) bit address in parallel to the read only memory 80 so that a selected word therein is uniquely addressed. The twelve (12) bit address cable 86 may take the form of twelve (12) parallel conductors. Details of the ROM address register 81 may be found in Figure 20.

.. . . - ~

105'~91~

~owever, for the purpose of the instant disclosure, a sufficient understanding of the structure and function of the ROM
address register 81 may be had by an appreciation that the ROM address register 81 acts to provide a twelve (12) bit address to the read only memory 80 and comprises a multiplexer, an adder, a next absolute address register and an output register connected in the order recited. In addition, the ROM address register 81 is designed internally so that independent control is exercised over the four (4) high, middle and low order bits in each twelve (12) bit address produced thereby so that the addressing technique employed is organized along the same lines as the read only memory 80 whereupon the four (4) high order bits of each address designate a major page, the middle four (4) bits of each address designate a minor page and the lower four (4) bits ~esignate a unique sixteen (16) bit instruction word within a minor page. Therefore, the ROM address register 81 is internally organized into three, four (4) bit sections such that each section provides~our of twelve (12) bits required to be present in the output thereof applied to the twelve (12) bit address cable 86 as an address for the read only memory 80. For this reason three eight (8) bit input, four (4) bit output multiplexers, which may take the form of 8233 MSI chips made by SIGNETICS CORPORATION are employed wherein the 105~911 first such multiplexer provides a four (4) bit output directed to the high order bits associated with the twelve (12) bit address, the second multiplexer provides a four (4) bit output associated with the middle four (4) bits associated with the twelve (12) bit address and the third multiplexer provides a four bit output associated with the lower four (4) bits of the twelve (12) bit address. The multiplexer, or more particularly, the three (3) multiplexers present in the ROM address register 81 are arranged to pro-vide either twelve (12) low order "B" bits from the read only memory 80, twelve (12) "AB" bits from the return address register 82, twelve (12) "EA" bits from an external addressing source or twelve (12) zero (0) bits at the output thereof. For this reason, the ROM address register 81, as shown in Figure 2, is connected through a sixteen (16) bit instruction word cable 87 to the sixteen (16) bit instruction word bus 20 and through a twelve (12) bit address cable 88 which is connected both to the return address register 82 and to a twelve (12) bit external address cable 89. As will be apparent to those of ordinary skill in the art from the internal organization of the ROM address register 81 mentioned above, high order bits AB8-ABll from the twelve (12) bit address cable 88 are connected to four of the inputs to the high order multiplexer while in similar manner, bits B8 -Bll from the sixteen (16) word instruction word cable 87 are connected to the other four inputs of the high order multiplexer. Similarly, bits AB4-AB7 from the twelve (12) bit address cable 88 are ~ ` ~OS'~911 connected to four inputs of the middle multiplexer and the bits B4-B7 from the sixteen (16) bit instruction word cable 87 are connected to the remaining four inputs of this multiplexer. The four low order bits from the twelve (12) bit address cable 88 and the four low order bits from the sixteen (16) bit instruction word cable 87 are connected in similar manner to the eight (8) inputs of the low order multiplexer. The particular output which is supplied by ~` each of the three multiplexers for addressing the ROM 80 ("AB" bits, "B" bits, a combination thereof, or all zero bits) is determined by the particular input select supplied to each of the multiplexers. The remaining bits applied from the sixteen (16) bit instruction word cable 87, bits B12 - B15, are employed within the read only memory address register 81 for logic purposes which are not presently deemed appropriate for discussion.
The four outputs of the high order multiplexer, comprising either Zero bits, bits AB8-AB~l or B8-Bll are applied directly to four inputs of the next absolute address register present within the ROM register 81 as aforesaid.
The next absolute address register connected to the output of the high order multiplexer, may comprise four flip flops, which are preferably embodied on an MSI chip such as a 7475 chip conventionally available from the Texas Instrument Corp.
The outputs of the next absolute address register are connected directly to four inputs of an output addxess register, which may again take the foxm of four flip flops ~c~
..~
.. . . .

:105;~911 preferably embodied on an MSI chip of similar nature to that described for the next absolute address register. The output register provides the four high order outputs on the twelve (12) bit address cable 86 connected to the read only memory 80 and hence acts to define the major page addressed. The relationship between the next absolute address register and the output address register associated with the four (4) high order output bits is such that the output presently being applied to the four high order inputs of the read only memory 80 is loaded in the output address register while the next succeeding address is loaded in the next absolute address register and subsequently transferred to the output register upon an appropriate clock pulse which follows the addressing of the read only memory 80.
The output of the second multiplexer, which provides a four bit output comprising either Zero bits, bits AB4- AB7 or bits B4-B7, is also applied through a four (4) bit next absolute address register and a four (4) bit output address register to the central four bits of the twelve (12) bit address cable 86 for application to the read only memory 80 and act to designate a minor page therein. The next absolute address register and the output register associated with the central four (4) bits of the address, may take precisely the same form of conventional flip flop structure mentioned above. Here, however, an adder circuit, which may comprise a conventional MSI chip such as an MSI 7433 chip available from the Texas Instrument Corporation is interposed inter-- - - -, - ~

`` lQ5;Z91~
mediate the output of the miltiplexer associated with the central four (4) bits, as aforesaid and the input to the next absolute address register. This adder is a conven-tional four (4) bit binary ful:L adder which acts to sum the information present on its input lines and adds a one (1) to the resultant sum if the carry input is enabled.
The adder circuit thus receives either Zero bits, bits B4-B7 or bits AB4 - AB7 from the multiplexer wherein the bits AB4-AB7 may comprise either the middle order bits from the return address register 82 or four middle address bits from the twelve bit (12) external address cable 89. In addition, the adder also receives as an input thereto the four (4) middle order bits A4-A70f the previous address supplied to the read only memory 80. For this reason, as shown in Figure 2, tbe ROM address register 81 is connected to an eight (8) bit last address cable 90 which, as will be apparent to those of ordinary skill in the art, receives the eight (8) low order bits from the last twelve (12) bit address applied to the read only memory 80 through the twelve (12) bit address cable 86 from a twelve (12) bit return address cable 91 which merely feeds back the address applied to the read only memory 80 to the return address register 82. The twelve (12) bit return address cable 91 may simply comprise twelve (12) individual conductors, each of which is connected to one of the twelve (12) conductors within the twelve (12) bit address cable 86. Therefore, the stripping of the eight (8) low order bits on the twelve (12) bit return address cable 91 lS simply achieved by merely connecting elght (8) individual conductors, which may be present within the eight (8) bit last address cable 90 to the eight (8) low order conductors within the twelve (12) bit ; 5 return address cable 91. Of the eight (8) bits which are applied to the eight ~8) bit last address cable 90, the four (4) high order bits A4-A7 therein are applied as gated separate inputs to the adder connected intermediate the middle order multiplexer and th~ next absolute address register therein. Accordingly, the adder sums the output of the multiplexer, which may be Zero (0)~ connected thereto and the four (4) intermediate order bits A4-A7 from the last address and the resulting sum may then be incremented, if appropriate, and thereafter loaded into the next absolute address register for s~bsequent loading in parallel into the output address register associated with the middle four (4) order bits for subse~uent application to the read only memory 80 in the next address. Thus, the adder may increment by ONE (1) the sum of the four (4) middle order bits A4-A7 from the last previous address and the output from the multiplexer which may comprise, as aforesaid, either all Zero bits, the middle order bits AB4-AB7 from the return address register ~2, the middle order bits B4 - B7 ~-from the read only memory 80 or the middle order external address bits EA4 - EA7.
The portion of the read only memoLy address register 81 associated with the lower order bits may comprise the same structure as the portion thereof associated with the middle ~05~91~

order address bits. Thus, the four (4) outputs from the low order multiplexer are applied to a four (4) bit binary full adder which receives both the output from the multi-plexer and the lower order four (4) bits Ao-A3 of the pre-vious address from the eight (8) bit last address cable 90. This second adder therefore may act to selectively increment the sum of each of four (4) low order bits and the output of the multiplexer and apply these bits to a next absolute address register associated with the four (4) low order bits for subsequent application to an output address register which is also associated with the four (4) low order bits and thereby uniquely defines one of sixteen (16) instruction words. Thus, the low order bits are processed in the same manner as the middle four (4) order bits so that the low order bits associated with an address are produced. The twelve (12) address bits produced by the ROM address register 81 in the manner briefly described above are applied to the read only memory 80 through the twelve (12) bit address cable 86 and returned through the twelve (12) bit return address cable 91.
The common status bus 21 is also connected through a single bit status conductor 92 to the ROM address register 81. More particularly, the condition of the common status bus 21 is applied after logical processing to the select input on the multiplexer associated with the four (4) low order bits which define, as aforesaid, the individual words within a minor page. In this manner, the condition of the common status bus 21 will cause, in a manner to be more fully ; . . - ~

~ os~9~
described, a branch operation to occur in the addressing sequence of the read only address register 81. Briefly, it will be recalled from the organization of the read only memory 80 described above, that such organization caused the formation of major pages within the memory wherein each major page in-cluded 256 instructions each of which was sixteen (16) bits wide. These major pages are further divided into minor pages, each of which includes 16 words each of which is sixteen (16) bits wide. Whenever a branch instruction is read from the read only memory 80, read only memory bit Bll will be a ONE (1).
When the read only memory bit Bll, as contained in any in-struction applied to the sixteen (16) bit instruction word bus 20 is a ONE (1), the Blo bit contained in that instruction which may also be a ONE (1) under these conditions is exclusively ORed at the ROM address register 81 with the condition in-dicated on the common status bus 21. When the common status bus 21 also resides at a ONE (1) level, indicating that some-thing has occurred at one of the peripherals, the result of the exclusive ORing will be positive. Under these conditions, - 20 the four ~4) low order bits Bo~B3 from the read only memory are supplied through the multiplexer associated with the low order bits and added with the low order portion of the previous address in the adder and then supplied through the next absolute address register, and the output address register so that the resulting four (4) low order bits will be a part of the next address applied to the read only los~9il t memory 80 by the ROM address register 81. This will cause, as will be apparent from the organi~ation of the read only memory 80 described above, a branch within a minor pa~e or an intra minor page branch operation which is relative to the previous address to take place, and as will be apparent, minor page branch or -jump operations and major page branch or jump operations may be obtained through similar manipulations of the middle order and high order bits of the addxess in response to conditions on the common status bus 21, the output of arithmetic lo~ic unit 84, as shall be seen below or a programmed sequence of events.
The condition if ROM bit Blo is a status qualifier determinative of the condition on the common status bus 21 which shou~d obtain for the br~ch operation to occur and both 0~7E (1) and ZERO (O) conditions may be selected.
Accordingly, the multiplexers, adders, next abso-lute address registers and output address registers within the ~OM address register 81, serve to ~orm a twelve (12) !.
bit address for application to the read only memory 80 through the twelve (12) bit address cable 86. The multiplexers are used to select eight the twelve (12) low order "B" bits from .the ROM, all Zero bits or the twleve (12) "AB" bits which may comprise twelve (12) "A" bits from the return address register 82 or the twelve "EA" bits from an external addressing source.
The adders, which act upon the eight (8) low order bits of the twelve (12) bit address word to be ormed, sums the information present on its input lines and adds a one (1) bit to the resultant sum if the carr~ input is enabled. The output from the adders are appli:ed in parallel to the next absolute address registers with respect to '.he eight (8) low

5 ~ 9 ~ ~
order bits while the outputs from the hi~h order ~ultiple~e~
are applied directly to the next absolute address register associated therewith. From there, the twelve (12) blt address is clocked into the output address re~isters, and onto the twelve (12) bit address cable. Combined, these major elements and the associated gatin~ circuiTrY provlde the means by which sequential, intra minor and ma~or pa~e branch or ~ump, extra minor and ma~or page branch or ~ump9 extra minor and ma~or pa~e branch or ~ump and return and external addresses are formed. The gating circuits decode the ln~ormation contained in the instructinn word from the read only memory 80 to determine which one o~ the ~ive (5) basic addresses will be rormed. T~cally, the ROM address register 81 forms sequential addresses unless other~dse directed by a decoded function from the read only memory ~nstruction word.
The return address register 82 comprises a twelve (12) bit wide, rour (4) word deep push down stack which ~s employed whenever extra page branch and return operations are utilized to address the read only memory 80. The return address register 82 may there~ore comprise A conventional push down stack which is surriciently wide to accommodate the ~welve (12) bit words employed to address the read only memory 80. The return address register 82 runctions in the conventional manner Or a push down stack to store, when .

;, .
. . .
.. _ . . . .. . . .. . . . . . .. _ . . . . .. . . ... . .. . . ... , . . . _, . _ . , , , , _ ,. . ..

~OS;~911 enabled, each address word applied thereto in a succeeding word location such that the first address word applied is stored in a top word location and thereafter when a succeed-ing address word is supplied, t:he succeeding address word is inserted into said top word loc:ation while the address word initially stored therein is pushed down into the next word location and this operation continues as each successive address word, up to the full limit of the push down stack, is received. Conversely, when enabled for readout, the address word stored in the top word location is read out first and each address word stored in lower word locations is pushed up so that the next to last address word stored is, after one readout from the return address register 82 stored in the top word location. In this manner, the return address register 82, acts in the conventional manner to read out words inserted therein on a first and last out basis.
Although a four word deep stack has been discussed in association with the return address register 82, it will be readily appreciated by those of ordinary skill in the art that additional storage facilities may be provided if branch and return operations, involving more than four (4) returns within a given program sequence are required.
An address word input to the return address register 82, as shown in Figure 2, is provided by the twelve (12) bit return address cable 91 which is connected thereto.
The selective enabling of the return address register 82 for appropriate push downand push up operation is accomplished upon the decoding of "B" bits from the read only memory 80.

~ .

-1~5;~91~L
Instruction words from the read only memory 80 are applied through the common instruction word bus 20 to the return address register 82 through a sixteen (16) bit instruction word cable 93. Thus, in a manner more fully described in the above identified microprocessor application, whenever a jump or branch and return operation is defined by the instruction word read from the read only memory 80, the return address register 82 will be selectively enabled for a push down operation by the B bits applied thereto from the common instruction word bus 20. Under these conditions, the last twelve (12) bit address word applied to the read only memory 80 from the RO~ address register 81 through the twelve (12) bit address cable 86 will be additionally inserted ir.to the return address register 82 upon its application thereto through the twelve (12) bit return address cable 91. Subsequently, when the return address register 82 is enabled for a push up operation from "B" bits decoded from the common instruction word bus 20, the previously stored instruction word applied thereto from the twelve (12) bit return address cable 91 will be read out from the return address register 82, applied 'o the ROM address register 81 through the twelve (12) bit address cable 88 incremented by ONE (1) at the read only address register 81 and applied through the twelve (12) bit address cable 86 to the read only memory 80 so that the read only memory 80 may receive the next address in the returned to sequence.
The return address register 82 thereby provides, in a manner we:ll known to those of ordinary skill in the art, a branch or jump and return capability in the addressing arrangement employed for the read only memory 80. This means that even ~: ~os~9~
~: though a single word addressing technique is employed, up to four branch and return subcycles may be utilized in ` conjunction with a single addressing sequence. Thus, it is seen that the read only memory 80 receives twelve (12) bit address words from the ROM add.ress register 81 and,in response to each such address word, a sixteen (16) bit in~truction word is read out and applied to the common instruction word bus 20. The sixteen (16) bit instruction word applied to the common instruction word bus 20 may be employed to control the various peripherals utilized in the instant embodiment of the automatic writing system and,in addition thereto, may be employed to control the subsequent action of the ROM address register 81 and the return address register 82. In addition, each twelve (12) bit address applied to the read only memory 80 from the ROM address register 81 is additionally returned through the twelve (12) bit return address cable to the return address register 82 where it may be employed to store the departure address for a branch operation and is partially applied through the eight (8) bit last address cable 90 to the ROM
address register 81 for incrementing wherein a new address which is incremented by one is applied as the next address for the read only memory 80.
TH_ PROCESSING AND COMPUTATIONAL PORTIONS OF THE MICROPROCESSOR
The processing and computational portions of the microprocessor indicated by the dashed block 16 are associated with the general purpose registers 83, the arith-metic logic unit 84 and the main register M. Although details of the . . .
: ' , , `, ': ` ' " ` ~

~05'~9~1 computational and processing portion of the microprocessor indicated by the dashed block 16 may be found in Figures 22 and 24, the structure and general operation of this portion of the microprocessor will be briefly described to sufficiently acquaint the reader with operation thereof to a degree which is appropriate to an understancling of the embodiment of the automatic writing system set forth herein. The main register M comprises an eight (8) bit storage register which acts as shall be seen below as a holding register for each eight (8) bit data word applied to the common data bus 19. Thus, the main register M may comprise a single one (1) by eight (8) bit MSI chip such as a 7495 MSI chip available form the Texas Instrument Corporation. The main register M therefore contains sufficient storage for only a single eight (8) bit character and hence, as shall be seen below, whenever data is being applied to the common data bus 19 at a rate which exceeds that at which the microprocessor may manipulate data, data characters from the main register N must be placed in temporary storage elsewhere. The main register M acts as a conventional holding register in that each eight (8) bit data character introduced to the common data bus 19 by a peripheral or from the read only memory 80 is initially placed in the main register M

, -lOS'~911 prior to its transfer to another peripheral. Accordingly, it will be appreciated that the main register M acts to store each data character which is transferred or otherwise manipulated among peripherals in the instant automatic writing system according to the present invention.
The main register M is employed to provide a holding function so that each eight (8) bit data character intro-duced to the common data bus 19 for processing and storage within the automatic writing system according to the instant invention may be inspected prior to forwarding to a desti-nation peripheral whereupon data processing or manipulation when appropriate, may be carried out by the microprocessor indicated by the dashed block 16 prior to the forwarding of such eight (8) bit data character. Each eight (8) bit data character present on the common data bus 19 is inserted, in parallel, into the main register M through the arithmetic logic unit 84 and may be applied, depending upon whether or not inspection or processing is required, either directly from the main register M to the common data bus 19 or may be inserted into the arithmetic logic unit 84 for logical processing. For this reason, the main register M is connected to an eight (8) bit input cable 94 and an eight (8) bit out-put cable 95. The eight (8) bit input cable 94 is connected intermediate the arithmetic logic unit 84 and the main register M and may comprise eight (8) parallel conductors each of which carries one output bit AI,Fo ~ ALF7 from the arithmetic logic unit 84. The eight (8) bit output cable 95 lOS'~
: . is connected ~o receive the output Or the main re~.ster M
- and is furtner connected 'o selectively aoply such output to either the co~on data bus 19 or ~s an input to tr.
-. arithmetic lo~ic unit 84. Accordin~ly, as shown in Figure 2 the ei~ht (3) bit output cable 95 is connected to receive the eight parallel bits of each data character loaded into the main re~ister .~ wherein such eight (8) bits are designated Mo -M7 and apply the outout o~ the main register M
to a pair o~ branched output cables 96 and 97, wherein each 1~ branched output cable has a gated input controlled by instr~cti~ns present on the common instruction word bus 20 as provided by the read only memory 80. The ~ated inout for ~ ~he pair of branched output cables 96 and 97 may take the conventional rorm o~ a plurality o~ A~D gates which are 1~ controlled by the decoded "3" bits ~rom the common instruction word bus 20. Thus, if the gated input to the branched output cable 96 is enabled by the bits decoded from the co.~mon word bus 20~ data is applied rrom the main regi:s'er M to the com~on data bus 19 while when the input to the branched ou'put cable 97 ls enabled by such decoded "B" bits, the eight (8~
bit character present in the main register ~ is ap?lied, as shall be seen belo~, as an input to the arithme~ic logic unit 84 where logical operations and manipulations may be performed therewith. B bits for controlling the output o~ the main re~ister M are applied ~rom the com~on instruction word bus 20 through a si~teen (15? bit ins'ruction word cable 98 and such "~" bits as described above, are decoded and employe~ to -- 79 _ .

. . ~ . . . .
.. . . .
. - . . , - .` . . .

~0~911 control the selective application o~ the output of the . main register M to ~he branched conductors 96 and 97.
Furthermore, as sha,ll be seen belo~J, should data be applied to the common data bus 19 at a rate which exceeds the mlcroprocessor's ability to handle such data ~or the program sequence then in progress5 each el~ht (8) bit data character present in the main register M may be applied to the co~mon data bus 19 for insertion lnto ~he general purpose re.~isters 83 rather than ~or application to a peripheral.
' The arithmetic logic unit 84 may comprise a conventional eight (8) bit arithmetic logic device capable o~ per~orming arithmetic ~unctions such as addition, sub-, traction, decrement, straight trans~er and magnitude com-parison as well as logical operations such as Exclusive OR, comparator, Al~NAND~ or NO~. The arithmetic logic uni~
employed for the purposes of the instant invention may comprise a pair o~ 74181 MSI chips conventionally available from the Texas Instrument Corporation, and, as shall be seen below,is utilized to perform all of the arithmetic and logic ~unctions employed in the present invention. The output of the arithmetic logic unlt is connected through the ei~ht (8) bit input cable 94 to the input o~ the main register M as a~oresaid and takes the form of eight (8) parallel bits ALFo ~ ALF7 in-the form o~ a data character. The arithmetic logic unit 84 accepts ei~ht (8) bit character data directl~
from the cor.lmon data bus 19, from the main register M on branched output cable 97 or from the general purpose registers 83. Eight (8) bit character data from the common data bus 19 is applied to t,he arithmetic logic unit - 80 _ : .

`` ~OS;~9lP
.
84 through an eight (8) bit input cable 99, which may take the form of eight (8) parallel conductors. In addition, the arithmetic logic unit 84 is connected at a second input thereto to an eight (8) bit conductor 100 which serves to provide an input from either the general purpose registers 83 or the main register M. The eight ~8) bit input cable 100 may also take the form of eight (8) parallel conductors, it being appreciated that inputs thereto from the main register M are applied thereto from the branched output cable 97 under the control of instructions supplied to the main register M from the common instruction word bus 20, which instructions control the selec~tive enabling of the input gates associated with the branched output cable 97. Conversely, as shall be seen below, inputs to the eight (8) input cable 100 from the general purpose registers 83 are selectively enabled from instructions present on the common instruction word bus 20 from the ROM Program 80 and applied to the general purpose registers 83 through in-struction cable 102. The arithmetic or logical function exhibited by the arithmetic logic uni~ 84 is controlled by ~ 20 operational commands applied to the arithmetic logic unit 84 from the common instruction word bus 20. The common in-struction word bus 20 is connected to the arithmetic logic unit 84, and more particularly to the control inputs thereof, through a sixteen (16) bit instruction word cable 101 which may simply comprise sixteen (16) parallel conductors. In addition, a logic output is provided from the arithmetic logic unit 84 to the ROM address register 81 on a . ~05~9~1 sin~le bit branch conductor 106. The lo~ic level, i.e., ONE (1) or Z~RO (0)~ on ~his conductor is indicative " of the result o~ a logical ope~ation performed in the arithmetic lo~ic unit 84 and is employed to cause the - 5 ROM address register 81 to branch upon the receipt of a branch instruction ir a cer~ain logi~,al result is obtained~ in the sa~e manner as branching is achieved in response to branch lnstructions and true or false conditions on the com~o~ status bus 21. Thus, i~ a branch instruction is issued requirinr a branch ir a comparison is obtained, the comparison is per~ormed in the arithmetic logic 84 and the resul~ thereo~ is placed on the branch conductor io6 to initiate the propriety o~ a branch operation.
The operation o~ the arlthmetic lo~ic unit 84 ~ay be simply characterised as performin~ t~ro princip21 functions. The first ~unction is to si~ply tr~nsfer ei~ht (8) bit character dat~ ~-om the co~mon data bus 19 ~o the nain re~ister M. In this role, the straight transfer inputs to the arith~etic logic u..it 84 are enabled by the instruc~
tions present on t,he common instruction wo-d bus 20 and character data in the for~. o~ ei~ht (8) bits in parallel ar~
thereby applied from the com~on data bus 19 through th~
~iht (8) bit input conductor 99 through the arithmetic 106ic unit 84 and l;hrough the ei~iht (8) input cable 94 to the ' ~2 -.:: ' ' ' ':, ~: lOSZ9~
input of the main register M. Once loaded into the main register M, such data characters may be simply returned to the common data bus 19 for application to another peripheral or returned through the branched output cable 97 to the S arithmetic logic unit 84 for processing. The second principal function of the arithmetic logic unit 84 is to process the eight (8) bit data characters returned thereto from the main register M or otherwise inserted in the arithmetic logic unit 84 from the common data bus 19. The nature of the processing steps performed, which take the form of the various arithmetical and logic operations which the arithmetic logic unit 84, as aforesaid, may accomplish is determined by function instructions applied to the arithmetic logic unit 84 from the common instruction word bus 20. For instance, when a search of the record media for a designated location operation is initiated at the keyboard means 1, the microprocessor indicated by the dashed block 16 will be required to search the record media until an address designated by the thumb-wheels at the keyboard means 1 has been located. Under these circumstances, the address set at the thumbwheels will be inserted into the general purpose register 83 and a selected address read from the record media and applied to the common data bus 19 will be compared against ;
` -~OSZ9li ~ the thumbwheel address by the arithmetic logic unit 84 to : ascertain if an identity is present. Thereafter, the microprocessor will cause the record media transport .` being searched to stop through a branch operation resulting from a true level on the branch conductor 106 and indicate to the operator that a successful search has been ;: initiated and completed. Simi:Larly, in edit operations where words, lines, or paragraphs are selectively read out and identified within the automatic writing system by the punctuation which follows such words, lines or paragraphs;
data characters representative of the selective punctuation are selectively read from the read only memory 80, and applied to the common data bus 19 for subsequent insertion into the main register and reinsertion into the general purpose registers 83. Thereafter, each character applied to the common data bus 19 during the editing operation, such as characters read from the record media for subsequent application to the printer, is compared against the character representing the selected punctuation and when an identity is achieved between the characters being compared, the edit operation is stopped through the branch condition present on branch conductor 106 so that additional information from the keyboard means or the like may be inserted onto the common data bus 19.
The various utilities of the remaining arithmetic and logic functions of the arithmetic logic unit will become apparent 105~9~, from the subsequent portions of the instant disclosure.
Accordingly, it will be seen that the arithmetic logic unit 8~ performs, under program control, all of the processing operations required in the instant embodiment of the ; 5 automatic writin~ system according to the present invention and provides branch conditions, ~hen appropriate, to the R0~1 address register 81 in response thereto~
The general purpose xegisters 83 comprise two (2) standard scratch pad memories each of which contains storage for 16 eight (8) bit charactersr The two general purpose registers, designated hereinafter as the G and H registers, may take the form of conventional scratch pad memories preferably in the form of ~lSI chips. For instance, each of the G and H registers may be formed by a pair of four (4) 15 ~ bit SIG~ETICS 8225 ~I chips connected such that one chip accepts the lo~ order four (4) bits of each character and the second chip accepts the higher order four (4) bits o each character. The G and H register within the general purpose register block 83 are connected in cascade so that common inputs and outputs for each register are commonly connected wherein the input and output of each register is controlled by the enabling inputs thereto. The enabling intpus for the G and H registers are controlled by decoded B
bits ~rom the read only memory 80 supplied thereto through ihe common instruction word bus 20.
The general purpose registers G and ~H are connected to the common instruction word bus 20 through a si~teen (16) ~r~ r~

. .

- ~05'~911 bit instructio-l word cable 102. Thus, depending upon the instruction present on the common instruction word bus 20, inputs suppli~d to the common eight (~) inputs of the G and H registers will ba written into storage in the register whose inputs are enabled and conversely, outputs fxom either the G and H registers will be appropriately gated, under program control, to the common outputs o~ the G and H
registers. ~le conmon outputs of the G and H registers are connected to the eight (8) bit :input cable lO0 so that the designated contents o~ either the G or H register may be selectively applied to the eight (8) bit input cable lQ0 as input bits ALBo ~ A~B7 for application to the arithmetic logic unit 84, as aforesaid. A data character input to the general purpose registers G and H is supplied from the common data bus l9 through an eight (8) bit input cable 103 to the common inputs of the G and H registers. Accordingly, depending upon the co~mard instructio~ or the co~mon instruction word bus 20, eight (8) bit data characters from the common data bus l9 may be selectively loaded into selected ones of the storage locations in the G or H registers. ¦`
The G and H registers, as is conventional for any scratch pad memory, provide a plurality of functions, further described below, for the automatic writing system according to the present invention. Of the sixteen (16) word storage locations available in each of the G and H registers, one word location in the G register is reserved for the character then being processed such as for cases where a data character .` I .

i ,:

~0529~1 initially loaded into the main register M must be placed in temporary storage so that subsequent processing operations may be performed in a later cycle without interrupting the transfer of data to the single word location within the M
register. In addition, a plurality of word locations in both the G and H registers are reserved for overflow `- characters from the main register M. These plurality of word locations are employed when the transfer of data characters into and from the main register M can not keep up with the application of data characters to the common data bus 19 from a peripheral and in this mode of operation, the G and H registers act to provide an N-key roll over function.
In addition, there are many instances where a data character which has been inserted in the main register M and thereafter inserted into the arithmetic logic unit 84 for processing results in a plurality of intermediate data characters prior to the formation of the resultant character for the processing operation then being performed. In these cases, such intermediate character or characters must be stored for subsequent processing operations in the arithmetic logic unit 84 and storage for such characters is provided within the plurality of reserved word locations within the G and H registers. Furthermore, preassigned word locations within the G and ~ registers are provided for certain specified functions of the automatic writing systems which are pre-set at the keyboard. For instance, left and right margin settings as well as the range of the right hand margin lOSZ91~
setting are provided in storage within the G register and a preassigned word location is also employed to keep track of the number of tabs which have been executed. Additionally, the block numbers from the digi.tal counters employed with the record media transport are inserted in preassigned word locations within the G register for use in the automatic incrementing of block addresses recorded on the media.
In addition, other preassigned word storage locations are employed within the G and H registers to accommodate operator settings required for the implementation of particular functions of the instant invention; however, a description of the data stored shall await a description of the functions with which they are associated. Thus, at this juncture in the description of the instant embodiment of the present invention, it is sufficient to note that the general purpose registers 83, which comprises the G and H registers, afore-said, act to store operator set parameters and the state of selected conditions within the automatic writing system in the form of word, character, or bit information, for use in the arithmetic or logical processing operations which take place in the arithmetic logic unit 84.
THE COMMON DATA BUS
The remaining portions of the automatic writing system depicted in Figure 2 comprise the common data bus 19, the common instruction word bus 20, and the common status bus 21. The common data bus 19 comprises 8 parallel conductors each of which is employed to convey one bit of the eight (8) bit data characters which are applied to this bus. Each - - 105'~9~
conductor within the con~on data bus 19 is appropriately junctioned to one of the conductors in each of the eight (8) bit data cables which connect the common data.bus 19 to each of the peripherals and the registers and arithmetic logic unit 84 within the microprocessor i.ndicated by the dashed block 16 so that a commonly ordered bit may be selec-tively gated to or from its associated bit conductor within the ~l~non data bus 19 by each of the peripherals and the d.~t~ handling apparatus within the microprocessor. Thus, as will be apparent to those of ordina.ry skill in the art, the common data bus 19 acts as a common eight (8) bit path through ~rhich all of the eight (8) bit data characters within the automatic writing system are conveyed between the peripherals and the microprocessor indicated by the dashed bloc~ 16. Accordingly, if focus is placed merely upon tlle flow of eighi (8) bit character data to be procèssed within the instan~ emboaiment o~ t~e a~to~at.ic writing sysiem according to the present invention, it will be appreciated that each eight (8) bit data character is selectively gated, under program control, onto the common ei~ht (8) bit data bus and taken therefrom by an enabled peripheral or register within the microprocessor indicated by the dashed block 16.
Therefore, by utilizing the high rates of data manipulation available with conventional data processing techniques, single eight (8) bit character information may be selectively gated to and from the common data bus 19 while a plurality of progxam steps are carried out with respect thereto.
The eight bit data cables 28, 31, 3~, 40, 57, 63, lOSZ9~1 67, 95, 96, 99 and 103 may each be viewed as ~enerally ~- acting to convey eight (8) bit character information, representing either alphanumeric characters or function information, which information may have been manipulated while bein~ conveyed to and from an associated peripheral or register and the common data bus 19. EIowever, there are instances in the operation of this embodiment of the automatic writing system ~ccording to the ~resent invention wherein data, not originating at the keyboard means 1 is reauired, such as the ~aper index and carria~e movement data necessary for the appropriate ooeration of the printer means ? For these functions, it is necessary that constants in the form of ei~ht (8) bit characters be applied to the co~on data bus 19 so that such constants may be selectively ~ated to the appropriate peripheral when a function of that peripheral requirinC the a?~lication of such constants is mandated. For this reason, it is necessary to have the capability of applying such constants from the read only memory 80 to the co~mon data bus 19; however, as was seen above in con~unction with the description of the read only memory 80, the output of the read only memory 80 takes the form of sixteen (16) bit instruction words which are only applied throu~h the sixteen (16) bit instruction word cable 85 to the common instruction word bus 20. Therefore, to provide a:n appropriate expedient for conveying selected ~roups of eight (8) bits, which take the form of constants, from each sixteen (16) bit word read from the read only -- 90 -- .

- - . . ..
.
.: : ., . .. -1~5'~9~
meniory 80 to the com.~.on data bus 19 an ei~ht (8) bit input cable 105 is connected intermediate the common lnstruction ;/ord bus 20 and the common data bus 19. The eight (8) bit ~nput cable 105 may ComDriSe ei~ht parallel conductors each o~ which is connected to one of the bit con-ductors within the common data bus 19. The inputs to the ei~ht t8) bit input cable 105~ however, are connected to the output of a conventional multiplexer whose in~uts are selectively connected to preàetermined ones of the bi~ con-ductors in the common instruction ~rord bus 20. More partic-ularly, the multiplex~r inputs are connected to the bit conductors associated with instruction word b ts, B4 throu~h Bll of the com~on instruction wor~ bus 20 and whenever the multiplexer is appropriately enabled by a read-only m.emory to data bus com~and generated by decoding selected ones of the bits in an instruction word read from the read only memory 80, bits ~4 through ~11 Or that instruction word are applied fro~ the common instruction word bus 20 through tihe eight (8) bit input cable 105 to the co~mon data bus 19. In this manner, constants rrom the read only memory 80 may be applied to the com~on data bus 19 for utilization ln the control o~ the various peripherals connected to ~he co~on data bus lg as well as in the various data processing manip-ulations which are perfor~ed by the arithmetic la~ic unit 84.
For the purposes Or appreciatin~ the flow of data to be processed within the instant embodi~ent Or the present invention, a brief description of the ~anner in wllich daka is , ` lOS291~
propagated among the peripherals and the microprocessor indicated by the dashed block 16 is appropriate. As will be appreciated by the conventional use of the arrowheads ; adopted in Figure 2, the eight (8) bit data cables 28, 31, S 39, and 40, connected intermediate the common data bus 19 and the keyboard interface 26, the printer interface 27, the read/write buffer 35, and the read only buffer 36, respective-;~ ly, are full duplex eight bit conductors which allow data tobe either applied from the peripheral to the common data bus 19 or conversely allow data to be conveyed from the common data bus 19 to the peripheral associated with the full duplex cable. This means that the keyboard means 1, the printer interface 27, the read/write buffer 35, and the read only buffer 36 may input data into the system or derive data therefrom. The printer means 2, as shall be seen below, only receives data from the system for the printing operations carried out thereat; however, the full duplex eight (8) bit data cable 31 is necessary because the printer interface 27 may act as a system input in applying carriage displacement data thereto. The read/write decoder means 50, the general purpose registers 83, and the arithmetic logic unit 84, nowever, may only derive eight t8) bit character data from the common data bus 19 as is indicated by the single arrow present on the eight (8) bit input cables 57, 103, and 99 associated, respectively, therewith. Conversely, the read/write read decoder means 51, the read only read decoder means 54, and the main register M may only apply data to the , - ~05Z9~ - 93 -co~mon dat2 bus 19 tnrough the eight (~) bi~ data cables 63, 67~ and 96 associa'ed therewith; it belng recalled that the output lro~ the main reglster M ~ay either be directly applied to the co~mon data bus 19 throush the cable 9~ or reinserted into the arithmetic lo~ic unit 84 for processing. ';livh these input/output ~unctions Or the various peripherals and the processing apparatus ~;~thin the ~icroprocessor indicated by the dashed block 16 in mind, the ~low of eight (8) bit character data among the peripherals, the microprocessor indicated by the dashed blocX 16 and the co~mon data bus 19 may be readily appreciated.
In a typical thou~h highly simplified printing ope`ration wherein alphanumeric and ~unction information generated at the keyboard means 1 ~ is to be prlnted at the printer means 2 without the recordation Or such generated inrormation on a record media, each key depressed at the keyboard means 1 ~ill result in the conventional manner in the generation of an eight (8) bit character're-presenting either the alphanumeric character or the ~unctional information associated with the key depressed.
Each character thus generated is applied through the keyboard interrace 26 and the ei8ht (8) bit data cable 28 to the,common data bus 19 and no second character will be introduced to the common data bus 19 rrom the ori~inat:ing peripheral, until the previously introduced ei~ht (8) bit character is processed and supplied to a destination device so that the eight t8) bit data bus is clear with respect to the previously processed eight (8~ bit character prior to the introdu^tion Or a sub-sequent character. As shall be seen below this is accom-~ . , .
-~, ' -105'~9~1 plished through the action of the common status bus 21 and the common instruction word bus 20.
At a time corresponding to the enabling of the keyboard interface 26, which allows each eight (8) bit data character to be gated onto the common data bus 19, the arithmetic logic unit 84 and the main register M are also enabled in a manner to accept e:ight (8) bit data information from the common data bus 19. The arithmetic logic unit 84 is enabled, under program control, for a straight transfer operatior. to input information directly to the main register M. Therefore, when the eight (8) bit data character is applied to the common data bus 19 through the eight (8) bit data cable 28 such eight (8) hit data character is applied from the common data bus 19 through the eight (8) bit data cable 99 to the arithmetic logic unit 84 and transferred therefrom through the eight (8) bit data cable 94 to the main register M where it is loaded into the single eight (8) bit character location therein. This operation, as shall become more apparent below, is accomplished under program control and results from instructions from read only memory 80 designated keyboard to data bus and data bus to M. As this character is merely to be printed, it is subsequently applied in a succeeding instruction from the main register M through the eight (8) bit conductors 95 and 96 to the ommon data bus 19 and from the common data bus 19 to the eight bit data input cable 31 which is connected intermediate the common data bus 19 and the printer interface ~05~9~1 27. Thereafter, the printer interface 27 will apply thls -: eight (8) bit data ch~racter to the printer and the printer logic will cause the appropriate printing of this character.
These transfers result, as shall be seen hereinafter, from programmed instruction words designated main register M to data bus and data bus to printer, while the appropriate timing Or these instructions is achleved through the utilization of status conditions presented on the common status bus 21. Thus, each alphanumeric character or function represented by the eight (8) bit character which results from the depression of a key o.n th~ keyboard means 1 and represents printable informa~on under the pure prin~ing ope~ation ~erein being described resul~s in the application of that eight (8) bit character to the printer means 2 and the appropriate printir.& thereof ~fter such eight (~) bit character is translated t~rough the common data bus 19, the arithmetic logic unit 84, the main register M and again through the common data bus 19 to the printer means 2.
Accordingly, as each eight t8) bit data character is generated at the keyboard means 1, the operating sequence for the straight printing opera~ion here being considered results in the application Or such eight (8) bit character to the printer wherein appropriate action such as the printing of an alphanumeric character, space, carriage return or the llke results.
In the straight printing operation described above, no record meclia was prepared and hence neither the bu~rer lOSZ9~1 storage apparatus enclosed within the dashed block 17 nor the record media control write and read apparatus enclosed within the dashed block 18 was employed. Where a record media is to be prepared, data characters will be conveyed between the keyboard interface 26, the common data bus 19, the arithmetic logic unit 84, the main register M, and the printer interface 27 in the same manner as was described above; however, data is additionally gated from the main register M to the buffer storage apparatus indicated by the dashed block 17 and selectively to the record media control, write and read apparatus indicated by the dashed block 18 through the common data bus 19 in addition to the printer interface 27. Thus, where a printing operation is taking place and it is desired to prepare a record media at the same time, each eight (8) bit data character received by the main register M is selectively gated onto the common data bus 19 and from the common data bus 19 into the read/write buffer 35 through the eight (8) bit data cable 39. The pro-gram instruction necessary to achieve these functions are des-ignated main register M to data bus and data bus to read/write buffer and would ordinarily occur subsequent to the gating of eight (8) bit character information from the main register M to the common data bus 19 and from the common data bus 19 to the printer interface 27; however, any relation between the selective gating of data from the main register M to selected peripherals may obtain.
The relationship between the buffer storage ~OSZ911 apparatus indicated by the dashed block 17 and the record media control write and read apparatus indicated by the dashed block 18 is such that data is only recorded on the record media after a full line o~ characters, which generally correspond to a line o~ material produced by the printer and defined by a carriage return, has been inserted on a per-character basis into the buf~er storage apparatus indicated by the dashed block 17. This relationship obtains because, as is well known to thosè Or ordinary skill in the art, relative motlon between a record media and the recordlng - transducer is required for recording to take place and hence, startin~ and stopping intervals in ~/hich no recording takes place, must precede and .ollow each recording interval.
There~ore, to avoid the wasteful utilization o~ the record 1~ media, a ~ull line of characters are accumulated in the read/write buffer 35 before any recording takes place and once such accumulation is present all of tne characters accumulated are recorded at once so that only one stoppin6 and startin~ interval on the record medium is utilized per 3 line of data recorded. Thus, the burfer storage apparatus indicated by the dashed block 17 is utilized to accumulate data for subsequent recording to provide for the efficient utilization of the record medium and as shall be seen below such buffers are also employed for the reorderlng and maln-36 tenance of data until appropriate recording has been assured.
As each character is supplled by the keyboard means 1 and inserted into the main register M, lt is applied - 97 _ - : : :. . .

~os~9~

to the common data bus 19 for insertion, under the conditions here being discussed, into the read/write buffer 35 as well as being applied to the common data bus 19 for application to the printer means 2. Thus, when a record medium is being prepared, the read/write buffer 35 is selectively enabled to receive input characters from the common data bus in addition to the printer means 2.
` Additionally, once a full line of characters has been accumulated in the read/write buffer means 35, as indicated by a carriage return character, a dump the buffer onto the record media instruction cycle is initiated. This occurs by reading each previously stored character in the read/write buffer 35 onto the common data bus 19, through the eigbt (8) bit data cable 39 and thereafter gating each data character through the arithmetic logic unit 84 to the main register M.
From the main register M, each data character received is gated back onto the common data bus 19 and through the eight (8) bit conductor cable 57 to the read/write decoder 50 for serial conversion and application to the write head present in the read/write station transport 53. This operation also takes place on a per character basis in that each character from the read/write buffer 35 is inserted into the M register and applied from the M register to the read/write station prior to the application of the succeeding character from the read/write buffer 35. However, as both the main register M and the read/write buffer 35 operate at extremely high data processing rates and no printing operation for this . . . ..

~osz9~
transfer takes place, the transfer operation can take place at the maximum speed acceptable to the recording electronics.
This means that prior to the transfer of the first character in a line from the read/write buffer 35, the read/write transport 53 is started and the record media is brought to speed. Thereafter, the entire contents of the read/write buffer 35 applied through the main register M may be dumped onto the record media and the record media stopped at the completion of this cycle while appropriate housekeeping functions, to be explained below, are performed by the microprocessor indicated by the dashed block 16. Therefore, even though the percharacter nature of each transfer is maintained, the recording which takes place at the record media if viewed from the standpoint of starting and stopping the transport may be considered to be a per line recording of the information. Accordingly, it will be appreciated that when a printing and record media preparation operation is being performed, data characters from the keyboard means are introduced to the common data bus 19 and inserted into the main register M on a per character basis. Thereafter, each character so inserted is applied from the main register M to the common data bus 19 for insertion into the read/write buffer 35 and for application to the printer means 2 wherein independent applications of each data character from the main register M to the common data bus 19 are utilized for each transfer. Thus, as far as the generation of each eight (8) bit character from the keyboard means 1 is concerned, the _ 99 _ lOSZ9~1 preparation of a record media while printing occurs only re~uires the selective ga~ing of an additlonal peripheral, the n~ad/write buffer 35, onto the common data bus 19 while the per character nature of the data character translations being employed are maintained. However, at the completion of each line to be printed, ~he read/wrlte buffer 35 is emptied on a per character basis and recorded on a record media at the read/write station so that the previous line is recorded on the record media and the buffer is emptied and readied for the next line of da~a to be recorded.
In the same manner as the key~oard means 1 is employed as an input peripheral to the automatic writing system according to the instant invention, any other peripheral, with the exeption Or the printer means 2 may also be employed as an lnput to the automatic writing system according to the instant invention and the manner in which these peripherals are selectively employed as input and output devices ~Jithin the automatic writing system is determined by the various modes of operation selected at the keyboard. These various modes of operation will be descrlbed in much greater detail below. However, a simplified mode o~
playback will here be illustrated to further acquaint the reader with the techniques with which the interconnection of a plurality of peripherals and a microprocessor to a common data bus 19 may be emp].oyed in a manner such that it matters not awhit from the standpoint of data flow which peripheral is presently being employed as an input device and which .

-- 100 -- .

.

1~)5Z9~l peripheral or peripherals are utilized as output devices.
The simplest playback mode wherein a prerecorded tape is being read and data thère~rom is being printed will now be considered. ~or the purposes of the instant discussion, it will be assumed that a prerecorded record media h~ving the contents of a document which is desired to be prepared, has been loa~ed within the read/write record media transport 53. When this mode of operat~on is initiated at the keyboard by an operator, the read/write record media 53 will, under program control, be energi ed so that a line o~ data, which as aforesaid corresponds to a line of printed material terminated by`a c2rriage return, is read out in series and seriall~ appl~ed ~hrou$h conducto~ 62, to the read/wr~te read decode means 51; it being appreci2ted that what is meant by reading a line is that the read/write record media transport ~3 is brou~ht to speed prior to reading the line and its mo'ion is s~opped at the completlon o~ the line.
Ho~Jever, data is read serially ~rom the medium on a per character basis and each ch~racter in the line appears in a continuing sequence as long as the read/write record media transport 53 is energized. In thls manner, as each serial character is applied to the read/write read decode means 51, it is converted into a parallel ~ormat and applied through the eight (8) bit data cable 63 to the common data bus 19.
Each character so applied to the common data bus 19 is further .
applied in parallel to the main reæister ~ through the etgh~
(8) bit data cable 99, the arithmetic logic unit 84, whlch ~OSZ91~

has been enable for a straight transfer operation and the eight (8) bit data conductor 94. Each data character loaded in parallel in the foregoing manner into the main register M
is subsequently gated, under program control, through the multiconductor data cable 9S and 96 back onto the common data bus 19 and from the common data bus 19 through the eight (8) bit data cable 39 into an appropriate storage location within the read only buffer 36 wherein the particular insertion of a character in storage location within the buffer 36 is accomplished under program control.
This operation will continue until the entire line read from the record media has been loaded into the read only buffer 36 and the movement of the record media within the read/write record media transport terminated under program control; it being apparent to those of ordinary skill in the art that an entire line of characters may be read from the record media on a per line basis and still be processed on a per character basis by the read decoder means 51, the arithmetic logic unit 84, the main register M and the read only buffer 36 due to the high data processing speeds exhibited by the elements which exceeds the maximum available speed capability of the read/write record media transport. Therefore, even though the record media is read on a per line basis, to thereby avoid wasting the record media in a manner which would occur if a per character read and recording technique was employed, the remaining portions of the instant embodiment of this invention still process all such data read from the media.

., . , ~ .
,: . .

~05Z91~
Once the read only buffer 36 has been fully loaded with a line of data, the buffer 36, acting under program control, will apply each character present therein in sequence to the common data bus 19 through the eight (8) bit data cable 40. Each character so applied to the common data bus 19 from the read only buffer 36 is further applied through the eight (8) bit data cables 99 and 94 through the arithmetic logic unit 84 to the main register M where such character is loaded in the single eight (8) bit storage location therein. After such character is loaded into the main register M, the character is subsequently read out in parallel and applied through the eight (8) bit data cables 95 and 96 to the common data bus 19 for subsequent application to the printer interface 27 and the printer means 2 in the same manner as if such data had originated at the keyboard means 1. After each character loaded into the main register M has been applied to the printer means 2, the next character in sequence is read from the read only buffer 36 and loaded into the main register M and this operation continues until the entire line loaded into the read only buffer 36 has been transferred and applied through the main register N to the printer means 2. When the entire line in the read only buffer 36 has been transferred to the printer peripheral, the read/write record media transport is again enabled so that the next succeeding line on the record media is again loaded into the read only buffer 36 in the l~)SZ91~
previously described manner. Thus, the operation of the printer means 2 again takes place on a per character basis wherein the manipulation and translation of data associated with a particular character is completed prior to the transfer of the next eight (8) bit data character to the common data bus 19. Of course, were it desired to duplicate a portion of a record media on another record media, it will be appreciated that reading could take place from the read only station, into the read only buffer 36 while data would be subsequently applied through the main register M
and written into the read/write buffer 35 for ultimate recording on a per line basis at the read/write record station.
Thus, regardless of the peripherals employed, the transfer of eight (8) bit data characters in parallel always takes lS place from an originating peripheral to the common data bus 19, from the common data bus 19 to the main register M, from the main register M to the common data bus 19 and from the common data bus 19 to one or more destination peripherals and each translation of data occurs on a per character basis under program control. The purpose of translating each data character to be transferred through the arithmetic logic unit 84 into the main register M is to allow each such character to be inspected under program control so that functions required by certain data characters may be initiated.
Thus, the common data bus 19 serves as the basic data path through which all data conveyed through the instant invention is accessed, inspected and captured by the various peripherals LOS'~911 and the microprocessor employed.
~ile the ~unction of the common data bus 19 is to convey eight (8) bit data characters throughout the automatic writin~ system, the function of the common instruction word bus 20 is to receive appropriate commands from the read only memoxy 80 and convey such co~mands to enable the peripherals required by an operation specified at the keyboard means 1 and to cause those peripherals and the portions of the microprocessor which handle data and the addressing of the read only memory 80 to function in a manner which is consistent with the nature of the operations specified and the character of the data then being conveyed.
However, as the instant embodim~nt of the automatic writing system according to the present invention is organized on a single address basis, as aforesaid, the manner in which the read only memory 80 is addressed and hence, the instructions applied to the common instruction word bus 20, is provided as a functIon of the var~us indications on the status bus so that the read only memory 80 ma~ be addressed to provide new instructions when a previously issued instruction has been completed and the results of the completion of that instruction indicate whether the same program format is to be completed or a branch to another program format is appropriate to achieve the necessary data processing, manipulation and translation among the peripherals.
THE COMMON INSTRUCTION WORD AND STATUS BUSES
The common instruction word bus 20 may comprise sixteen (16) parallel conductors wherein each conductor - 105 ~

--- 10529~

carries one of the sixten (16) bits (Bo -B15) Or each instruction ~lord issued by tile read only me~ory 80. The :,. ' .;
only input to the common instruction word bus 20 is provided rrom the read only memory 80 through the`sixteen (16) bit t 5 instruction word cable 8~. Outputs from the common lnstruction ~ord bus 20 are, ho~ever, provided to each o.~ the peripherals and each o~ 1;Xe elements ~rithin the microprocessor other than the read only ~e.mory 80 itself, Thus, the common instruction word bus 20 is connected through the sixteen 1~ (16) bit instr~ction word ca~le 29 t~ the keyboar~-interface, .. . . .
.: through the sixteen (16) ~lord lnstruction cab~e 32 to the . printer interface, through the sixteen (16) bit instruction i word cables 47 and 48 to the read/write and read only buffer controls 37 and 38 and through the sixteen (16) bit instruc-tion ~Jord cables 65 and 72 to the rèad/~ritè and read only stat.ion control circuits 52 and 55. The co~mands issued on the common instruction word bus 20 are decoded at each peripheral or more properly, the peripheral control and when - appro~riate to that peri~heral are utilized to control the operation thereo~ in ac~uirin~ or conveying data characters from or to the common dat~ bus 19 and the peripheral's response ; to any such data conveyed or acquired. The commQn instructi.on word bus 20 is also connected through the sixteen tl6) bit instruction ~ord cables 98, 101, and 102, to the main re~ister M, the ar~thmetic lo~ic unit 84, and the general pu.~pose re~isterS ~ and H within ~he data handling section ~f j the microprocesor indicated by the dashed blocic 16. ~he 1 .
, ~ o6 ~

, . . .

lOSZ~l~

command information conveyed on the common instruction word bus 20 to the general purpose register 83, the arithmetic logic unit 84 and the main register N is decoded within each element and when appropriate to that element controls the operation thereof with respect to the data acquired and supplied to the common data bus 19, the operations performed within that element with respect to such data and the manipulation of any data acquired and operated upon with respect to further insertion within one of these three elements of the microprocessor indicated by the dashed block 16. The common instruction word bus 20 is connected through the sixteen (16) bit instruction word cables 87 and 93 to the ROM address register 81 and the return address register 82. The instructions from the common instruction word bus 20 applied to the ROM address register 81 and the return address register 82, are decoded and when applicable to that element are utilized to control the operation thereof. For instance, when the return address register 82 is enabled, the previously issued address word from the ROM address register 81 is placed in the push down stack or alternatively, a previously stored address word is read therefrom to enable branch and return addressing sequences to be employed in the addressing of the read only memory 80. Similarly, the instruc- -tion words applied to the ROM address register 81 are decoded and when applicable to the ROM address register 81 will cause the read only memory 80 to be addressed in a sequential manner or to allow intra-page branch, extra page branch or jump, extra paye branch or jump and return, and external :

: ~05291~
addresses to be employed in the addressing sequence utilized;
it being noted that in branch operations, portions of the instruction are also employed as portions of the address.
In addition, eight (8) conductors present within the common instruction word bit bus, those conductors carrying bits B4 through Bll, are selectively applied to the common data bus 19, in the manner aforesaid so that constants read out from the read only memory 80 may be applied to the common data bus 19 on a selective basis.
In what is tantamount to the reciprocal organi-zation of the common instruction word bus 20, the common status bus 21, which may comprise a single bit conductor, receives at least one input from each of the peripherals employed in the present embodiment of the instant invention and provides a single output to the microprocessor indicated by the dashed block 16. However, as will become apparent below, instruction words present on the common instruction word bus 20 define which one of the several peripherals is to provide an output to the common status bus 21 at a given sampling interval and more particularly, which of the plurality of status inputs from that peripheral is to be applied to the common status bus 21. Thus, at the same time that decoded B bits from the common instruction word bus 20 are determining what peripheral is to be enabled and the action to be taken thereby, such decoded B bits are also defining the status input to be supplied to the common status bus 21 to which the ROM address register 81 will respond to , 91~
provide the next sequential address applied to the read only memory 80 w~ereupon the next program step is initiated. ~hus, although the instant embodiment of the automatic writing system accordin~ to the present invention is organized on the basis of a single address operation, the next address to be applled to the read only memory 80 is generally a function of the previous address supplied and the response obtained on the common status bus 21 or the result o~ a lo~ical operation which takes place at the arithmetic logic unit 84, each of which supplies an input to the - ROM address re~ister 81. The inputs to the common status bus 21 are applied, as aforesaid, through the single - bit status conductor 30 from the keyboard interface 26, through the sin~lè status conductor 33 from the printer interface 27, ~rom the read only and read/write buffer control circuits 37 and 38 ~hrough conductors 45 and 46, and ~rom the read only and read/write station control circuits 55 and 52 through the sin~le bit -status conductors 61 and ~1.
The interrelationship between the manner in which the read only memory 80 is addressed by the ROM address register 81 to supply instruction words to the common instruc-tion word bus 20 in relation to the status condition indicated ` on the oo~mon status bus 21 may best be illustrated by an exemplary pro~ram which simply illustrates the relationship between the manner in which addressing is initiated and subsequently modified in response to the conditions indicated on the co~mo~ status bus 21. For the purposes of the present, simplified explanation, it will be assumed that data entered 1~)5~

- at the keyboard is merely to be printed and a highly simplified program will be set forth; it being appreciated that the detailed program steps utilized will be more fully understood from succeeding portions of the instant disclosure.
When the automatic writing system according to the present invention is energized, an initial clear sequence, under program control is initiatled. During this sequence, the G and H registers are cleared and properly pre set, tape slack is taken up within the record media stations and the printer is initialized by being reset to the extreme left hand margin position, and the keyboard and its associated components are placed in a cleared condition. Thereafter, an idle program is initiated in the microprocessor indicated by the dashed block 16 where the processor essentially waits for an event to occur at one of the peripherals. This is achieved by the cycling of the ROM address register 81 through an initial program sequence in an idle loop which monitors pertinent ones of the status conditions at selected ones of the peripherals for each instruction word read from the read only memory 80 in response to an address from the ROM address register 81. If a flag does not appear on the common status bus 21, the address word is incremented and applied to the read only memory 80 whereupon an instruction 105~9~
word is applied to the common instruction word bus 20 which causes another status condition to be monitored. This sequence of incrementing the address word applied to the read only memory 80 is maintained until each of the status conditions at each of the peripherals which are appropriate for monitoring during this initial idle sequence has been interrogated. If no flag has occurred on the common status bus 21, the last address word applied to the read only memory 80 causes an instruction to be read out therefrom which causes the ROM address register 81 to branch back to the first address word within the idle sequence.
As will be appreciated by those of ordinary skill in the art, the idle sequence of address words keeps repeating until a flag finally occurs on the common status bus 21. For the simplified printing operation here being considered the flag which initially occurs on the status bus will occur in response to an instruction word applied to the keyboard interface 26 which requires the gating of the output of a strobe flip flop to the common status bus 21 as will be more fully discussed below. Here it is sufficient to appreciate that each time a key on the keyboard means 1 is depressed, the eight (8) bit ASCII code representative of the character on the key depressed is loaded into an eight (8) bit register whose outputs connect to a set of eight output gates and a strobe flip flop is set to provide a flag indicative of the loaded condition of the output gates. Therefore, in response to an instruction to gate the condition of the strobe flip flop to the status ` lOSZ9~1 bus, the output of this flip flop will be applied to the common status bus 21 through keyboard interface 25.
Accordingly, when a key at the keyboard means has been depressed and the eight (8) bit: ASCII code associated therewith has been loaded into the output gate therefor, the strobe flip flop at the keyboard means will be set and upon interrogation will place a ONE (1) on the common status bus 21. When a ONE (1) appears on the common status bus 21, in response to an instruction requiring the gating of the strobe flip flop at the keyboard interface onto the common status bus 21, the ONE (1) which appears on the common status bus will be compared at the ROM address register 81 with bit Blo of that instruction which is a ONE (1). As this is a branch instruction, i.e., bit Bll=l, and the results of the comparison under these conditions will be positive, the read only memory address register 81 will branch from the idle program in which it is presently operating and into a program sequence designated branch on the keyboard. Of course, if the ONE (1) bit did not appear on the common status bus 21, the idle loop would be continued by the usual incrementing of the ROM address register 81 and no branch operation would result until an appro-priate condition finally appeared on the common status bus 21 in response to some branch instruction.
The first command issued by the read only memory 80 in response to the first address of the branch on keyboard program sequence is a transfer keyboard character to data bus and data bus to main register M
command. This, causes the eight (8) bit code , ' - , ` ~ '~ ' ;

i05~91~
to be trans~erred from the eight gates at the keyboard interface 26 onto the common data bus 19 and through the arithmetic logic unit 84 into the eight (8) bit storage location of the main register ~I. The ROM address register 81 is incremented and the next instruct~on from the read only ~emory 80 in this sequence is a command to classi~y the chara`cter captured. This results in a transfer of the eight (8) bit character loaded into the main register M back into ~he arithmetic logic unit 84 where the same is processed to determine whether it is a printable character or a non-prlnt character representing functional informatlon or the like.
The character tested is trans~erred back into the main register M for subsequent utilization. I~ the result of the comparison in the arithmetic logic unit 84 has lndicated that a non-print data character has been loaded into the main register M, a ~ump address sequence is next initiated at the ~OM address register 81 to return the pro~ram sequence to step 1 of the idle program. However, if ~t is assumed that the character loaded into the main register M was in fact a character to be printed, the ROM address register 81 ls incremented and the third program step Or the branch on key-board program will be read out. The resulting third instruc-tion from the read only memory 80 under these conditions is a branch on the status of the printer instruction which ascertains whether or not the printer ls busy and more particularly, as shall be seen beiow, whether the character input to the printer interface 27 is busy. The response of lOSZ911 the printer interface 27 to an instruction seeking to ascertain whether the character input thereof is busy is ;~ applied from the printer interface onto the common status bus 21. If a ONE (1) is applied to the common status bus 21, indicating that the character input to the printer is in fact busy, this ONE (1) will be compared to bit Blo of the interrogating instruction and will cause the ROM address register 81 to branch into a monitor printer address sequence where, in effect, the character input of the printer is monitored until the flag on the status bus goes low indicating the printer may receive character information. When this happens, the ~OM address register 81 will return to step 4 : of the branch on the keyboard program sequence. If, however, the instruction inquiry to the printer interface 27 indicated lS that the character input to the printer is not in fact busy, the RO~ address register 81 will be incremented and immediately initiate step 4 of the branch on the ~eyboard program sequence. The fourth instruction read from the read only memory 80 in response to step 4 of the branch on keyboard program sequence is designated control printer character strobe which causes the eight (8) bit data character loaded in the main register M to be conveyed to the common -data bus 19 and through the eight (8) bit data conductor 31 to the printer interface 27 for subsequent capture at the printer means 2. This command, as shall be seen below, causes the daisy wheel printing element at the printer means 2 to be properly positioned and thereafter, the character designated -- ~oszsll by the eight (8) bit ASCII code supplied to the printer ,:
inter~ace 27 is printed.
, The next instruction in tllis sequence is again a branch on the printer to see if the same is busy, here however, the carriage status input is tested. If the ; carriage status input applied to the common status bus 21 indicates that the carriage is in a busy condition, the ROM
address register 81 will again go into a branch and return routine awaiting a not busy status indication from the carriage condition output. If a not busy condition is indicated on the common status bus 21 in response to this branch on prin-ter instruction, the ROM address register 81 t~ill be incremented and 2pply the sixth address of this program sequence to the read only memory 80. The sixth address in this program se~uence causes the read only memory &0 to produce an instruction word for controlling the multiplexer associated with the eight (8) bit da-ta cable 105 so that a three (3) bit constant is taken ~rom the instruction word readout of the read only memory 80 and applied through the common data bus 19 into the main register M. Effectively, eight (8) bits are applied from the read only memory 80 through the eight (8) bit conductor 105 to main register M; however as five (5) of these bits are Zero (O) and not utilized, only a three (3) bit constant is effectively loaded into the main register M and subseguently applied as a constant to the printer interface 27 in response to the neY~t instruction read out of the read only memory register 80.

lOSZ9~
Thus, the ROM address register 81 is incremented and the .` next instruction read out of the read only memory 80 in ;" response to the address applied will be a sixteen (16) bit . instruction word applied to the col~non instruction word bus i 5 20 causing the three (3) bit constant present in the main register M to be transferred through the common data bus l9 to the printer interface 27 and therefrom into the printer means 2. The next address read from the ROM address ~ register 81 will cause an eight (8) bit constant to be read '~ 10 out of the read only memor~ 80, applied through the eight (8) bit data cable 105 to the common data bus l9 and hence loaded illtO the main register M. The next address read in this sequence from the ROM address register 81 upon the incrementing thereof will cause the read only memory 80 to issue an instruction causing this eight (8) bit constant as now present in the main register M to be transferred through the common data bus l~ to the prinier interface 27 and from ther~ to the printer means. Thus in the las~ four instructions an eleven (11) bit constant, which as shall be seen below, represents carriage displacement infromation has been loaded into the printer means 2.
The next sequential address read from the ROM
address register 81 will cause the read only memory 80 to apply a carriage motion strQbe to the printer interface 27.
The carriage motion strobe will, in a manner to be described below, cause the printer to displace the carriage a distance e~ual to that designated by the eleven (11) bit constant - .. . . . . .

-- 105;~9~1 previously loaded. Thus the sequential addressing o~` the read only m~mory regis~er 80 b~T the ROM ~ddress re~ister- 81 due to the continuing incrementi~ thereof has caused an - ~ ei~ht (8) bit character representlrl~ a key depressed at the keyboard means 1 to be 102ded into the main register M and transferred to the printer ~eans 2, has caused the printing this character at the printer means 2 and thereafter, the pro~ram precede~ to cause the carriage displacement constants to be read from the read only memory 80, sub-sequently applied to the printer means 2, and then applied - -a c~rria~e strobe pulse to the printer means 2 so that - appropriate escapement subsequent to printing would occur.
~ The las~ instruction read ~rom the read only me~.ory 80 instruction sequence no~t being discussed causes the ROM
, 15 address reoister 81 to ju~p to the first address Or the I idle program T;rhich e~fectively causes the read onl~ ~emory - 80 to again begin step 1 of the idle loop instruction ., sequence previously discussed.
r~hus, for the printing sequence described above, the keyboard information was selectiYely transferred fro the keyboard means 1 to the printer means 2 and printing resulted therefrom. Howe~er~ for the purposes o~ the 1 --instant discussionj it is more importan~ to note that the I com~on status bus 21 was utili%ed ln con~unction with the ! ?s addressin~ sequences read from the ROkl address re~lster 81 , to apprlse the logic as to when a c]~aracter was present for I processin~ and cause the ROM address register 81 to branch ~ - 117 -' r : b ` lOS~9il in response to a branch instruction into a specialized addressing sequence calculated to achieve the printing of the character information presented on the common data bus 19 if the status condition sought was present.
Furthermore, each time character or carriage displacement infor~mation was to be applied to the printer means 2, a branch on the printer operation was initiated wherein the condition of the common status bus ~l was utilized to monitor the readiness of the printer means 2 to receive the information to be conveyed. If the printer means 2 was ready to receive the information conveyed, this information was transferred. However, ~hen the printer means 2 was not ready to receive such information, an indication to this ef~ect presènt on the common status bus 2:L was utilized to l~ cause ~he ROM addr~ss ~e~ister 81 to go into a bra~ch addressing sequence wherein the condition tested at the printer means 2 was monitored until a ready condition was in fact present. q'hus, instructions issued on the common instruction word bus 20 and status conditions received on the con~on status bus 21 are utilized in conjoint to vary and alter through appropriate branch and jump instructions, the address sequence employed by the RO~ address register 81 to achieve appropriate operation of the present embodiment of the automatic writing system according to this invention.
A more detailed explanation of the operation of the embodiment of the automatic writing system according to ~ 118 --. -. . ~
.

~ 105;~:911 ~ this invention, as sho~l in Fi~ure 2, must await the ., ~
further description of the struct~lre and the operation of the peripherals as set forth below. However, it should be here noted that the arran~ement of the automatic writing system according to this invention wherein all peripherals are connected with a cent:ral processor through a co~non data bus 19 which acts to convey all system data, a common instruction work bus 20 which acts to convey all commands issued by the central processor to the various peripherals and a common status bus 21 which acts to conve~r the condition of any peripheral whose condition is sought to be monitored to the central processor admits of a wide ambit of ob;ious alterations and modifications because any peripheral which it is desired to add or remove may be add~d or deleted from the p~esellt invention without requiring major modifications of tne system as a whole.
For instance, should it be desired to add telecon~unications peripherals to the instant invention, such telecommunication peripheral, be it a high or low speed peripheral, could be simply added to the common data bus 19, the common instruc-tion word bus 20 and the common status bus 21, together with appropriate modification to the read only n~?mory 80 and the ROM addrcss register 81. The basic systel, however, would not have to be altered. In addition, it: should be noted that the present invention allows each peripheral to be used at a speed which is commensurate with the highest operational speed of that - 31~ -~` ~os~9~
peripheral and hence, when the printer is not being employed in a given operation, the other elements of the system, which are capable of operating at much higher speeds would determine the speed with which the operation is performed. Thus, should it be desired to transfer information from one record media to another, the slowest peripherals in the system needed for that operation would be the xecord stations and hence, the transfer operation could proceed at the highest available speed of the record stations. It should also be noted that although not shown in Figure 2 to avoid additional complexity, a common clock bus would preerably also be employed in the instant embodiment of the present invention. Such a common clock bus could, under pro~ram control, supply appropriate clocking rates to i5 each of ~l~e peripherals and to the microproc~ssor in~icated by the.dashed blocked 16 through conventional step down an~
phase multiplication techniques while avoiding the undue redundancy in structure which would be required if independent clocking sources were used at each peripheral as well as internally within the microprocessor indicated by the dashed block 16.

THE PRINTER_UNIT
Although, as will be apparent to those of ordinary ski-l in the art, any conventional printer or for that matter an appropriately modi~ied input/output typewriter could be employed to provide the printing function for the ins-tant .. . .

105'~9~1 invention, the embodiment of the automatic writing system being disclosed herein preferably employs an independent serial printer which exhibits operational speeds exceeding those generally available in conventional input/output typewriter apparatus and in addition thereto, the printer should be relatively quiet in ope:ration, so that a high ambient noise level is not introduced in the environment in which the instant invention is employed. For this reason, it is preferred that the printer take the form of the Model 1200 HyType I Serial printer available from Diablo Systems Incorporated of Haywood, California. This printer is best described in Canadian Patents 978,129 issued November 18, 1975 and 980,708 issued December 30, 1975 and U. S. Patent 3,974,906 issued August 17, 1976.
These patents, as well as the additional patents refered to therein, describe a serial line printer which functions in response to logical inputs provided thereto to achieve serial printing at an average speed of 30 characters per second with a 96 character set arranged about a so-called daisy wheel print element. Printing is achieved by the positioning, in ~ 121-~

~osz9~
response to appropriate logic signals, of a designated spo]ce on the daisy wheel print element opposite a print position. Thereafter, an electronically ired impact hammer is driven into the spo]~e which in t~rn is driven into a carbon or cloth ribbon to impact the document being prepared with the appropriate character. As no mechanical drives or mechanically driven print hammers are employed, the operation of this unit is extremely quiet. Although the d~tailed operation of the printer unit i5 best left to the aforementioned ~p~ c ~ ; three principal functions of the printer means 2 should be focused on for an appropriate appreciation of the operation of the printer means 2 and its function and interconnection with the remaining apparatus disclosed in the present embodiment of the automatic ~riting system according to the present invention. The serial printer has three functions which are each independently controlled by logical inputs provided thereto~
The first such function is the priniing of character infor-mation which occurs in a serial manner and is accomplished by causing a daisy wheel print element to rotate until the designated character is in an appropriate printing position and thereafter impacting the petal of the daisy element upon which the designated character resides to cause the character information thereon to be impacted against a carbon ribbon and the document on the carriage roller 5 (Figure 1) of the printer means 2. The daisy wheel print element, as will be appreciated by those of ordinary skill ~ 122 -.. - ~

105'~911 in the art, is a flat disc-liXe member having one spoke .~ ~
- or petal for each character representation thereon. The petals are impacted in such a manner that they are driven transversely to the plane Or the disc to impact a ribbon and thereafter the document bein~ prepared. The daisy wheel print element is mounted for rotatlon on a print carriage which is displaceable along the longitudinal axis of the carria~e roller 5 (Figure 1) and hence, the positionin~ of the carria~e determines the location at which the character to be printed is placed on the document being prepared. As is well Xnown to those of ordinary s~clll ln the art, it is preferable to displace a print element carriage rather than the carriage roller 5 per se, because the lo~Jer mass of the print ele.~ent carriage can be dis-placed in a much more rapid and positive manner than the large carriage roller 5 which here would ordinarily ta~e the form of a 15 inch roller, although 30 inch rollers and/
or pin wheel feed rollers for automatic paper feeding ' operations are also availàble. The third function of the printer, which is also an independent function enabled by separate control inputs to the printer means 2, is the lndexlng or paper movement function thereof which accomplishes the appropriate vertical spacing of each char-acter line ~printed on the document. Accordin~ly, it will be appreciated by those of ordinary skill in the art that control inputs on the printer ~eans 2 ~rhich control th2 rotation and ulti~ate posit~oning of the daisy print wheel "' 105Z9~1 element determine what character is printed upon command~
the control inputs which control the positioning of the print element carria~e determine where in a horizon-tal line of character spaces that character is printed while the control inputs on the printer means 2 which control the paper indexing or movement functions thereof determlne the position on the document at which information such as lines appear as well as super and subscripting which may occur in any given line. It should additionally be appreciated that each of the control inputs concerning the positioning of the daisy print element, the carria~e positioning and the paper indexing are independent of one another and hence in the absence of appropriate commands, automatic escapement does not operate upon the completion of printing of each character nor does automatic paper indexing work at the completion of each line. These features, as shall be seen below, are utilized by the instant invention to achieve more efficient printing operations when the printer is being controlled by a record media.
20 ~- Although reference to the aforesaid ~
tio~s directed to the printer are relied upon herein for a thorough disclosure thereof, the logical in~uts and outputs - of the printer means 2 are depicted in Figure 3 so that the inter-connection of the printer means 2 to the logical inputs of its interface and the automatic writing system as a whole, may be fully appreciated. Therefore, turning now to Fi~ure 3, there is shown a block diagram schematically illustratin~
~' .

- 12~ -.

~OS'~9~1 ' the logic details of a printer unit suitable for .. incorporation into the embodiment of the automatic writing system depicted in Figure 2. The printar unit illustrated in Figure 3 comprises interface logic indicated by block S 110, ~rint wheel logic 111, a print wheel servo system 112, and the associated drivers therefor 113-115; a carriage logic system 117, a carriage servo system 118 and a carriage motor driver 119; paper feed logic 121 and a paper feed driver 122; and ribbon lift logic 123 together with a ribbon left driver 124. The printer unit interface logic indicated by the block 110 includes appropriate logic and gating circuitry, well known to those of ordinary skill in the art for raising inputs and ovtputs applied -thereto to appropriate levels and for thereafter distributing such input signals in a manner appropriate to the nature of such inp~t signals to either the print wheel log~c 111. the carriage logic 117, the paper feed logic 121 or the ribbon lift logic 123. In addition, the interface logic indicated by the bloc~ 110 may include appropriate clocking and timing sour~es for the various sys~ems within the printer unit; it being appreciated that such clocking sources may take the fo~m of independent clock pulse generatoxs or frequancy division networks operating from a central clock source provided throughout the automatic writing system according to t'ne present invention on a common clock bus tnot shown).
The interface logic indicated by the block 110 is connected along the left hand portion thereof to a plurality of input - 125 _ iO5Z9~11 I

and output connectors which, as indicated in Figure 3, con- ¦
neci through the eleven (ll) bit data cable 25 and the multiconductor control and status cable 24 to the printer interface 27 shown generally in Figure 2. Morè particularly, data lines DL - DL are connected through the eleven (ll) bit data cable 25 to the printer interface 27 and as shall become more apparent below, receive either seven (7) bit ASCII code character information, eleven (ll) bit carriage position information or eleven (ll) bit paper index infor-mation from the common data bus l9 through the printer in-terface 27. Thus, when character information is conveyed from the printer interface ~7 to the printer unit illustrated in Figure 3, a seven (7) bit ASCII character code is applied to the interface logic indicated by the block llO

5 on the seven low ordex data lines DL -DL for the purpose l 7 of disignating the appropriate character to be printed and hence the select position of the daisy wheel print element utilized. ~hen, however, a carriage movement command is applied from the printer interface 27 to the interface logic 0 llO, the ten lower order bit data Iines, DL - DL are employed to designate the distance the carriage is to be moved in multiples of l/60th of an inch or l/6th of a standard character space while the high order data bit line DL spec~fies the direction of travel. Similarly, data 5 representing a paper feed or indexing command is applied to the ten low order data bit lines, DL - DL , to designate the numbe.r of vertical positions in which the paper is to be lOSZ9~1 moved in multiples of 1/48th of an inch or 1/8th of a print line increment, while the direction in which the paper is to be moved by the paper feed motor, i.e., either up or down, is determined by the nature of the bit placed on the high order data line DLll. Thus, all data conveyed from the common data bus 19 through the printer interface 27 to the printer unit is applied through the eleven (11) bit data cable 25 on data lines D~L ~ DLll to the interface logic indicated by block 110 for further distribution to the various subsystems within the printer unit.
The various control inputs supplied to the printer unit from the printer interface 27 and the various status outputs supplied by the printer unit to the printer inter-face 27 are conveyed through the multiconductor cable 24.
More particularly, as shown in Figure 3, the interface logic indicated by block 110 receives five input conductors from the printer interface 27 and supplies four output indications thereto. The input conductors present within the multicon-ductor cable 24, as indicated in Figure 3, are annotated character strobe, carriage strobe, paper feed strobe, ribbon action and restore. These input conductors serve to provide the printer unit with the following information:
Character strobe - a signal used to sample the seven (7) bit ASCII character code provided on data lines DLl - DL7.
Carriage strobe - a signal used to designate and cause the sampling of an eleven (11) bit carriage movement command supplied on data lines DLl - DLll.
Paper feed strobe - a signal used to designate and cause the lOSZ91~
sampling of an eleven (11) bit paper feed command presented on data lines DLl - DLll.
Ribbon action - a signal used to control the position of a carbon or cloth ribbon between an up print position and a down position where the ribbon does not have a tendency to obscure the operator's view of the printing location.
Restore - a signal employed to set the daisy wheel print element, the print element carriage and various logic registers to initial conditions, such as when the system is initially energized.
Additionally, although only five control input conductors have been provided to the printer unit in the instant embodiment of the invention being described, it will be appreciated by those of ordinary skill in the art that additional inputs could be supplied if additional printer functions were desired. For instance, in a printer having the capability to employ a two or more color ribbon, a ribbon logic input could be supplied to designate the level to which the ribbon is raised to control the portion of the multicolor ribbon which is impacted during printing.
The status outputs provided by the printer unit to the printer interface 27 are indicated in Figure 3 as including the conductors annotated printer ready character ready, carriage ready, and paper feed ready. These conductors within the multiconductor cable 24 are utiliæed to perform the following functions:
Printer ready - a conductor whose level is utilized to indicate that the printer is properly supplied with power ~, .~

`~ l 105~911 Character ready - a line whose signal level is utilized to indicate that the printer is in a ready condition to accept a new character command.
Carriaqe readv - a conductor whose signal level is utilized to indicate that the printer is ready to accept new carriage movement commands.
,Paper feed ready - a conductor whose signal level is relied upon to indicate that the printer is ready to accept new paper feed commands.
Although only four status output conductors have been illustrated in Figure 3, it will be appreciated by those of ordinary skill in the art that additional status conductors may be employed to monitor additional status conditions at the printer. For instance, a microswitch may be employed at the printer to indicate whether or not paper is properly loaded therein and the output condition of sucll ~icroswitc~
may be taken from the inter~ace logic indicated by block 110 and placed on a separate status conductor for application to the printer interface 27. Similarly, a check condition output conductor may be employed to indicate whether a previously supplied instruction has been appropriately implemented or a malfunction has occurred. If such a check status output is utilized, the output thereof would ordinarily only be capable of being superceded by a restore printer in-2S put which would act, as aforesaid, to initialize the printermeans 2 and hence clear the malfunction. Thus, it will be appreciated that the printer unit depicted in Figure 3 .

~05'29~1 ., receives all data inputs supplied thereto from the printer interface 27 on data lines DLl - DLll while control inputs are supplied to the printer unit and status outputs are supplied by the printer un.it to the printer interface 27 ~hrough individual ones of the conductors within the multiconductor cable 24. As will now be appreciated from the description of the .instant embodiment of the automatic writing system set forth in conjunction with Figure 2, the data inputs supplied to the printer unit originate from the common data bus 19, the control inputs supplied to the printer unit derive i~rom commands present on the common inst.ruction word bus 20 while the four status outputs provided by the print unit eventually result in appropriate status indi.cations on the common status bus 21. The manner in which this data is manipulated through the system, will become m~>re apparent below in connection with the description of the printer interface 27, as described in detail in conjunction with Figure 4.
The interface logic indicated by the block 110 is connected through multiconductor cables 125-128 to the print wheel logic 111, the carriage logic 117, the paper feed logic 121 and the ribbon li:Et logic 123, respectively.
The multiconductor cables 125 through 127 are employed, in essence, to convey data, control, and status information between the interface logic indicated by block 110 and the functional logic blocks 111, 117,or 121 connected thereto.
The multi.condoctor cable 128 however, is only employed to 105Z9~l convey a control level intermediate the interface logic block 110 and the ribbon lift logic 123. ~or instance, all data present on the data lines DLl - DLll is loaded into an appropriate register at one of the loglc blocks 111, 117 or 121 Gnly in response to the applicQtion of control information to one of the control conduc~ors annotated character strobe, carria~e st:robe, or paper feed strobe.
Thus, considering the print ~heel logic 111, if it is assumed that a seven (7) bit ASCII code designating a unique -character to be printed has been applied to the interface logic bloc~ 110 through data lines DLl - ~7 this seven (7) bit ASCII code character will be loaded into a register within the print wheel logic 111, through the multiconducto~
cable 125 upon the occurrence of a character strobe. This 1~ infor~ation will be appropriately processecl in a manner to b2 descri~ed below and upon succes3ful completion of th~
printing operation sepcified, a ready signal will be con- ;
veyed from the print wheel logic block 111 through the f multiconductor cable 125 so that a character ready indica-tion may be applied to the printer interface 27 through the appropriately annotated conductor. Similarly, when a carriage motion instruction is presented to the printer unit, the distance in multiples of l/60th of an inch are applied from the printer in~erface 27 to the ten (10) low order ~5 data lines DL - DL while the direction of the displacement 10 ' is indicated by the condition of the bit applied to the high order data li.ne DLll. This information is loaded in parallel ~, , lOSZ91~L
- through multiconductor cable 126 into a register therefor in the carriage logic 117 upon the occurrence of a carriage strobe on the appropriate annoltated control conductor.
After the displacement instruction has been processed by the carriage logic block 117 and the carriage displaced a distance equal to that specified by the data character applied to the data lines DLl -- DLll an operation completed indication is supplied from the carriage logic block 117 through the multiconductor cable 126 to the interface logic 110 and is applied therefrom to the carriage ready con-ductor connected through the control cable 24 to the printer interface 27. The carriage ready status indication is subsequently supplied to the common status bus 21 so that the microprocessor indicated by the dashed block 16 is appraised that the next program sequence may be initiated.
In a like manner, when a ten (10) bit paper dis-placement increment is applied to the data lines DLl - DLlo and the direction in which such displacement is to occur is indicated on data line DLll, this eleven (11) bit paper movement data is loaded in parallel into a register present within the paper feed logic 121 upon the application of a paper feed strobe to the interface logic 110 on the appropriately annotated conductor. Thereafter, the paper displacement instruction is implemented by the paper feed logic and upon the completion of the command a paper feed ready signal is conveyed through the paper feed logic 121 through the multiconductor cable 127 to the interface logic - ~ ., ,- . , ~ : -.
.

`----10529~
. 110 for application to the annotated paper feed ready output ~-: conductor so that such status condition is applied to the printer : interface and is subsequently appl:ied to the common status bus - 21. Thus, the operation of the printer unit depicted in Figure ~ 3, like that of any peripheral emp:Loyed in the present invention, ` is such that data is conveyed from the common data bus 19 to the data character inputs DLl - DLLl of the printer unit, and is gated to the appropriate circuitry which will respond thereto upon the application of a command signal in the form of a strobe pulse which is issued by the read only memory 80 and conveyed ~: through the common instruction word bus 2Q. Upon the appropriate completion of the command, a status indication is provided by the printer unit to indicate that such command has been success-fully completed whereupon the next step of the program sequence then in process may be initiated.
: Briefly, the print wheel logic indicated by block 111, as more fully described in Canadian Patent 978,129, supra, and the additional applications recited therein, comprises an absolute print wheel address read only memory, a present position counter, and a logic and difference counter for providing an indication of the difference in terms of both magnitude and direction between the address read from the absolute print wheel address read only memory and the present position counter.
Upon the occurrence of a character strobe at a control input to the interface logic 110, the seven (7) bit ASCII code designating ~0~2 91/

a particular character is suppl;~ ~hr~gh the multicon-ductor cable 125 to the print wheel logic 111. This seven (7) bit ASCII code is applied in parallel to the absolute print wheel address read only memory therein where it acts as an address so that the absolute position of the character designated by the seven (7) bit ASCII code is read out of the absolute print wheel address read only memory. The present position counter present within the print wheel logic 111 is utilized to maintain a count indicative of the actual position of the daisy print wheel element due to previous rotations thereof in previous printing cycles. Thus, assuming a 9~ character print wheel, the absolute print wheel address read only memory will designate the rotational coordinates of the character to be printed while the present position counter will provide an output signal designating the present coordinates of the print wheel. The output of the absolute print wheel address read only memory and the present position counter are subtracted in the logic and difference counter and an output indicating the shortest rotational movement to place the print wheel in position where the desired character, as specified by the seven (7) bit ASCII code, is in a print position is provided at the output thereof. As will be readily appreciated by those of ordinary skill in the art, the shortest rotational distance to achieve appropriate daisy print wheel element positioning may be obtained by taking both the difference and the complemented difference between the inputs of the absolute , ~05'~9~
print wheel address read only memory and the present position counter. Thereafter, the smallest value between the actual difference count and the complemented count is selected to represent the magnitude of displacement where the actual difference is utilized to represent rotation of the print wheel in one direction i.e., clockwise and the complemented difference is utilized to indicate rotational : movement in the opposite direction, for instance, counter clockwise. Thus, the logic and difference counter provides a pair of output signals wherein one such signal is indicative of the magnitude of the rotation through which the print wheel is to be driven while the other such output is indicative of the direction in which rotation is to occur.
` Furthermore, as the present position counter is continuously incremented as the daisy print wheel element is rotated, it will be appreciated by those of ordinary skill in the art, that the magnitude output from the logic and difference counter will continuously diminish as the daisy print wheel element is rotated so that as the daisy print wheel element approaches the print position designated by the seven (7) bit ASCII character, the magnitude output of the logic and difference counter will approach zero. Due to the manner in which the print wheel logic initially specifies the direction and magnitude of the displacement through which the daisy print wheel element is to be rotated and thereafter provides a continuously diminishing signal representing the remaining necessary displacement, the output of the print wheel logic ;: . , ;, :
' '- ~' - :' ~' ', ~IL05'~9~i may be utilized to initiate and control the displacement of the print wheel driver as well as providing for a print signal and other necessary housekeeping signals when the designated print position is obtained. For these reasons, the output of the print wheel logic 111, as will be more fully appreciated upon a review of Canadian Patent 978,129, supra and the additional patents cited therein, may be usecl to develop a velocity signal `~ indicating varying velocities for large displacements and a level control signal for precisely centering the print wheel at a desired location.
One output of the print wheel logic 111 is connected through a multiconductor control cable 130 to the print wheel~
servo system 112 while a second output of the print wheel logic 111 is connected directly to the hammer coil driver 114 through a conductor 131 and a third output of the print wheel logic 111 is connected to the ribbon motor driver 115 through a conductor 132. Although any suitable servo system may be employed for the print wheel servo system 112, it is preferred that the servo systems disclosed in Canadian Patent 980,409 and in Canadian Patent 978,129 supra, be employed because this form of servo system provides an extremely rapidly responding and positively acting servo system for placing the print wheel in a designated position without any overshoot. The multiconductor cable 130 may comprise a plurality of conductors which are utilized to -~05~91~
convey direction information and magnitude information in terms of a velocity command and a level control to the print wheel servo system 112. In adclition, the multiconductor cable 130 includes an additional conductor which conveys displacement information from the print wheel servo system 112 to the print wheel logic 111 so that such displacement information, as will be apparent to those of ordinary skill in the art, may be utilized to increment the present position counter therein so that the present position 10 is continuously updated and maintained in a current state to reflect the actual position of the daisy print wheel element being rotated. The output of the print wheel servo 112 is connected through a conductor 133 to the print wheel driver 113. The print wheel driver 113 may take the 15 form of a conventional motor driver circuit which responds to the magnitude and polarity of an input signal applied thereto to cause a motor to rotate a shaft in a direction indicated by the polarity of the input and at an instantaneous velocity representative of the magnitude of 20 such input. The print wheel, as will be apparent to those of ordinary skill in the art, is a~ially mounted on the motor shaft and rotates with the motor, although gearing arrangements therefor are readily available. Thus, the print wheel logic 111, the print wheel servo system 112, and the 25 print wheel driver 113 act in conjoint to appropriately position a daisy print wheel element in a position so that the character designated by a seven (7) bit ASCII code ~05'~91i applied to data lines DLl - DL7 is placed in an appropriate position for impacting by a hammer and hence printing.
The hammer coil drivler 114 may take the conventional form of a relay driver which provides an appropriate input to an armature which is arranged to impact a portion of a piston-like print hammer whenever an input signal is applied thereto. The print hammer, as will be appreciated by those of ordinary skill in ~he art, when impacted by the armature of the relay will be driven forward to drive the selected daisy element from the plane of the print wheel and into engagement with a carbon ribbon and the document upon which printing is taking place. An input signal is applied from the print wheel logic 111 through conductor 131 to the hammer coil driver 114 at an interval when the print wheel has been properly positioned and stopped at the desired print location as designated by a zero output at the logic and difference counter. In addition, it is preferable that the print hammer exhibit at least two distinct print strokes to accommodate the different types of characters on the daisy print wheel element. For instance, the printing of alphanumeric characters such as periods, ones, i's and the like, generally require a print stroke of a first duration while the printing characters occupying substantially more area such as Ms, Ns and the like require a substantially longer print stroke. This can be readily accomplished by controlling the duration of the energizing signal applied by the print wheel logic 111 ~05'~9~
through the conductor 131 to the hammer coil driver 114 and the duration of the drive signal may be controlled at the print wheel logic by gating the duration of the drive signal as a function of the output of the absolute print wheel address read only memory which effectively acts to designate the character to be printed.
The ribbon driver llS is connected to a third output of tbe print wheel logic 111 through the conductor 132 as aforesaid. The output of the ribbon driver 115 functions through a stepping motor to increment the ribbon employed at the printer at the end of each print operation so that a new portion of the ribbon, which may take the form of a conventional carbon or cloth ribbon, is present in the printing location when a new printing cycle is initiated.
The ribbon driver 115 is connected to a ribbon motor as indicated in Figure 3 and acts in response to an input signal applied thereto on conductor 132 to displace the ribbon by a fixed amount appropriate to accommodate a new printing cycle wherein an input character is again printed.
The print wheel logic 111 applies the input signal to the conductor 132 to actuate the ribbon driver 115 upon the completion of its energization of the hammer coil driver 114 so that the ribbon displacement operation is only initiated upon completion of a print cycle.
After the print wheel logic 111 has initiated a ribbon displacement operation, the print wheel logic 111 will apply a cbaracter ready status indication through the ~OS'~911 multiconductor cable 125 to the interface logic 110. This character ready status condition is applied by the interface logic block 110 to the character ready status conductor connected through the multiconductor cable 24 to the printer interface 27, for ultimate application in a manner to be described hereinafter to the common status bus 21.
; Accordingly, it will be seen that when a seven (7) bit ASCII
character is applied to data lines DLl - DL7 and a character strobe pulse is applied to the interface logic 110, the print logic 111 will cause the print wheel servo 112, the print wheel driver 113 and the print wheel motor connected thereto to rotate the daisy print wheel element so that the pedal having the designated alphanumeric character thereon is placed in a print position and thereafter the rotation of the print wheel is stopped while all during the rotation of the print wheel the present position counter within the print wheel logic 111 is constantly updated so that output of the print wheel logic 111 reflects the actual magnitude of the difference between the desired position of the daisy wheel print element and its present position.
When the print wheel is stopped in the desired print position, the print wheel logic 111 will issue a print command thorough conductor 131 to the hammer coil driver 114 and the hammer coil connected thereto to cause the impacting of the previously positioned alphanumeric character by a piston-like print hammer. After printing has been completed the print wheel logic 111 issues a ribbon displacement ~ ~os;~sl~
command through conductor 132 to the ribbon driver 115 and hence, the ribbon motor connected thereto. This causes the carbon or cloth ribbon utilized in tbe printer to be advanced so that a new portion of the ribbon is in place at the print position prior to the initiation of the next print cycle. Thereafter, the print wheel logic 111 issues a character ready status level through the multiconductor cable 125 to the interface logic 110 so that a character ready status level may be placed on the character ready conductor present in the multiconductor cable 24. Through this status indication, the microprocessor indicated by the dashed block 16 in Figure 2, will be apprised that the next command in the program sequence being processed may be issued. The order in which data is processed by the print wheel portion of the printer unit is generally as follows:
alphanumeric character designation on data lines DLl - DL7, a character strobe, a print wheel displacement, a hammer fire signal, a ribbon incrementing signal, and a character ready signal. The timing for the various signals applied to fire the hammer and utilized to increment the ribbon motor driver may be supplied, as will be readily appreciated by those of ordinary skill in the art by applying trigger inputs to flip flops such as monostables which provide the drive signals of appropriate duration.
The carriage logic 117, the carriage servo 118 and the carriage motor driver 119, together with the carriage motor connected thereto may each take the same form as the .

~`-;

~ ~05'~911 corresponding elements associated with the daisy print wheel element. This position is taken because the same logically controlled servo system that is employed to control the rotational displacement of the print wheel may be employed to achieve the longitudinal displacement of the daisy print wheel element carriage. The only exceptions being that the carriage logic may be substantially simplified as it need not perform as many functions nor need it perform as complex a position designating function and the rotational motion of the shaft of the carriage motor must be translated into longitudinal motion through a cable drive or through other conventional techniques well known to those of ordinary skill in the art. More particularly, as the carriage logic 117 receives an eleven (11) bit input wherein the high order bits designates the direction in which travel is to occur, i.e., right or left while the lower ten order bits designate the distance to be travelled in increments of l/60th of an inch or l/6th of a character, the displacement data applied to the carriage logic 117 may be directly loaded into a register. Thereafter, the register may be counted down in response to increment of movement pulses supplied by the carriage servo system 118 and hence the read only memory and present location counter employed in the print wheel logic 111 may be avoided. Thus, when eleven (11) bit carriage displacement information is loaded onto data lines DLl - DLll and a carriage strobe is applied to the appro-priately annotated conductor in a multiconductor cable 24, L05'~
, , , the lo~.~er ten (10) ~its on data lines DLlo - DLl are , loaded into a re6ister in the carria~e logic 117 while the directional inrormation contained in the high order bit ~. .
may be used to set a flop or the like. The carriage servo system 118 may take precisely the same ~orm as the print ~Iheel servo system 112 and hence, when the output of the carriage logic 117, ~.Ihich represents a magnitude equal to the setting o~ the register therein is applied throu~h ' multiconductor cable 134 to the carria~e servo system 118, the carria~e servo system 118 will cause the ener~ization o~ the carriage motor driver 119 and the carriage motor i so that the carriage will be displaced in a dlrection .. . .
.. '- determined by the settin~ o~ the flip ~lop set, at a rate ~ , representative o~ the ma~nitude Or the setting in the register.present in the,carriage lo~ic 117. As the ca.rriage is displaced, the carriage servo 118 ~ill apply pulses through the multiconductor cable 134 t,o the carriage logic - 117 representin~ each illcrement Or motion through ~Jhich the carriage is displaced. These pulses are utilized to count 2n down the register originally set by the displace~ent magnitude applied to data lines DLlo - DLl and hence the state o~ the count in the register continuously represents '. the remaining distance through which the carriage must be , . d~splaced to achieve the displacement originally set on ~5 data lines DLlo - DLl. lthen the state of the register in the carriage lo~;ic 117 has been decre;~ented to a zero condition a carria~e ready pulse is applied through ~h~ -- ~43 - .

.

.
., i .. .. .. . . . .

,. , :. . ~. - .~ ` .

~s~s~i ~r multiconduc-tor cable 126 to the inter:~ace lo~ic 110 so that a carria.ae ready status indication may be applied to the carriage ready conductor indicated and subsequentl~ to the common status bus 21. It should be noted however, that as the instant printer means does not employ physical margin detents or other physical stops, circuitry external to the :~ printer must be utilized to keep track of the position of the carriage and prevent the motion thereof when a margin zone setting would be exceeded by a carria~e displacement command. This apparatus, howeve:r, is provided at the printer interface 27 and shall be described in conjunction with Figure 4.
Thus, it is seen that when an eleven (11) bit carriage ~-displacement character is applied to data lines DLll - DL
and a carriage strobe is applied to the appropriately annotated conductor at the interface logic 110, the displacement character will be loaded into the carriage logic 117 and utilized to control the carriage servo 11 which energizes the carriage motor driver 119 to thereb~
cause the displacement of the carriage while each increment of displacement of the carria~e is applied from the carriage servo 11~ to the carriage logic 117 to decrement the register therein. Accordin~l~, when the re~ister within the carriage logic 117 has been decremented to a zero count, the carriage has been displaced to the ~ull extent designated and the carriage logic 117 provides an appropriate carriaae read~ status indication to the interface logic 110.

~ 4 _ `'~ lOSZ91~
It should additionally be noted that the input required to cause carria~e displacement does not in any manner deri~Je from those associated with the positioning of the daisy print wheel element and hence in the ab3ence o~ aporopriate commanAs, no automatic escapement will operate. In the foregoing manner, the carriage position of the printer may be moved on a continuous basis to any column position in a line with which printin~ is normally associated and it should be noted that unlike conventional in~ut/output typewriter apparatus, the movement of the carriage from one position to the next is not an incremental unit, but is continuous so that carriage shifting is accomplished at a maximum available speed.
The paper feed lo~ic 121, like the carriage logic 117, accepts an eleven (11) bit movement command which in this case represents the upward or downward indexing of the paper. The high order bit supplied on data line DLll rep-resents the direction in which movement is to take place while the data character presented on data lines DLlo - -~ 1 represents the displacement to be implemented in ; increments of l/~th of an inch or l/~th of a print line advance. This enables superscripts and subscripts to be automatically achieved, as well as the automatic positioning of the document to a first line position which is exceedingly useful when continuous paper forms are employed or when the operator merely loads the document so that the top of the document is indexed with the top of the document - 1~5 _ / ` 105'~91~ .
carrier and there~ter proper indcxin~ o~ the pa~er to a ~irst lined position is automatically achlevcd. The paper ~eed logic 121, li~ce the carria~e logic li7, includes a ; register in t~hich the displacement in~ormatlon represented by low order bits on data lines DLlo - DLl are inserted, upon the appearance of a paper reed strobe at the intèrrace logic block 110. Similarly, the ~direction in?ut present on data line DLll ~ay be e~plo~e~ ~o set a fl:~p flop. ~Iowev~r for paper feed advance, no servo syste~ is em?loyed to achieve move~ent, but rather a paper ~eed ~otor, as indicated in Figure 3, ~hich takes the form of an increl~ental s~ep-ping motor is relied upon. Thererore, the settin~ Or the register ~ithin ihe paper feed lo~ic 121 enables cloc~;
.` I
pulses to be ~pplied from .he paper ~eed lo~i~ 121 through the co~ductor 135 to the paper reed driver 122. F2Ch clock pulse so applied to the paper reed driver 122 is raised to an appropri~te logic le-/el and is applied ~hrough the conductor 136 to the paper feed motor indicated. Each ; pulse applied to the paper reed mo~or, through conductor 136S ~ill cause the paper reed motor to step thereby causing the roller 5 to step and hence index the p~per in an upt~ard or do~m~iard direction, an ar.1ount equal to such step. As e2ch pulse is a?plied by the paper feed logic 12~.
. _. .
` to the p~per reed dri~er 122 throu~h conductor 135, the .. . . . . . . .
pulse is also er~oloycd to decrerle~t the register in t-hich thc papcr indexing displ~cc~cnt h~s bee~ loadcd. Thus, as will be nppreclatcd by thosc Or ordinary skill in the art, . . ' .

6 - ; .
., ' ' l ' .

lOS'~
clock pulses will be applied to the paper feed driver 122 and to the papsr fesd motor to continuously cause the step-ping thereof and hence the appropriate indexing of the document until the register present in the paper feed logic 122 is decremented to zero.
When the register present in the paper feed logic 121 .is decremented to æero to thereby indicate that the displacement indicated by the low order bits supplisd thereto by data lines DLlo - DLl has baen achieved, the fl.ip flop L0 indicative of the direction in which the indexing occu.rred is reset and a pape.^ ready status indication is supplied from the paper feed logic 121 through the multiconductor cabla 127 for application to the paper feed ready conductor present within the multiconductor 2~. In this manner, an indication to the printer inierface 27 for subsequant application to the common status bus 21 is supplied to pro~Tide an indication to the microprocessor indicated by the dashed block 16 that the next step in the program sequence may be initiated. m e direction in which the motor is stepped and hen~e the paper is indexed may be controlled by the polarity of the pulses applied.on conductor 13G to the paper feed motor. This is controlled, as will be appreciated by those of ordinary skill in the art by the ` setting o~ the flip flop which responds to the high order bit present on data line DLll~ m e sequence in which instruc-tions associated with a paper movement com~.and are applied to the printer unit is as follows, initial:L~ an ~leven (11) - 147 _ .

~ 105Z9~
bit data displacement character is applied to the data ~ lines DLll - DLl, thereafter a paper feed strobe is applied; to the appropriately annotated input conductor on the interface logic block 110 whereupon the paper displacement : 5 character is loaded into the paper feed logic register 121,paper displacement is then caused in response to pulses applied to the conductor 134 by the paper feed logic 121 and subsequently a paper feed ready status indication is pro-vided at the status output indicated in Figure 3 at the interface logic 110.
Like other peripherals in the automatic writing system according to the present invention, the data character which in this case takes the form of an eleven (11) bit character read as a pair of instructions from the read only memory 80 is conveyed through the common data bus 19 to the printer unit while instructions applied to the strobe inputs of the interface logic 110 originate as instruction commands on the common instruction word bus 20.
Similarly, the status condition provided at the outputs of the interface logic 110 connected to the multiconductor cable 24 are applied through the printer interface 27 to the common status bus 21 to apprise the microprocessor indicated by the dashed block 16 that the next instruction in the program sequence being processed may be issued. It should be noted that the inputs to the interface logic block 110 associated with the paper indexing operation just explained do not derive in any form from carriage displacement - 1~8 -.. . .
. : . .

lOSZ911 instructions which may be applied thereto. Therefore, in tne absence of appropriate instructions from the read only memory 80, the document being prepared will not be automatically indexed to the next line upon the receipt of a carriage return command, which takes the form of a carriage displacement instruction.
Although the ribbon lift logic 123 may be employed to control the printing position of a two color ribbon, the ribbon lift logic 123 here performs only the simplified function of positioning a black or other single color cloth or carbon ribbon in a first position intermediate the character pedal of the daisy print wheel element and the document to be printed so the same is impacted when the print hammer strikes the selected pedal of the daisy print wheel element, or a second position in which the ribbon is in a down pQSitiOn and hence does not tend to obscure the operator's view of the print position on the document being printed. Although this function could be implemented in the printer unit per se, the ribbon action function is here achieved as shall be seen below at the printer interface 27.
The function is achieved, in essence, by providing a delay interval such as a 500 millisecond (500 ms) interval in which a succeeding character input is to be supplied to the printer unit. If this input is not supplied within the given period a high level input is supplied to the input conductor within the multiconductor cable 24 and more specifically, the conductor annotated in Figure 3 ribbon .
. .
, .,:, .

' -~05'~g~1 action. When the ribbon action input conductor to the interface logic 110 is high, the ribbon is placed in the down position while when the input on the ribbon action is low, the ribbon is placed in a first or up position. For this reason, the ribbon lift logic 123 need only comprise a flip flop or other suitable logic device which produces an output which follows the input supplied thereto. The input to the ribbon lift logic 123 is supplied through a conductor 128 from the interface logic block 110. The input supplied from the interface logic block 110 is essentially the input applied to the interface logic block 110 by the appropriately annotated ribbon conductor within the multiconductor cable 24. Although the internal structure of the interface logic 110 may be employed to raise the control signal on the ribbon action conductor to an appropriate output level for the ribbon lift logic 123 prior to its application to the conductor 128, the output of the ribbon lift logic 123 is applied through a conductor 137 to the ribbon lift driver 124. The ribbon lift driver 124 may comprise any suitable form of driver stage which raises the output of the ribbon lift logic 123 to a level which is suitable to drive the ribbon lift coil. The output of the ribbon lift driver 124 is connected, as indicated in Figure 3, to the ribbon lift coil through a conductor 138.
Therefore, as will be appreciated by those of ordinary skill in the art, when a low condition resides on the con-ductor annotated ribbon action within the multiconductor ~052911 cable 24, this low level will be reflected at the output ` of the ribbon lift logic 123 and conveyed to the ribbon liftcoil to place the ribbon in an up condition which is the appropriate condition for a printing operation. However, when the level on the ribbon action input conductor within the multiconductor cable 24 goes high, indicating as shall be seen below, that no character input has been provided within a specified interval, this high level is reflected at the output of the ribbon lift logic 123, whereupon the ribbon lift coil is de-energized and the carbon or cloth ribbon is displaced in its non-print or low condition so that the operator may clearly view the portion of the document at which printing is to occur.
The output conductor within the multiconductor cable 24 annotated printer ready in Figure 3 is employed to indicate the status of the printer unit. More particul-arly, the printer ready conductor is employed to indicate whether or not the printer is properly supplied with power.
Therefore, as will be appreciated by those of ordinary skill in the art, the status condition indicated by the printer ready conductor indicates to the microprocessor indicated by the dashed block 16 when this status condition is gated to the common status bus 21 that a printer peripheral is in the system ancl that such peripheral is ready to receive operational commands. Accordingly, the program control sequence utilized by the microprocessor indicated by the dashed block 16 will test the status of tne printer ready lOS;~9~
; conductor prior ~o the issuance of any command to the printer unit depicted in Figure 3.
The resto e input conductor within the multicon-ductor cable 24 provides, as indicated in Figure 3, a specialized input to the printer ~lit which causes the printer unit to be placed in a predetermined initial state.
More particularly, an input on the restore input conductor causes a restore operation sequence to occur at the printer unit ~herein the printer unit is placed in an initial condition by returning the carriage to the first character position, rotating the daisy print wheel element to its starting or home position and resetting the internal logic o~
the printer unit. The restore sequence is introduced to the lcgic whenever power is turned on or when an operator activates the restore command input lineO Data inputs for achievin~ the necessary displacements in a restore operation sequence are supplied to data lines DLl-DLll from the read only memory 80 which supplies constants to the common data bus 19 in the manner described above. I'he restore operation, ~0 as will be appreciated by those of ordinary skill in the art, is not only utilized to initialize the printer unit each time tha s,~stem power is turned on, but in addition thereto, the initiation of this sequence is mandated each time it is necessary to clear a malfunction. In the restore sequence, the print wheel carriage is first displaced to its left most position, by causing the carriage logic 117 to issue a move to the left command and this co~tand is , ., .. ; ....... . . ~ . ........ . .
- , ~i, . , . . . ,, :.

~)SZ9~1 maintained until the carriage servo 118 indicates that the carriage is no longer moving. As will be appreciated by those of ordinary skill in the art and as fully explained in the above cited applications directed to the printer unit, no mechanical detents or margin settings are employed in the printer unit, therefore, as the printer unit will attempt to fully carry out each command issued thereto, the axis upon which the print wheel carriage traverses is pro-vided with a pair of crash stops located at the extreme limits of permissible carriage movement. When the carriage servo 118 detects that the carriage is no longer being displaced towards the left, such condition indicates that the print wheel carriage is against the left crash stop and has been prevented from being further displaced. A failure to further displace is indicated to the carriage servo 118, which normally senses inductively coupled cross points for each increment of displacement of the print wheel carriage, by a failure to further detect such cross points. Upon a detection tbat the print wheel carriage is up against the left crash stop, a move twelve (12) units to the right command is supplied to the printer unit by loading the data lines DLl - DLll with a magnitude of twelve (12) units and a right direction input while applying a character strobe to the interface logic 110. This causes the carriage logic 117 to initiate the movement of the print wheel carriage twelve (12) units to the right and terminate such movement after the carriage servo 118 has appropriately decremented 105Z9~

the register in the carriage logic 117. The twelve (12) unit incrementing of the position of the print wheel carriage to the right of the lleft crash stop is significant because it aligns the print wheel carriage with a position which corresponds to the zero margin position oE the carriage.
; Thus, the restore operation efiEectively acts to place the daisy print wheel element carriiage in a zero starting position whereupon the registers employed to keep track of the position of the print wheel carriage for margin control monitoring purposes may be placed in a cleared condition as the zeroing of the print wheel carriage is assured.
After the print wheel carriage has been placed in its starting or zero position, the print wheel is placed in a home position. The print wheel, as brieiEly discussed above, takes the form of a flat disc-like member having a plurality of regularly extending spokes on which each character is positioned. Normally, the print wheel element includes 96 character locations and a metal tab is affixed to a character position which has arbitrarily been assigned as the zero character position~ Under logic control the print wheel is rotated in a counter clockwise direction until the metal tab associated with the zero character position is detected. At this position the rotation of the print wheel is stopped. During the rotation of the print wheel, in a restore cycle, the feed back from the print wheel servo to the present position register in the print wheel logic 111 is disabled and when the print lOSZ9~1 wheel is stopped at its home position, the present position register within the print wheel logic 111 is cleared or placed in its zero condition, it now being assured that the daisy print wheel element is in a home or zero position and hence the zeroing of the present position register within the print wheel logic guarantees that a synchroniza-tion between the daisy print wheel element and the present position counter within the print wheel logic 111 is established. In addition, during the restore sequence, the ribbon lift logic may be gated to place the ribbon in its down position while paper feed logic 121 is inhibited.
Accordingly, as will be appreciated by those of ordinary skill in the art, the restore operation initiated by a restore input on the restore conductor within the multi-conductor control cable 24 establishes a set of initial conditions in the printer unit so that from this point forward synchronization between the various monitoring registers in the printer unit and in the printer interface 27 and the various command displacements issued to the printer will be assured. This is necessary because the use of dynamic registers and the like within the present embodiment of the automatic writing system according to the present invention requires that the microprocessor indicated by the dashed block 16 be assured that each time a power up operation is initiated a predetermined set of starting conditions are present. However, as dynamic registers lose their storage when the system is deenergized, such set of ~SZ911 initial conditions must be reestablished when the system first receives power. Similarly, any malfunction which might occur at the printer unit: might well cause one of the registers which monitor a condition of one of the elements within the printer to lose synchronization with the element~
Therefore, the restore operation is necessary to clear the malfunction in order that a re~synchronization of the system is assured.
From the foregoing description of the printer unit logically set forth in Figure 3, it will be appreciated that all operations of the printer are electronically initiated, implemented and controlled. This makes for highly reliable printer structure because the majority of mechanical expedients employed in most printers are completely avoided while the printer may operate at speeds exceeding those available from conventional input/output typewriters. For instance, while conventional input/output typewriters normally operate at a maximum speed of 15 characters per second, the instant printer unit depicted in Figure 3 may operate at 30 characters per second when driven by a record media. Furthermore, as a daisy wheel print element and a piston-like impact hammer are employed to achieve impact printing, the resultant operation is substantially more quiet than that present in conventional printers or input/output typewriters. Furthermore, the printer unit depicted in Figure 3 is particularly well suited for incorporation into the automatic writing system according to ~.- . - ~ . . ..... .

l~SZ9~i - the present invention because, as will be appreciated from the operation thereof set forth above, once a command is issued to the printer, the printer may act in the absence of further program contrcl, to carry out that function and will indicate on an appropriate status output when that function has been appropriately completed. This means that once the microprocessor indicated by the dashed block 16 has issued an instruction to the printer unit, the micro-processor may advance its program sequence to carry out further operations at other peripherals and may later return to the printer unit to monitor if the command issued has been successfully carried out prior to the issuance of a new command thereto.

THE PRINTER INTERFACE

Referring now to Figure 4, there is shown the details of the printer interface 27 and more particularly, Figure 4 schematically illustrates the printer interface 27 for the printer unit depicted in Figure 3. The printer interface depicted in Figure 4, as shall be more clearly seen below, performs essentially four (4) basic functions with respect to the automatic writing system as a whole and the printer unit and the microprocessor indicated by the dashed block 16 in particular with which it has primary association. These primary functions are (1) selectively gating data from the common data bus 19 to the printer unit 2 -~05Z91~L
through the application of the strobe control pulses to the printer unit, (2) providing control levels indicative of the various status conditions monitored at the printer to the common status bus 21 on a selective basis so that various status conditions may be monitored, (3) maintaining a continuous record of the present position of the daisy wheel print element carriage i~ the printer unit and pro-viding that information to the microprocessor indicated by the dashed block 16 on demand and (4) correlating the ~arriage position at the printer with tab information previously set at the keyboard. Thus, in accomplishing these functions, the printer interface depicted in Figure 4 complPments and controls the functions of the printer unit so that when the printer unit is connected through the printer interface to the common data bus 19, the common instruction word bus 20 and the common status bus 21; the printer appears as any other peripheral to the microprocessor indicated by the dashed block 16 and can be selectively enabled or disabled by the issuance of selected 16 bit instruction words on the common instruction word bus 20.
The printer interface depicted in Figure 4 com-prises a tab register 149, a printer status multiplexer 150, an interface output multiplexer 151, a carriage position register 152, data character output circuitry for the printer unit as indicated by the dashed block 153 and control output strobe circuitry to the printer unit as indicated by the dashed block 154. The tab register 149 comprises 105;~9~
- a conventional shift register having one data position therein for each character position in what is considered to be a standard line length of printed characters as reflected on any document which might be prepared. As the maximum line length on any document to be prepared is considered, for reasons which will be readily apparent below, to comprise a maximum of two hundred (200) characters, the tab register 149 may comprise a conventional shift register having two hundred (200) bit positions therein. Although any conventional shift register configuration may be employed, it is preferred, like the majority of the logic circuits employed in the present invention, that conventional MSI
chips be utilized wherever possible. Accordingly, the tab register 149 may comprise an MSI shift register chip having two hundred (200) bits of storage therein. The tab register 149 includes a clock input 156, a data input 157 and a data output 158. The clock input 156 to the tab register 149 may be connected to a conventional pulse generator (not shown) which produces a pulse each time the carriage on the printer unit is displaced, a single character position.
Therefore, such pulse generator may be driven by dividing down the output of the same clock that is employed to drive the carriage servo 118 illustrated in Figure 3 so that a pulse is produced each time the carriage servo 118 causes displacement of the carriage through the character position.
The clock input 156 to the tab register 149 acts in the conventional manner to advance the position of each bit stored in the tab register 149 by one storage location each time a pulse is applied to the clock input 156. Thus, once . . -105;~911 the tab register 149 has been loaded with a complete line of tab information, the data stored in the last bit position thereof, will reflect that associated with the first carriage position and thereafter, as dal:a shifted into and from this last storage position is clocked through the register, the data present in the last bit position of the tab register 149 will continuously reflect information associated with the present position of the daisy wheel print element carriage of the printer unit.
The data input 157 to the tab register 149 is adapted to receive a ONE (1) for each tab to be loaded and a ZERO (0) for each carriage position where no tab is present. When tab information is set by an operator at the keyboard at the beginning of a given operation, appropriate ONES and ZEROS are applied to data input 157 by the micro-processor indicated by the dashed block 16. If a conven-tional tab setting operation normally employed by any operator of a typewriter or the like is considered, it will be appreciated that the operator starts at the left hand margin setting of the unit being employed and displaces the carriage thereof on per character basis setting tabs at each character location which is desired by depressing a lever or key at the keyboard when the carriage is in an appropriate position. As the keyboard means 1, as afore-said, is adopted to present the familiar configuration of a conventional typewriter keyboard to an operator, tabs are set in the automatic writing system according to the instant ~05Z91~
invention in the conventional manner; however, as the printer means 2 does not employ any mechanical detents, the actual setting of tabs must be accomplished electronically.
In the present embodiment of the instant invention, as the operator initially causes the displacement of the carriage on the printer, setting tab locations at each position desired, ZEROs (0's) are loaded into the tab register 149 at the data input 157 for each character position where no tab is set while a ONE (1) is loaded at the data input 157 at each carriage position where a tab is set by the depression of an appropria~e lever. Thus, during a tab setting operation by an operator, a ZERO (0) or ONE (1) bit will be applied to the data input 157 for each character position in a line so that a ONE (1) or ZERO (0) will be loaded into the tab register 149 due to the action of the clock input 156, for each of the two hundred (200) character positions in a line and hence for each of the two hundred (200) bit storage locations in the tab register 149.
The actual loading of the tab register 149 with ONBs (l's) and ZEROs (0's) applied to data input 157 is accomplished by instructions from the microprocessor indicated by the dashed block 16 which, effectively applies an instruction indicating tab to ONE (1) or tab to ZERO (0) in response to a tab setting operation at the keyboard means 1. The manner in which this is accomplished, is more fully explained in the application directed to the microprocessor ~LOSZ911 indicated by the dashed block 16. Here, however, it is sufficient to appreciate that during a tab setting operation, ONEs (l's) and ZERO's (0's) are loaded into the tab register 149 in a manner such that a ONE (1) or a ZERO (0) is placed in each of the two hundred (200) bit locations of the tab register 149 and that the location of the bit stored corresponds to the location of the print carriage while the actual data bit stored at a given location corresponds to tab or no tab information. The output of the tab register 149 is connected to the data output conductor 158 and is associated with the two hundredth (200th) bit position within the tab register 149. Therefore, it will be appreciated that when a tab setting operation has been completed, the bit associated with the first character position of the carriage is located in the two hundredth (200th) bit position of the tab register 149 while the bit associated with the last character position of the carriage is located in the first storage location of the tab register 149. The data output conductor 158 is connected as indicated to the printer status multiplexer 150, and although not illustrated in Figure 4, is connected through appropriate logic circuitry back to the data input of the tab register 149 in a conven-tional recirculation configuration. The recirculation con-figuration wherein the output conductor 158 is connected back to the data input 157 through appropriate logic cir-cuitry, such as a gate which alternatively permits tabs to 105Z91l be set or recirculation to occur, is employed so that after the tab setting operation has been completed, the tab information set into the tab register 149 may be recirculated through the tab register 149 as the carriage is displaced and returned to its left most position as each line of a document being prepared is printed. In this manner, once tabs are set by the operator at the keyboard, the tab register 149 maintains a record of the tabs as the various characters are printed in eacb line of the document being prepared. Thus, as no physical detents are employed on the printer unit as aforesaid, the tab register 1~9 electron-ically achieves this function because the ONEs (l's) and ZEROs (0's) applied to the data input 157 represent tab or no tab information and they are clocked through the tab register 149 with each character displacement of the daisy wheel print element carriage in the printer unit. As will be appreciated by those of ordinary skill in the art, the logic circuitry employed to feed back the output of the tab register 149 through conductor 158 to the data input 157 of the tab register 149, is disabled whenever a tab setting or clearing operation is initiated at the keyboard and enabled, under program control whenever the printer is otherwise being utilized.
THE STATUS CONDITIONS MONITORED
The printer status multiplexer 150 may comprise a conventional eight (8) input one (1) output multiplexer device utilized in the well known manner to selectively gate a predetermined one of the eight (8) inputs thereto to the - 10529~11 .
single output thereo~. The printer status multiplexer 150 may take the form of an MSI 7451 chi? conventionally available from the Texas Ins~rument Corporation and, as shall be seen below, functions to selectively gate one of a `
-pl~rality of status conditions associa'ed with the printer means 2 to the co~mon status bus 21. A ~irst input to the pri~ter status multiplexer 150 is connected, as aforesaid, throu~h conductor 158 to the output of the tab register ` 149. As will be appreclated rom the description o~ the tab register 149, the tab input to the pr~nter status multi-~lexer 150 continuously re~lects whether the present print position of the daisy wheel print element carriage on the printer unit is a tab character position or a non-tab character position so that this information is constantly 15` available to the common status bus 21 whenever the tab input to the'printer status multiplexer 150 is selected. Thus, a Z~RO (O) bit present at the tab input to the printer status multiplexer 150 lndicates that the present position o~ the daisy wheel print element carriage at the printer unit is a non-tab character position while a ONE (1) at the tab input indicates that such position is a tab position.
In addition,~ the printer status multiplexer 150 is supplied through the multiconductor cable 24 with the four status inputs ~rom the printer unit. As l~rill be recalled from a description of the printer unit set forth in con~unction with Figure 3, the interface lo~ic blocl; 110 prcvides a printer ready, character ready and paper feed ready status output lOSZ9~1 whenever the operation associated therewith has been sucessfully completed and the ~printer unit is ready to receive a new command associated with this function. Each of these status signals from t11e interface logic block 110 are S inverted and applied to the printer interface and more particu-larly the printer status multiplexer 150 therein after they are conveyed thereto through the multiconductor cable 24.
At the printer interface each of these inverted status signals are applied to separate inputs of the printer status multiplexer 150 as printer ready not, character ready not, carriage ready not, and paper feed ready not signals appropriately annotated wherein the bar over the annotation indicates a not function. As will be recalled from the simplified description of the addressing techniques employed in the microprocessor indicated by the dashed block 16 set forth above, branch operations at the ROM address register 51 are accomplished in response to a branch instruction, i.e., one having bit Bll equal to a ONE (1) by a comparison of the true or false condition of the common status conductor 21 with bit Blo of the branch instruction which may be equal to a ONE (1) or ZERO (0).
When a positive result i.e., both Ones or Zeros, from the comparison operation is achieved, the branch instruction is implemented by utilizin~ four bits within the branch instruction to modify the previous address from the new address supplied by the ROM address register 81 to the read only memory 80.

105Z9~1 Thus, it will be seen, that whenever a branch operation is to be implemented, a comparison with a condition on the common status bus 21 may cause a branch to occur or the normal incrementing of the ROM address register 81.
Therefore, for instance, for the not status inputs illustrated, a ONE (1) condition on the status line may be considered to be the condition for which a branch occurs since, as will be re-called from some of the simplified programming instructions set forth above, branch operations into a monitoring program loop are employed whenever the various conditions of the printer are not ready to receive a new instruction.
Accordingly, the printer ready, character ready, carriage ready and paper feed ready status inputs are received as inverted inputs so that the not ready condition will be the condition upon which a branch occurs when One (1) branch qualifier bit (Blo) is present in a branch instruction. In an effort to make the drawings self explanatory, every input to a logic block is annotated with the nature of the input when a ONE (1) level is applied thereto and hence, when a function not appears as a ONE (1), the function annotated at that input has a bar associated therewith to indicate that the not function is the one for which a ONE (1) level input occurs. Although it has been stated that the printer ready, character ready, carriage ready, and paper feed ready status inputs from the interface logic 110 in tbe printer unit are received in inverted format at the printer status multiplexer 150, it will be readily appreciated by those of ordinary skill in the art that direct functions which are subsequently inverted could be - 16~ -~05~9~1 derived directly at the printer unit depicted in Figure 3.
A further status input supplied to the printer status multiplexer 150, as shown in Figure 4, is annotated 10 PITCH. This input is employed to apprise the system as to whether a ten pitch or twelve pitch daisy wheel print element is mounted at the print:er unit. When a ONE (1) level is present at this input, it indicates that a ten (10) pitch daisy print wheel element is in place while when a ZERO (0) is applied, it is indicative that a twelve (12) pitch print wheel element is presently being employed. The appropriate input condition for the ten pitch input to the printer status multiplexer 150 is supplied by a lever setting at the keyboard, as shall be seen below, and may either be directly applied to the appropriate input of the printer status multiplexer 150 or applied thereto through the micropro-cessor indicated by the dashed block 16. The output of the printer status multiplexer 150 is supplied through a conductor 159, directly to the common status bus 21 in the manner plainly indicated in Figure 4. Accordingly, it will be seen that either the tab or no tab condition of the present character position of the printer carriage, the printer ready, character ready, carriage ready or paper feed ready status of the printer or the ten or twelve pitch nature of the daisy wheel print element presently being utilized may be selectively applied by the printer status multiplexer 150 through conductor 159 to the common status bus 21.

~S2911 The input to ~he printer status multiplexer 150 which is ap~lied to conductor 179 and hence ~o the co~on status bus 21 is selected by the three conductors annotated status in~ut select ~rom ;R0~l. These three conductors are --connec~ed through the si~lteen (16) bit instruction ~ord cable 32 2S shown in Figure 2, directly to the co~mon ins~ruction word bus 20. `;~lore p~rticularly, these three.
conductors, as indicated Ln Figure 4, are connected to individual ones of the conductors within the co~mon instruc-tion word bus 20 which are associated with bits B4, B5 and B6 of the sixteen (16) bit instruction ~ords read ~rom the read only memory 80. Accordingly, depending upon the 0l~
(1) or ZER0 (0) condi~ions of bits B4 throu~h B6 Or instruction wo~ds read from the read only ~emory 80 and applied to the printer inter~ace, one of the six (~) status inputs to the printer status multiplexer 150 will be de~ined by the select inputs associated tJith bits B~ - B~
and t~hen an appropriate strobe pulse is applied to the - printer status multiplexer 150, the status input derined thereby ~ill be a~plied to the conductor 159 and hence to the common status bus 21. It will be appreciated by those of ordinary skill in the art, that the three (3) select inputs to the printer status multiplexer 150 are ca~able of uniquely de~ining any Or eight (8) inputs to the multiplexer for application to conductor 159 ~Jhile only six (6) .status inputs have been illustrated in Figure 4. This ~eans that were it deslred to em~loy a check status input as ~entioned . - 168 - .

~OS'~9~1 ~n the discussion of the printer unit set forth in Figure 3 the printer status ~ulti~lexer 150 in its present ror~ could readily acco.~.~odate such an input.
The printer status mult1plex~r 150 as shotm in Figure 4, additionally comprises a strobe input as indicated in ~igure 4~ The strobe input acts ln the well known manner to apply a selected input to the printer status multiplexer 150 to the output thereof each time a ne~atively directed pulse is applied to such strobe input. The strobe ~nput to the printer status multiplexer 150 is connected as sho~n in Fi~ure 4 to AND gate 160 whose outout is inverted. The Ai-~D ~ate 160 may comprise any of conventional ~orms of lo~ic devices of this well kno~Jn variety which act to produce a lo~Y outout whenever all Or the in~uts thereto are hi~h. In this case, the AiiD gate 160 is a ~our input Ai~D
gate wherein each o~ the inputs thereto are connected to receive B bit information of the type indicated in Figure 4 fro.m the sixteen ~16) bit instruction words applied from the read only memory 80 to the common instruction word bus 2Q 20. The three (3) inputs to the AND gate 160 connectèd to the blocks annotated B7, B8 and BgNOT, are self-ex~lana-tory and it will be appreciated that hi~hs are applied to each of these inputs whenever an instruction word issued by the read only memory 80 has bits 37 and B~ at ONE (1) levels and bit Bg at a ZERO (O) level. The inout to the AND ga~e 160 whicn is annotated MA=l is a modular address definin~ the printer -interface which is decoded from bits . .

` ~OSZ9~1 B12 - B15 in the instruction words issued by the read only memory 80. Thus, whenever the modular address defining the printer unit equals a ONE (1) and bits B7 and B8 are high while bit Bg is low, all of the inputs to the AND gate 160 will be high whereupon a low is applied to the strobe input of the printer status multiplexer 150. The low pulse applied to the strobe input of the printer status multi-plexer 150 will cause one of the status inputs, as selected by the three status input select lines, to be applied from the output of the printer status multiplexer 150 through conductor 159 directly to the common status bus 21. Thus, as will be appreciated by those of ordinary skill in the art, the sixteen (16) bit instruction words read from the read only memory 80 will, when appropriate to the printer inter-face, define which one of the status inputs to the printer status multiplexer 150 is to be conveyed to the common status bus 21 as a result of that instruction and also provide an appropriate strobe pulse to the printer status multi-plexer 150 to cause the application of the selected status input to the common status bus 21. In this manner, instructions from the read only memory 80 may be initially utilized to sample the condition of a status indicator from the printer unit prior to the issuance of a data capture c~mmand and strobe pluse thereto. Thereafter, a next instruction from the read only memory 80 may cause the printer to acquire data and issue a strobe pulse thereto, whereupon the status of a selected condition may be again tested in a 105Z9~l subsequent command to ascertain whether or not the data acquired has been appropriately processed by the printer unit and hence whether new commands may be issued thereto.
DATA CONVEYED TO AND FROM THE COMMON DATA BUS
The interface output multiplexer 151 comprises a conventional four (4) input, one (1) output multiplexer wherein each input comprises an eight (8) bit character and the output also comprises an eight (8) bit character. This multiplexer may be conventionally formed by employing four, eight (8) input-two (2) output multiplexer chips of the 74153 MSI variety conventionally available from Texas Instrument Corporation. The four (4) multiplexer chips are cascaded in such manner that two (2) of the inputs on each of the multiplexers are employed for two (2) bit positions of each of the four, eight bit character inputs while each of the two (2) outputs of the four (4) multiplexer chips are employed for two (2) of the bit positions in the eight (8) bit output character provided thereby. If corresponding bit positions on each multiplexer chip are employed for the same character, the same two select inputs may be connected to each of the four multiplexer chips utilized in the formation of the output multiplexer 151 and, similarly, a common strobe pulse may be applied to each of the four multiplexer chips relied upon. The output of the interface output multiplexer 151 is connected directly to the common data bus 19 as indicated by the eight (8) individual data bus conductors annotated DBo ~ DB7 in Figure 4. Thus, it will be readily appreciated by those of ordinary skill in the .- - , ~ ' . ' .
. . .

lOSZ9~1 art that the eight (8) bit character output of the inter-face output multiplexer 151 may be gated directly onto the common data bus 19 whenever a strobe input is applied thereto.
First and second eight (8) bit character inputs to the interface output multiplexer 151 are indicated by the input conductors 170 and 171, respectively. As indicated by the annotations associated w~ith the conductors 170 and 171, these inputs to the interface output multiplexer 151 represent the left and right standard margin settings for this embodiment of the automatic writing system according to the present invention, more particularly, the present invention provides an automatic ~riting system having standard left and right margin settings which may be selectively overriden by an operator setting desired margins at the keyboard in a manner to be described hereinafter.
However, should the operator not set desired margins at the keyboard means 1, the standard left and right margins hard wired into the instant invention will operate to provide any document being prepared with the standard margin incorporated into the automatic writing system. These standard right and left margins are represented by the input conductors 170 and 171 to the interface output multiplexer 151. As these standard right and left margins are hard wired into the input connections to the interface output multiplexer 151, they have been illustrated in Figure 4 as only single input conductors 170 and 171; however, it will be appreciated :105'~911 that such left and right standard margins take the form of eight (8) bit characters defining the left and right standard margin position in terms of a character position of the printer carriage. Thus" although only single inputs 170 and 171 have been illustrated in Figure 4 for the left and right standard margins, it will be appreciated that in fact, eight (8) bits of charact:er information are represented by each of input conductors 170 and 171 and when these inputs are selected by the select input to the interface output multiplexer 151 an eight (8) bit output character repre-sentative of the standard margin selected is applied to the .-ommon data bus 19 and more particularly to data lines DBo ~ DB7 therein. Thus, the conductors 170 and 171 depicted in Figure 4 each represent an eight (8) bit character input to the interface output multiplexer 151 which defines the standard right and left margin settings respectively.
A third eight (8) bit character input is provided to the interface output multiplexer 151 by the carriage position register 152 through input conductors TRCo ~ TRC7 as indicated in Figure 4. The carriage position register 152, as shall be described hereinafter, provides an eight (8) bit output character indicative of the present position of the daisy wheel print element carriage to the interface output multiplexer 151 so that when this input is gated through to the common data bus 19, as indicated by the data bus lines DBo ~ DB7, the microprocessor indicated by the . .. . .. ~ . .

lOSZ9~1 dashed block 16 is apprised of the present position of the daisy wheel print element carriage at the printer unit due to the insertion of this eight (8) bit character into the main register M. As there are two hundred (200) possible print positions for the daisy wheel print element carriage in the printer unit, it will be appreciated that the eight (8) bit character output of the carriage position register 152, as applied to the interface output multiplexer 151 through conductors TRCo ~ TRC7 is appropriate to uniquely define carriage position in terms of each of such character positions. The carriage position register 152 may take the form of a two hundred (200) bit counter which acts to incre-ment each time a tab clock pulse is applied thereto wherein, as will be recalled, the tab clock pulse represents the movement of the carriage for the printer wheel by one character position. Tab clock pulses are applied to the carriage position register 152 through the conductor 172 and the input for the tab clock pulses applied to conductor 172 may be commoned to the input for the tab clock pulses applied through conductor 156 to the tab register 149.
In addition, a reset input to the carriage position register 152 is applied through conductor 173. The carriage position register 152 is a counter which is only capable o~ being incremented or counted up in one direction and the reset input applied on conductor 173 is necessary to clear the state of this counter each time the system is : ~os;~9~
initialized or returned to its zero position or the extreme left hand position upon a carriage return if programmed controlled incrementing for a return to Zero condition is not otherwise specified. Accordingly, it will be appreciated that the carriage position counter 152 is incremented by pulses applied from the tab clock to conductor 172 each time the daisy wheel print element carriage present in the printer unit is displaced by one character position.
Thus, it will be seen that the carriage position register 152 operates synchronously with the tab register 149 and acts to define in the eight (8) bit output thereof the present position of the daisy wheel print element carriage in the printer unit in terms of possible character positions.
The present position of the daisy wheel print element carriage present in the printer unit is thereby uniquely defined in the eight (8) bit output of the carriage position register 152 and is applied as a character input to the interface output multiplexer 151.
As only three (3) input characters are supplied to the interface output multiplexer 151 only a two (2) bit select input is necessary to uniquely define the character to be presented at the output thereof This two (2) bit select input to the interface output multiplexer 151, as indicated in Figure 4, is applied to conductors 174 and 175 so that one of four (4) or in the instant case, one of three (3) input characters to the interface output multi-plexer 151 is uniquely identified and applied to the eight (8) bit single character output thereof. The two select 1~5'~9~
inputs to the interface output multiplexer 151, as indicated in Figure 4, are controlled by bits Bo and Bl in the sixteen (16) bit instruction words app:lied by the read only memory 80 to the common instruction word bus 20. Accordingly, as will be apparent to those of ordinary skill in the art, conductors 174 and 175 are connected to the Bo and Bl bit conductors in the sixteen (16) bit instruction cable 32, as shown in Figure 2, which connects the printer interface to the common instruction word bus 20. Therefore, the Bo and Bl bits present in every sixteen (16) bit instruction word read from the read only memory 80 act in combination to uniquely define which one of the three eight (8) bit input characters applied to the interface output multiplexer 151 is to be applied to the output thereof and hence, to the common data bus 19, assuming that this peripheral has been defined.
The input to the interface output multiplexer 151 selected for application to the output thereof is applied thereto upon the application of a strobe input to the strobe input of the interface output multiplexer 151 indicated in Figure 4. In similar manner to the printer status multiplexer 150, the strobe input to the interface output multiplexer 151 requires a negatively directed pulse to gate a selected input to the interface output multiplexer 151 to the output thereof. The strobe input to the interface output multiplexer 151 is connected through conductor 177 to an AND gate 178 whose output is inverted.

~5Z91:1 The AND gate 17~ may take the sa~e form as the ~ND g~te 160 described above and acts in the conventional manner to apply a negatively directed ; pulse to conductor 177 whenever both of the inputs thereto are high. A ~irst input to the A~D gate 178 is connected throu~h conductor 179 ~o a logic device, not sho~n, which de~ines the printer address as indicated. The printer address is obtained by a logical decodlng of bits B12- B15 contained in the sixteen tl6) bit instruction words applied by the read only memory 80 to the co~mon instruction word bus 20, and accordin~ly, whenever an instruction is read from the read only memory 80 which defines the printer unit bits B12- 315 will have the appropriate Oi~E (l) and ZERO
(0) values so tnat the lo~ic device connected to conductor 179 will apply a high value thereto. Thus, it will be appreciated by those of ordinary sklll in the art that instructions destined for printer operation will provide an appropriate printer address ror placing a high level on the input of AND gate 178 connected to the conductor 179.
The second input to A~TD gate 178 is connected through conductor 180 to the output of AND gate 181 whose inputs are inverted. The L~D gate 181 may take the ~orm of con-ventional logic devices of this type which, due to the inverted inputs thereof, produce a high output on conductor 2~ 180 whenever bcth of the inputs thereto are low. The first input to AND gate 181 is conn~cted as indicated in Figure 4 to the conductor within the sixteen (16) bit instruction word , .

:`
lOSZ911 cable 32 which conveys bit B2 of the instructions while : the second input to AND gate 181 is connected through ~-. an inverter to a conductor within the sixteen (16) bit word cable 32 which conveys instruction word bit B8 so that a not input is obtained therefor. Accordingly, whenever bit B2 of an instruction word read from the read only memory and applied to the common instruct:ion word bus 20 is low while bit B8 is high, the output of AND gate 181 will be high.
Therefore, when the printer is addressed by an instruction so that a high is present on conductor 179 and that same instruction has a B2 bit which is low and a B8 bit which is high, both inputs to AND gate 178 will be high whereupon a negatively directed strobe pulse is applied through conductor 177 to the interface output multiplexer 151 to gate the selected eight (8) bit character input thereto onto the common data bus 19. In addition, the output of the AND
gate 178 is connected through a conductor 182 and an inverter amplifier 183 to a control conductor 184 which is annotated DB to M in Figure 4. This control conductor 184 is employed to gate the main register M illustrated in Figure 2 and is required to be at a high level each time an eight (8) bit character is to be inserted by one of the peripherals into the main register M. Thus, the same strobe pulse which acts to gate information from the interface output multiplexer 151 onto the common data bus 19 for conveying an eight (8) bit character to the main register M provides, through conductor 184, a positive directed control level so that the main register lOSZ91~
M is enabled to accept data in the form of an eight (8) bit character from the common data bus 19. Accordingly, it will be appreciated that the sixteen (16) bit instruction words read from the read only memory 80 and applied through the common instruction word bus 20 and the sixteen (16) bit instruction cable 32 to the various control inputs to the interface output multiplexer 151 acts in a selective manner to command that either eight (8) bit character information representing the left standard margin, the right standard margin or the present position of the daisy wheel print element carriage at the printer unit be applied to the common data bus 19 for insertion into the M register and at the same instant that the decoded B bits cause the application of this eight bit data character to the common data bus 19, a gate instruction is applied to the main register M through conductor 184 so that this information may be appropriately inserted into the main register M.
As was described in conjunction with Figure 2, eight (8) bit character information is conveyed from the common data bus 19 through the eight (8) bit data cable 31 to and from the printer interface 27; however, only character or function information is conveyed from the common data bus 19 to the printer means 2 through the uni-directional eleven (11) bit data cable 25. From the description of the interface output multiplexer 151, it will now be appreciated that the information conveyed from the printer interfiace to the eight (8) bit data cable 31 and ~ os~9~
hence, to the common da~a bus 19 consists of left standard margin, right standard margin, or present daisy wheel print element carriage position information selectively read from the interface output multiplexer 151. However, only data representing either character information to be printed by the printer means 2, escapment information for the daisy wheel printer element carriage or paper indexing information required for the appropriate action of the paper feed logic 121 shown in Figure 3 is conveyed from the common data bus 19 through the eight (8) bit data cable 31 to the printer unit depicted in Figure 3 and this information is conveyed through the eleven (11) bit data cable shown in Figure 2 and indicated in Figure 4. Furthermore, while the eight (8) bit character information was conveyed through the common data bus 19, recollection of the operation of the printer unit shown in Figure 3 will render it manifest that only seven (7) bit character information is employed to appro-priately actuate the print wheel logic 111 and hence, cause the requisite displacement of tbe daisy wheel print element and the subsequent printing of the character selected. The fact that the common data bus 19 ordinarily conveys only eight (8) bit data characters while the print wheel logic at the printer unit responds to seven (7) bit character representing alphanumeric information may be explained in terms of the coding employed to designate alphanumeric characters which are to be printed. Thus, when printable characters are coded at the keyboard, a seven (7) bit ASCII

.

code is sufficient ~ ~pp~ri~r~ IY designate all the eighty-eight (88) alphanumeric characters which are used in printing while the eighth bit employed in the eight (8) ; bit ASCII code utilized to code information from the keyboard means 1 is required so that all appropriate function - information from the keyboard means 1 may be included.
Accordingly, this allows all a;Lphanumeric character infor-m~tion or printable informatiorl from the keyboard means 1 to be encoded in such manner that although an eight (8) bit ASCII code is employed, all of the characters designating i printable information are assigned an eigh-t (8) bit code wherein the eighth bit is ZER0. This means that while eight (8) bit character information is effectively conveyed from the keyboard means to the common data bus 19 and from i5 the common data bus 19 to the printer means 2, the eighth bit of alphanumeric character information which is to be printed is ~ zero and is not utilized by the print wheel logic 111 in defining the position of the daisy wheel print element. Accordingly, although eight (8) bit character information is conveyed to the printer unit depicted in Figure 3 through the eleven (11) bit data cable 25, the printer unit depicted in Figure 3 responds to a character strobe pulse to only apply the first seven (7) bits of this character to the print wheel logic 111.
The data character output circuitry for the prlnter unit, as indicated by the dashed block 153, comprises data lines DLl - DLll, first and second driver stages 185 and 186 .
- . ~ ~ . . .

105~9~
therefor, latch means 187 and A~D gate 188 and 189. The data lines DLl - DLll are connected to the common data bus 19 and specifically to data conductors DBo ~ DB7 present in the eight (8) bit data cable 31 in the manner shown in Figure 4. More particularly, data lines DLl - DL8 are formed by the connection of the individual conductors to .
conductors DBo - DB7, respectively, in the eight (8) bit data cable 31. Additionally, data lines DLg - DLll are also connected to conductors DBo - DB2, respectively, within the eight bit data cable 31 so that eieven (11) data lines DLl - DLll are formed within the eleven (11) bit data cable 25 wherein data lines DLl - DL3 and DLll - DLg~ respective-ly, are commonly connected to conductors DBo - DB2 in the eisht (8) bit data cable 31. This means that when a seven

(7) bit character representing alphanumeric or print information is applied through the common data bus 19 t~ the printer unit, eight (8) bits of character information con-tained from conductors DBo - DB7 are applied to data lines DLl - DL8 wherein the data bit residing on data line DL8 is always a zero for printable information and hence, is ignored by the printer unit in that it is not applied to the print wheel logic 111 upon the appearance of a character strobe. When, however, constants from the read only memory 80 are applied to the common data bus 19 to achieve a carriage displacement or a paper inde~ing operation at the printer unit, the first eight (8) bit data character applied to conductors DBo - DB7 in the eight (8) bit data cable 31 lOSZ9il only has three significant data bits, ie, DBo ~ DB2 therein which are applied to data lines DLll - DL9 respectively, the remaining bits being ZER0 and hence capable of being ignored. The second eight (8) bit character read from the read only memory 80 under these conditions however, includes ; eight (8) bits which are all significant and each of such eight (8) bits is applied respectively to the data lines DLl - DL8.
- The data lines DLl - DL8 are connected, as indicated in Figure 4, through a first driver stage 185 to the data line inputs DLl - DL8 at the interface logic block 110 of the printer unit depicted in Figure 3. The first driver stage 185 may take the form of a conventional eight

(8) bit driver or eight (8) individual driver circuits which act in the conventional manner to raise input levels of signals applied thereto to appropriate levels prior to placing them at the outputs thereof. Thus, the first driver stage 185 acts in the conventional m~nner to raise the bit information applied thereto on data lines DLl - DL8 to appropriate levels prior to the application of this infor-mation to the correspondingly designated inputs at the inter-face logic block 110 of the printer unit shown in Figure 3.
In a similar manner, data lines DLll - DLg are connected through latch means 187 and the second driver stage 186 to the data line inputs DLll - DLg at the interface logic 110 of the printer unit illustrated in Figure 3. The second driver stage 186 may take the form of a conventional three .

~ OSZ9~Ll .(3) bit driver or three (3) individual driver circuits which perform precisely the same function as the ~irst driver stage 185 with respect to the inputs supplied thereto by data lines DLll - DL9 connected thereto. The latch means ` 5 187 is connected intermediate the second driver stage 186 and the inputs of data lines DLll - DLg to the data lines DBo - DB2 which are present in the eight (8) bit data cable 31. The latch means 187 may comprise a conventional four (4) bit latch circuit, where only three (3) bit inputs there-to are utilized, such as a conventional four (4) bit latch MSI, SN7475 chip available from the Texas Instrument Corporation. The latch means 187 acts in the conventional manner to store, when enabled, bit inputs which are applied thereto and to provide such inputs to the output conductors thereof whenever the latch is again enabled. In the instant :.
case, the latch means 187 is employed to store a three (3) bit input to data lines DLll - DLg from the data con-ductors DBo ~ DB3, respectively, for one instruction cycle while a subsequent instruction cycle is employed to apply an eight (8) bit data character to data lines DLl - DL8.
In this manner, as will be readily apparent to those of ordinary skill in the art, in an instruction involving a carriage displacement or paper indexing command to the printer unit, the first three bits necessary for such command may first be read ~rom the read only memory 80 and applied through data conductors DBo - DB2 where they are stored in the three (3) bit positions within the latch means 187 which 5, 105Z9~
corresponds to the bit positions associated with data lines D~ DLg respectively. Thereafter, in the next instruction cycle eight (8) data bits may be read from the ROM and applied through the common data bus 19 to the data conduc-tors DBo - DB7 for application to data lines DLl - DL8.
When data lines DLl - DL8 are in possession of the second eight (8) bit character read, the latch means 187 may be enabled for readout so that an eleven (11) bit cha:racter appropriate for a carriage displacement operation or a paper indexing operation may be applied to the printer unit ~hrough data lines DLl - DLll. Thus, the latch means 187 allows eleven (11) independent input bits to be obtained from the common data bus 19 through data conductors DBo ~
DB7 and applied to the printer unit through data lines DLl -D~ll The enable input to the latch means 187, as indicated in Figure 4, is connected through a conductor 190 to the output of the AND gate 188. The AND gate 188 may take the form of a conventional AND gate which acts in the well known manner to produce a high level output when both of the inputs thereto are high. A first input to AN~ gate 188 is connected through conductor 191 to a strobe pulse generator, as indicated~ The strobe pulse generator, not shown in Figure 4, may take the form of a conventional logic gating device which produces a strobe pulse as a function of the printer address and a clock pulse applied thereto to ensure appropriate timing. The printer address, as was - 185 _ !: ' , : ` ~osz9~
discussed in connection with AND gate 178 is decoded as a function of bits B12 - B15 contained in each instruction issued by the read only memory 80. The strobe pulse, as will be apparent to those of ordinary skill in the art, is timed to occur each time a three bit constant to be loaded into the latch means 187 is read from the read only memory 80 as well as each time an eleven (11) bit character re-prssenting paper or carriage displacement information is to be applied to the printer unit depicted in Figure 3 as would occur in the next instruction cycle. The second input to AND gate 188 is connected through conductor 192 to the output of AND gate 189. The AND gate 189 may take the conventional form of logic devices of this type which act in the well known manner to produce a high level output only when all of the inputs thereto are high. A first input to AND gate 189 is connected through a conventional inverter 193 to phase A of a four phase clock as indicated in Figure 4. This four phase clock, although not indicated in Figure 4, may comprise the same clock used to develop the strobe input applied to conductor 191 o~ AND gate 188. A
second input to AND gate 189 is connected as indicated in .Figure 4, to the bit conductor in the sixteen (16) bit instruction word cable 32 and the common instruction word bus 20 which is associated with bit B4. Thus when bit B4 of any instruction read from the read only memory 80 is high, this input to the AND gate 189 will also be high.

~ 186 -~, ... . . . .. .. . . . .

iOSZ9~1 third input to the AND gate 189 is connected through a conventional inverter 195 to the bit conductor present within the sixteen (16) bit instruction word cable 32 and hence the common instruction word bus 20 associated with bit B8 of an instruction. Thus, when bit B8 of an instruc-tion read from the read only memory 80 is low, the input to AND gate 189 connected through inverter 195 will be high.
Accordingly, it will be seen that the decoding and timing circuitry formed by AND gates 188 and 189 function to enable the latch means 187 to hold a three (3) bit character applied through the data conductors DBo ~ DB2 to data lines DLll - DLg whenever the first three (3) bits of an eleven (11) bit displacement constant for the printer unit is read out of the read only memory 80 and subsequently the latch means 187 is enabled by such decoding and timing circuits to apply the three bit constant to data lines DLll -D~g at a time when the remaining eight (8) bits of the displacement constant to be applied to the printer unit have been read from the read only memory 80.
Although the latch means 187 serves as a gating means for the input to data lines DLll - DLg and for the corresponding inputs to the printer unit depicted in Figure 3, no such gating unit is employed in association with data lines DLl - DL8. Therefore, it will be appreciated that any time eight (8) bit character information is present on the common data bus 19, such eight (8) bit character information will be available to the printer through the eight (8) bit 1~5Z9~

data cable 31 and data lines DLl - DL8. However, the printer unit may not accept such eight (8) bit data characters until an appropriate strobe pulse is applied thereto so that the eight or more data bits on data lines DLl - DLll may be appropriately gated through the interface logic block 110. This function is controlled by the output strobe circuitry for the printer unit.
THE PRINTER CONTROL SIGNALS PRODUCED AT THE INTERFACE
The control output strobe circuitry for the printer unit is indicated by the dashed block 154 in Figure 4. The control output strobe circuitry for the printer unit comprises AND gates 196 - 199 associated with the character strobe, the carriage strobe, the paper feed strobe, and the restore input to the printer unit, as indicated, and AND gate 200 which is associated with the ribbon action input to the printer unit.
The AND gates 196 - 199 may take the same form as the AND gate 188 described above and act in the conventional manner to provide a high level output whenever each of the inputs thereto is high. A first input to each of AND gates 196 - 199 is commonly connected through conductors 201 and 201, as shown in Figure 4, to a common source of timing pulses indicated as ADDR2CL. The timing input applied to each of the commonly connected inputs of AND gates 196 - 199 is derived as a function of the strobe input described above in conne~tion with AND gate 188 and bit B8 read from each sixteen (16) bit instruction word applied to the common instruction word bus from the read only memory 80. Therefore, ~osz9~
as it will be recalled that the strobe input was derived as a function of the printer address, i.e., the appropriate decoding of bits B12- B15 in each instruction word directed to the printer unit and in add:ition a clock, which may take the form of two phases of a three phase clock having an overlap interval of approxiMately three-fourths of a microsecond (.75 us)~ it will be appreciated that whenever an instruction is directed to the printer so that the appropriate printer address therein may be decoded from bits B12- B15, in an instruction wbere B8 is low, a positive pulse having a duration of approximately three-fourths of a microsecond (.75 us) will be applied to the commonly connected input of each of the AND gates 196 through 199.
The second input to each of the AND gates 196 -199 is connected through conductors 203 - 206 to the con-ductors present in the sixteen (16) bit instruction word cable 32 and hence the bit conductors present in the common instruction word bus 20 associated with the four low order bits Bo - B3. Accordingly, whenever instructions read from the read only memory 80 are directed to the printer interface and contain the appropriate B bits for the production of the timing signal on conductor 102, such an instruction having a bit Bo at a ONE (1) level will cause a character strobe to be applied to the printer unit for a duration for approximately three-fourths of a microsecond (.75 us) while if bit Bl therein is at a high level a carriage strobe will be applied for a similar duration to `--` 1052!~
- the printer unit. Similarly, appropriate lnstructions having bits B2 or B3 therein at a high level will cause paper reed strobes or a restore printer signal to be applied to the printer unit to achieve the results described in connection with Figure 3. The character strobe, carriage strobe and paper ~eed strobe may be overlapped in duration / so long as a minimum separation o~ 400 microseconds exists bet~reen the leading edges Or the strobe pulses produced.
A carrlage strobe rollowed by a character strobe will cause - lO simultaneous motion of the carriage and daisy element print wheel, this ls a space between print operation; however, a character strobe followed by a carriage strobe will cause - ~he carriage motion to be de~erred by internal logic within the printer until the character is printed so that a con-ventional print before space operation is obtained. Thus, when instructions are issued ~rom the read only memory 80 - - and are directed to the printer interface by the appropriate condition Or bits Bl2- Bl5, an instruction having bit B8 negative and bit Bo positive will result in a character strobe, an instruction having bit B8 negative and bit Bl positive will result in a carriage strobe, an instruction - having bit B8 negatlve and B2 posltive will result in the - productlon o~ a paper ~eed strobe, ~hile an instruction having bit B8 low and bit B3 high ~ill result in a restore the prin1;er pulse input to the printer unit illustrated in Figure 3.
The remainin~ output to the printer unit as ~ . . . . . . .

present ~n the mult1co1nductor control and status cable 24 in ~igure 4 is annotated ribbon action and is connected . throu~h a conductor 207 to the output o~ A!~ID ~ate 200. As ` will be recalled ~rom the description of the logical operation o~ the prlnter unit set rorth in con~unction with Figure 3, - the ribbon actlon ~ontrol input is employed to drop the position of the carbon or cloth ribbon utilized in the printer unit to a position where such ribbon will not tend ' to obscure the operator's view of the print position when-.
ever a printing operation has temporarily terminated.
More particularly, i~ no character to be printed is applied .. to ~he printer unit within an interval Or five hundred t500) ! . milliseconds, it is desireable to drop the carbon or cloth ribbon so that the operator is in a position to completely : 15 examine ,the print position as such a pause in the presen-,. tation o~ character in~ormatlon to be printed may well ~ndicate a pause in the insertion o~ in~ormation at the ' keyboard and such a pause orten requires the operator's - detailed inspection Or the print position. A simplifled way of implementing this desireable ~unction, as shown in Figure 4, is to employ the character ready not input -- sign~l which is applied to the printer status multiple~ r - 150,-a simple ~C chargin~ circuit and the AND gate'200. The AND gate 200 may take the same ~orm as AND gates 196 - 199 alld hence acts in the conventional manner to provide a high level output whenever both Or ~he inputs thcreto are hi~h...
This high level output, as will be recalled ~rom the descrip tion o~ the printer unit descrlbed i.n conjunction ~Iith Figure 191 ~ ' -. ' . ' .

' ~ ~5'~9~1 - 3 will cause the cloth or carbon ribbon present in the printer to drop to its nonprint position due to the action of the ribbon lift logic 123 and the ribbon lift driver 124. A first input to AND gate 2Q0, as shown in Figure 4, is clamped to a positive potential level V+ through a conductor 208. Thus, one input to AND gate 200 is continuously maintained at a h'igh level. A second input to AND gate 200 is connected through conductor 209 to a junction formed between an inverter 210, a resistor 211 and a capacitor 212. The inverter 210 may take the conventional form of logic devices of this type and its input is connected, as indicated in Figure 4, to a character ready not input from the printer unit illustrated in Figure 3. The character ready not input is supplied to the printer interface as a status input through the control and status multiconductor cable 24 and is developed in the manner explained in conjunction with this input to the printer status multiplexer 150. The character ready status level produced by the printer unit, as will be recalled from the discussion of Figure 3, is produced whenever the printer unit is in a ready condition to accept new character infor-mation and is maintained at a high or ready level so long as the printer unit is not processing new character information in the print wheel logic 111. Therefore, it will be readily appreciated by those of ordinary skill in the art that the character ready not input connected to inverter 210 is high only when the printer unit is processing character ~05'~911 inrormation and at all other times resides at a low level.
The resistor 211 is connected to a positive potential level V~, as indicated in Figure 4, and is ~unctioned to the capacitor 212 in a manner to rorm a conventional RC timing circuit. The parameters Or the resistor 211 and the capacitor 212 are such that whenever the output of the inYer-/ ter 210 is highj the capacitor ~lill require approximately rive hundred (500) mil~seconds to charge through the ` resistor 211 ~rom the potential level indicated as V~.
Howe~er, as is well known to those Or ordinary skill in the art, whenever the output Or the inverter 210 is at a low le~rel, the conductor 209 will be clamped to this low level so that the capacitor 21~ is completely discharged. Thus, as will be apparent, the operation Or this simpllfied RC
timing clrcuit is such that whenever the character ready not input is high, the low level placed at the output Or the inverter 210 will discharge the capacitor 212 so that a ~ .
low level resides on conductor 209 whereupon the output o~
the AND gate 200 is low and the ribbon is maintained in a print position. However, when the character ready not input applled to inverter 210 is low, indicating that the ~;
printer unit is ready to accept new character inrormation, ` ~~ -~~ the output of the inverter 210 will be high. A high con-dition at; the output Or inverter 210 allows the capacitor 212 to charge through resistor 211. Ir the character ready not input; does not go hi~h within a~proxim~tely rive hundred (500) milliseconds~ the charge accumulated by the capacitor , ~ -- 193 -.. ' ' :

105'~9~

212 will, at the end of this interval, be sufficient to apply a high le~el to conductor 209 and hence, the second input to AND gate 200. Under these conditions, both inputs to AND gate 200 are high and the output of this AND gate will go high to cause the appropriate rlbbon action mentioned above. Although a highly simplified circuit for achieving the deslred ribbon action control input to the printer has been illustrated in Figure 4, it will be readily appreciated , by those of ordinary skill in the art that the ribbon action ; 1~ control circultry could -be implemented in nu~erous ways and should it be desired that further functions attach to the operation o~ this circuit, such further functlons could be readily added by the ~.odi ication of the simplified circuit shown to include ~urther lo~ic co~ponents. For instance, were it desired to cause ribbon action to occur whene~er a restore printer operation control input is applied to the printer, additional gates could be readlly added to the simplified ribbon action circuit illustrated to readily accomplish this funct~on. Thus, the simplified ribbon action-control circuit depicted in Figure 4 acts to discharge the capacitor 212 each time information ls supplied to the print wheel logic 111 while the time constant for the simplified RC charging circuit employed starts to run as soon as a character ready signal is provided from the printer interface logic 110.
Accordin~ly, i~ will be seen that the printer interface depicted in Figure 4 acts in response to sixteen . .

~105;~9~1 (16) bit instruction words received from the common instruction word bus 20 as coupled thereto through the sixteen (16) bit instruction word cable 32 to control, through the operation of the printer status multiplexer 150, the status indications supplied to the common status bus 21, so that whenever instructions are being issued to the printer the ROM address regist~er 81 in the microprocessor indicated by the dashed ~lock 16 is supplied on a demand basis with status qualifiers indicating whether or not a present printing position is a tab position, whether the printer unit is in a printer ready, character ready, carriage ready, or paper feed ready condition and whether a ten or twelve pitchcharacter font is presently being employed. In addition, through the operation of the interface output multiplexer 151, the printer interface acts to decode sixteen (16) bit instruction words from the read only memory 80 and upon demand supply information representative of the present position of the daisy wheel print element carriage, the standard left hand margin or the standard right hand margin to the common data bus 19. Furthermore, through the action of the various strobe and other contr~l outputs supplied thereby to the printer, eight (8) bit character information from t~e common data bus 19 is supplied to the printer so that appropriate action in response thereto may take place. The printer interface controls the initializing of the printer through the restore printer output and the position of the ribbon employed at the printer is controlled ... ~ . ~

- 105;~91i in a manner most desireable from the standpoint of operator convenience. Additionally, through the operation of the la~ch means 187 and the decodin~ and timing circuit therefor, pairs of data words representing displacement constants are transformed into single eleven (11) bit characters for appropriate application to the displacement inputs on the printer. Thus, it will be seen that through the action of the printer interface, the printer unit depicted in Figure 3 may be treated by t:he microprocessor indicated by the dashed block 16 an any peripheral to a data process-ing system.
THE KEYBOARD CO~FIGURATION
Figure 5 illustrates a kayboard configuration - suitable for incorporation into the embodiment of the automatic writing system illustrated in Figures 1 and 2.
The keyboard configuration shown in Figure 5 may take the form of a conventional electronic keyboard which includes forty-four (44) standard character keys as well as a plurality of added function keys which, as shall be seen below, are denominated mode keys, action keys and encoded ~unction keys. As such, the keyboard illustrated in Figure 5 may take any of the well known forms of electronic key-board arrangements conventionally available in the market-place such as those manufactured by Honeywell Incorporated or Keytronics Corporation. In essence, each of the standard character keys are capable of three functions, to wit; lower case, upper case and an encoded function. As 105'~911 each character is struck the keyboard provides the ei~ht (8) AaCII code associated with a given character and such eight (8) bit ASCII code will be inputted in a parallel format into the automatic writing syst~m according to the present invention through the eight (8) bit data cable 23 illustrated in Figure 2. ~Iore particularly, the keyboard configuration illustrated in Figure 5 comprises a standard k3yboard array indicated by the dashed block 219, a code key 220, a margin set lever 221, a tab clear and set lever 222, a single or double space lever 223, a font pitch set lever 224, a carriage position pointer 225, a margin release key 226, for~ard and reverse paper index keys 227 and 228, mode control Xeys indicated by the dashed blocks 229 and 230, action keys indicated by the dashed block 231 and 232 and a pair of thumbwheels 233.
THE STANDARD KEYBOARD A RAY
The standard Xeyboard array indicated by the dashed block 219 includes the majority of basic operational keys found in any typewriting system. Thus, the standard keyboard array enclosed within the dashed block 219 includes a 44 key array of standard alphanumeric .characters found on any conventional typewriter Xeyboard as well as a tab key, a shi~t lock key, a shift key, a carriage Xey and a back space key; each of which is also conventional in any electrical typewriter.
The forty-four (44) standard character keys located within the standard keyboard array indicated by the dashed block 219 are each capable of three functions.
These functions are lower case,-upper case, and an encoded ~ ~os~9~
unction. The lower case runction, as is conventional in any keyboard, is initiated merely by a depres~ion Or the ; key whereupon an eight (8) bit ASCII code assoclated with the lower case character Or that key is generated at the key~
board in the well-known manner and thereafter will be input-ed lnto the system. The upper case funct.ion i5 initiated, also in a manner which is conventional in any keyboard array, by the depre;~sion of that key with the shift or shirt lock keys in a down position. When these conditions obtain, the upper ~ase ~unction or where appropriate, the capital ' - letter associated with the letter i'mprlnted on the k'ey will - be represented by the eight (8) bit ASCll code generated at the keyb~ard. ~he depression o~ the'lert o'r rig~t hand '' shift key or the shi~t lock key~w111 cause an electronic 1~ . shi~t, in the well known manner, of the Iceyboard but no printer movement. ~s each character is struck, the upper case ei~ht (8) bit ASCII code associated l~ith each struck ' character is inputted into the system. Althou~h each of the 44 standard character keys within the s~andard keyboard array indicated by the dashed block 219 is capable of a - : thlrd or an encoded function, only those keys with an annotation printed on the aslant portions thereo~, such _ _as erase, re~, or the like, a~e utillzed with respect to the encoded function. The encoded function, like the upper case function, is ob'tained by a depresslon Or the character key with the code key 220 in a depressed state. The code key, ~ike ~he shift key though only operative in predetermined . .
~ ',' j .
- r `~

~OSZ~ll -~ modesJ will cause an electronic shift of the keyboard to ~` occur in such manner that as each character is struck, the encoded function eight (~) bit ASCII code associated with each struck character is inputted into the system~
Of the ~l~ standard character keys present within the standard keyboard array indicated by the dashed block 219, at least the underscore, hyphen, and x-keys are typamatic or repeatable alphanumeric keys in that when such keys are depressed and held depressed for more than five hundred milliseconds (500 ms), the eight (~) bit ASCII code ` associated with the character on the key struck will be repeatedly inputted to the system as long as such key is held depressed. The space bar, when depressed, will cause the carriage to advance forward, left to right, one character space for each depression. As is conventional in keyboards of this type the space bar is also repeatable and hence, if it is held depressed for more than five hundred milliseconds (500 ms), the daisy wheel print element carriage will continue to be advanced as long as the space bar remains in a depressed condition or until the right hand margin is -reached. I~hen the space bar is depressed together with the code key 220 during a record mode, a required space character will be inputted into the automatic writing system according to the instant invention. The shift key, right or left, when held depressed will cause an electronic shift of the key-board but no printer movement occurs. As each character is struck, the upper case eight (~) bit ASCII code associated - 199 _ 105Z91l with each character struck is inputted to the automatic writing system according to the present invention. The shift lock key mechanically locks the left hand shift key in the upper case position untll depressed again to release.
The carrier return key, when depressed, initiates a program which causes the daisy wheel print element carriage to move to the left hand margin or tab position established and the paper feed to execute the number of vertical index operations specified by t~e setting of the single j 10 or double spaced lever 223. T~hen depressed together with the code key during the record mode, a required carrier return will be encoded into the system. The function and utilization of required carrier returns and other encoded functions will be described in connection ~ith the operation of the overall automatic writing system accordinO to the present invention.
The tab key, when depressed, will cause the carriage to move from its present location to the ne~t tab position set to the right of the daisy wheel print element carriage provided the carriage is not at a right hand margin position. 1~1hen depressed to~ether with the code key in a record mode, a required tab will be provided to the automatic writing system according to the present invention.
As shall be seen below, all tabs set are stored in the auto-matic writing system according to the present invention and are implemented under program control in a play mode of operation. Thu " for instance, tabs set in the first line of a - 200 _ lOS~91i.
paragraph during recording are determinative of the left hand margin for that paragraph in a play mode and hence if it is desired that only a first line of a paragraph be in-dented the code key must also be employed The backspace key, when depressed, will cause the daisy wheel print element carriage to move in a reverse direction (right to left) one character space for each depression. Such cbaracter spacing is ascertained under program control and hence will be appropriate even if a tab was the last character recorded.
The key is preferably repeatable and hence when held for a greater interval than five hundred milliseconds (500 ms), the carriage will continue to move in a reverse direction for as long as the backspace key is in a depressed condition or until the left hand margin is reached. When depressed together with the code key 220, in a record mode, a required backspace will be inputted into the system. It should be here noted that in the record mode, the mere depression of the backspace key causes an erasure of previous infor-mation inputted into the system in a record mode while the depression of the backspace key together with the code key 220 merely causes the backspacing by one character position of the daisy wheel print element carriage for underlining operations and the like. The depression of a key to enable a function such as space, backspace or tab all generate a code which is analyzed and causes a branch to a program that defines what action is to be taken by the printer. Thus, the standard keyboard array indicated by the dashed block 219 provides the majority of the print function operational keys for the instant embodiment of the automatic writing system according to the present invention and are similar, as aforesaid, ~ .

105~91:1 to those generally found on any conventional typewriter keyboard so that an overall familiarity with the operation and use of these keys is assured.
The margin set lever 221 is employed to elec-tronically set the left and right hand margin positions.
The lever when placed in its up position, to left, will cause an eight (8) bit ASCII code representing the present position of the daisy wheel print element carriage to be stored in the microprocessor of the present embodiment of the instant invention and more particularly in a predeter-mined word location of the G register shown in Figure 2.
With the daisy print wheel element carriage repositioned for the right hand margin, the margin set lever 221 may be placed in its downward position to store the right hand margin information in the G register of the microprocessor indicated by the dashed block 16. Thus, when the margin set lever 221 is employed, the present position of the daisy wheel print element carriage, when the left and right margins were set will be loaded into appropriate positions in the G register and the standard margin settings hard wired to the printer interface will be ignored by the logic present in the system. Of course, when the margin set lever 221 is not utilized, the standard margin settings hard wired at the printer interface will be employed within the instant embodiment of the present invention. As will now be appreciated from the description of the printer unit and printer interface set forth above, information such as margin settings, tab settings and paper indexing settings ~05'~
must be electronically set into the system because the printer employs no mechanical cletents and hence, such information may not be permanently set there into. The tab clear and set lever 222 is employed to electronically set or clear tab locations. The actual setting of a tab or the clearing of the same is done in the conventional manner in that the daisy wheel print element carriage is appropriately displaced by the periodic depression of the space bar or the like until a desired tab location is obtained. There-after the tab is set by pressing the tab clear and set lever 222 in a downward position or cleared by pushing the tab set lever 222 in an upward position. The tab clear and set lever 222, when placed in the downward position will cause a one to be written into the tab register 149 at the printer interface illustrated in Figure 4 at a bit location corresponding to the present position of the daisy wheel print element carriage. The actual writing of the one bit into the tab register 149 is accomplished by an instruction read from the read only memory 80 onto the common instruction word bus 20 in response to data obtained from a setting of the tab clear and set lever 222 in the downward position.
Similarly, when the tab and clear lever 222 is placed in an upward position, a zero is inserted into the appropriate bit position within the tab register 149 to thereby clear the one previously stored therein. This is also accomplished by an instruction read from the read only memory 80 onto the common instruction word bus 20. More particularly, when-ever the tab c:Lear and set lever is raised or lowered a coded eight (8) bit character representative thereof is applied in parallel from the keyboard means to the common .
. ~ ~ , . .

~05'~9~1 data bus 19 and loaded into the main register M. There-after, the eight (8) bit character is processed in the ALU 84 where its nature is ascertained by a plurality of comparison operations. When a compare is obtained indicating that a tab set or clear operation is present, a low level is set by the ALU onto the branch conductor 106. This causes the read only memory address register 81 to go into a branch sequence wherein appropriate instructions are read from the read only memory 80 and applied to the sixteen (16) bit instruction word bus 20 to thereby cause a one or zero (set or clear) to be written into the appropriate bit location in the tab register 149 located at the printer interface illustrated in Figure 2. When the tab clear and set lever 222 is placed in the upward condition with the code key depressed all stored tabs will be cleared under program control. As will be appreciated by those of ordinary skill in the art, the registers which are employed to keep track of tab and margin settings will be cleared whenever the system is deenergized. ~ccordingly, tab and margin information is set onto the record media in a record mode of operation so that upon playback such tabs and margin information will be automatically set back into the system. Furthermore, as will be apparent to those of ordinary skill in the art, the actual writing of tabs in the tab register 149, as well as the insertion of left and right margin settings into the G register within the micro-processor indicated by the dashed block 16 may be accomplished by instructions read from the read only memory and applied to the common instruction word bus 20 in response to a mere tab set or tab clear or left margin set or right margin set indication from the keyboard, which ~)S'~911 indlcation is conveyed without an indlcation as to carriage position to the M register through the common data bus 19 because the tab register 149 and the carriage position counter 15? present within the printer inter~ace keep track o~ the present positlon o~ the daisy wheel print element carriage. There~ore, when tab set clear or margin set`
,lndications are provlded to the microprocessor within the dashed block 16, the actual position in~ormation associated with the point of carriage dlsplacement where that tab or margin is to be set is readily available ~rom the carriàge positioning monitoring circuitry present within the printer - interrace shown in Figure 4 and hence the keyboard need not provide tnis informatlon and no coupling from the printer ~o the keyboard is required to provide such in~ormation thereto. Thus, ln thls respect, the keyboard means acts to control the operation o~ the printer without current,infor-- mation regarding the present positlon Or what is being . .
' , controlled- ` ' `'" ' The single or double space lever 223 acts in the conventional manner to define whether sin~le or double spacing is to be employed in the document which is prlnted in response to data applied to the system at the keyboard or rrom the record .~edia. As the printer unit employed in ~he instant invention does not utilize mechanical detents to accomplish any of t,he runctions lndicated below, the setting o~ the single or double space lever 223, as shall be seen belo~Y, ls connectcd to a status input on the keyboard inter '~
-'. '' ~, ' ' ` '` i - 2n5 .

105;~91~ ` I
~ace illustrated in Figure 7. ~hus, wh~never p~per lndex~
in~ ls required, the mlcroprocessor will sample the settin~
the single or double space lever 223 and cause the paper to be lndexed ln a manner consonant with ~he status level associated with the single or double space lever 223. In the keyboard con~iguration illustrated in Figure 5~ the single or double space lever ls se~ in a ~ingle space condltlon when ~he lever is raised and set to a double space condition when the :lever is displaced to its lower .
10 - . position. S~milarly, the Pont pitch set lever 2~L! is employed to designate wnether a ten or tw~elve pitch dais.y - print element is mounted in the printer unit. This is . .
required because the nature of the pitch of the character font being employed will detèrmine the per character - 15` - r spacin~ required by ~he printer unit and hence, thè nature of thè character displacements read from the read only memory 80 and applied in the manner described above to the prlnter unit and more particularly, the carriage logic 117 ; therein through data lines DLl - DLll. The condition of the ront pitch set lever 224 ls applied directly to the printer status multiplexer 150 shown in Figure Ll whereupon ` either a ten pltch or twelve pitch status indication is ~~ applied to the common. status bus 21 whenever the micro-`processor indicated by the dashed bloclc 16 requires such information and provides an appronriate select and strobe input, in the manner descrlbed ln con~unction with Figure Ll, ~o the printer status multlplex~r 150. For the lever - . ~ : , . . I

105~9~
depicted in the exemplary keyboard configuratr)n shown in Figure 5, the down position represents a twelve (12) pitch setting or a zero input on the ten (10) pitch conductor connected to the printer status multiplexer 150 while an up setting indicates that a ten (10) pitch character font is in place and will, as described above, place a One (1) level on,the ten (10) pitch input to the printer status multi-plexer 150. The carriage position pointer 225 is mechanically coupled, in a manner not shown, to the daisy wheel print element present in the printer in such manner that as the daisy wheel print element in the printer is displaced from left to right or right to left, the carriage position pointer 225 is displaced therewith. As shown in Figure 5, a portion of the lceyboard housing associated with the carriage position pointer bears displacement gradua-tions in units which are appropriate fox both ten (10) and twel~Te (12) pitch character fonts. These graduations are in registration with the carriage position pointer 225 so that ~lhen the carriage is at its extreme left position the pointer reads zero on the graduations provided while when it is in its extreme right position a maximum scale reading is provided. In this manner, an operator is continuously al~praised of the position of the daisy wheel print element carriage in a manner similar to that utilized in conventio nal electric typewriters.
The margin release key 226 functions in the con-ventional manner so that when this key is depressed, it 105Z91l permits the operator to bypass a present margin. The condition of the margin release key 226 as will be seen in connection with the description of the keyboard interface set forth in conjunction with Figure 6 provides a status in-put to the keyboard interface which is selectively gated, under program control; to the common status bus 21. In this manner, when the microprocessor indicated by the dashed block 16 receives a print instruction from the keyboard, and samples the common status bus 21 to ascertain whether or not the margin has been reached, it may also sample the common status bus 21 in a subsequent interval to determine the condition of the margin release key 226 whereupon if this key is depressed, the margin setting is not honored. The paper index keys 227 and 228, when depressed, will cause the paper feed to execute a vertical index operation equal to one-half (1/2) of an inch or of a single line space.
Rey 227, as indicated by the arrow thereon is the forward index key and will cause the paper feed to index in the upward direction. Conversely, the key 228, as indicated, is the reverse index key and when depressed will cause the paper feed to vertically index in a downward direction.
Both paper index keys 227 and 228 are repeatable or typamatic and hence, if held for a greater interval than five hundred milliseconds (500 ms), the paper will continue the vertical indexing in the direction specified for as long ``` ` 105'~31 as the key remains depressed. ~hen t~e auto~atic stritin~
system accordin~ to the present invention is in a record .
mode, both forward index and reverse index codes will be recorded on the record media when the keys 227 and 228 associated with the generation thereo~ 2re de~ressed. This ensures that when the record ~edia is read durin~ ~lay~acX, the paper feed srill automatic211y execute each recorded vertical index operation be it in the forward o~ reverse direction. The forsYard index key 227 as ndicated thereon is utili~ed to de~i~nate an encod~d ~unction, indicated SCR thereon, as well as an index operation and hence, when the code key 220 is depressed, and the ~orward index key 227 is struck, the encoded ~unction associated there~ith, ~.e.,special carrier return, wlll be applied to the autom2tic ~ritinO system accordin~ to the present invention.
The function and purpose o~ the encoded lunctions e.m~loyed in the instænt embodiment o~ the subject invention will be described hereina.ter.
TH~ MOD~ CO~TR0~ ~YS
The mode control ~eys enclosed within ~he dashed blocks 229 and 230 include the record key annotated Rr C ~
the revise key annotated REV, the code print key, the mar~in control key a~notated MARG CO~ the duplicate key annotated DUP, the skip key 2nd the play key. Each of the mode control keys included with~n the dashed blocks 229 and 2~ speci.y a uniaue mode o, o?eration ~or the instant ~~ embodimeTst or the automatic s~riting system acco-ding to the present invention. Thus, one or more Or the ~ode control . . ~.. , . ~,._ -- 105Z~l~
keys are depressed, and thereafter, the operation Or the automatlc writlng system accord~ng to the instant lnvention may be initia~ed by an operator. As each Or ~he mode control keys speclfies one of the many modes of system operation, each Or these keys, although not described hereln, is preferably illuminated upon the depression thereof so that the mode o~ operation selected is plainly indicated at the keyboard. The record key, annotated REC is a 3cey ~lhich when depressed selects the record mode of operation. In 10~ h~s-mode, the read/write recor~ media station is actuated ~ - . - , - - . - . . . ................................. .
- and the record media is automa~ically searchèd ~or a ¦ -recordable area which, as shàlï be seen herèinafter; is - - . .
detected ~Ihen an end Or record character (EOR) is located~
An end o~ record character (EOR) is recorded on the record :. - .
media, as shall be seen hereinafter, each time the record mode is turned Orr. This enables previously recorded data - to be preserved while new data is added to the record media at a location not previously utilized or where data which is not to be retained is present. Ir a record media is loaded at the read only record media station, recording will automatically take place rrom the read only to the read~
write station in a manner brie~ly described above and set ~orth in detail hereina~ter. When ~he reaord key is de-pressed, an eight (8) bit code representative thereo~ is applied from the lceyboard means 1 to the common data bus 19 in a manner to be more rully explained in con~unction with ~he keyboard inter~ace illustrated ln Figure 7 and is loaded , -- ~10 --` i . , j .
~ ,.

.05~93 ~
-into the main re~ister M. Under program control, the eighc (8) bit character loaded into the main register M -s inspected in the arithmetic logic unit 84 and comparison operations are run to determine the specific nature of this s eight (8) bit character. More particularly, it is first determined that -the eight (8) hit character is a non-print character and thereafter the specific nature of the character as a record mode character is ascertained through various logical operations such as the comparison of this character with constants read from the read only memory 80. A branch operation is then signaled from the arithmetic lo~ic unit 84 through the branch conductor 106 to the ROM address register 81 whereupon a record mode of operation program sequence is initiated. This sequence is described in detail in the application directed to the microprocessor indicated by the dashed block 16; however, for the purposes of the instant application, it is sufficiellt to appreciate that once the record mode of operation is established, data in the form of alphanumeric character information entered from the keyboard will be recorded on the record media and printed while ~unction information, will be recorded where appropriate and may be selectively printed upon appropriate entry of code print information from the keyboard. The manner in which printing and recording on the record media of information entered from the keyboard takes place was outlined briefly above and shall be described in detail hereinafter. Similarly, if a record media was loaded at the read only station, -: ~
. ,~

lOS;~9~1 recording o~ alphanumeric character information therefrom takes place at the read/~Jrite station while the alphanumeric characters recorded are printed in the manner also brie~ly outlined above. Thus, the record key is depressed whenever it is desired to place the instant embodiment Or the auto-matic ~riting system in a ~ode of operation wherein data entered ~rom the keyboard o:r from the read only record media ls to be recorded at the read/urite station and simultaneously printed.
lD The revise Xey annotated REV in Fi~ure 5 is the key which when depressed selects the revise m`ode Or operat~on ~or the aut~ma~c writ~n~ sys,~em accordin~, to ~he present lnvention. Thls mode Or operation is utilized to make corrections on a pre-recorded record media loaded at the read/,write station in such manner that a line Or prerecorded inrormation is selectively played, edited and possibly merged with information from the keyboard and thereafter the revised line of in~ormatio~ is recorded back onto the record media at a location occupied by the original line o~ information. The various details of the revise mode Or operation shall be set ~orth in con~unction with the overall operation Or the instant embodiment o~ the automatic ~riting system according to the present lnvention; ' however, at this Juncture iri the description of the instant invention, it is suf~icient to appreciate that the revise mode of operation is utilized to correct a prerecorded record media whlle printing of alphanumeric character information attends such corrections. Basically, the revise mode of operation may be utilized when a ~, , ,, , ,, , ,, :

- .;

~05;~911 prerecorded record media is loaded at the read/write record media station. Essentially, as shall be seen below, each line of data recorded on a record media, which generally corresponds to a printed line of information on a document being preparel~, is recorded with fifty (50) character spaces which do not represent information and hence may be used for correction ~urposes. Therefore, if it is desired to correct a pre-recorded record media, so long as less than fifty (~0) characters are to be added within a given line of information, the single record medi~ for~ o~ reVise Qpe~atiQn ~ay be em~loyed. q~owe~e~, i-f extensive revisions are necessary, a multirecord media mode ol revision in the form of a transfer operation is utilized wherein information is selective~y read from a pre-recorded record media at the read only station and correction information is inserted from the keyboard. Both the information selectively read from the prerecorded record media and the information inserted at the keyboard are recorded at the read/write record station on a new record media so that the selective transfer and merging of information from the prerecorded record media are employed to create a new, corrected version of the material on a second record media. When the revise 105Z9~.1.
key is depressed an eight (8) bit character representative thereof is applied to the keyboard interface through the common data bus 19 and is loaded into the main register M. Thereafter, this character is inspected under program control in the arith-metic logic unit 84 until its nature is determined. Once the revise character has been thus identified, a branch indication is placed on the branch conductor 106 whereupon the ROM address register 81 is placed in a revise program sequence. It should be noted that once this sequence is initiated, information is read from a prerecorded record media, selectively transferred and printed and either re-inserted back onto the record media with corrections or selecti~vely skipped.
The encoded function information used in the present invention without exception represents, as shall be seen below, control instructions supplied to the microprocessor from the keyboard and hence, is not alphanumeric character information suitable for printing. Therefore, when an encoded function is entered by the depression of the code key 220 and one of the standard alphanumeric character keys for which an encoded function is supplied, the eight ~8) bit character read in response thereto is generally not printed. However, there are conditions when an operator is preparing a draft document where it would be convenient '-105Z9~l to have the presence of an encoded function in the order in which it was inserted indicated on the draft document being prepared so that such presence is apparent when the draft is reviewed or employed in the ]preparation of final copy.
For this reason the code print key is supplied. When the code print key is depressed, it will cause the printing of the alphanumeric character that is associated with the encoded function and an automat:ic overprinting of this character with a slash will folLow to indicate that an encoded function is present rather than the regular alpha-numeric character associated with the key depressed. For instance, were the link encoded function generated by a depression of the code key 220 and the zero alphanumeric key while the code print key was depressed, a Zero (0) with a slash therethrough would be printed on the document to indicate the presence of the encoded function. Thus, the code print key affords operator convenience by enabling selective printing of specialized character representations indicating that an encoded function has been inserted into the system at the point in the document where the encoded function appears. The following is a list of the slashed characters and the encoded functions which they represent:
CODE ENCODED FUNCTION KEY

Erase ERASE
Z Reference REF
Stop STOP
Reproducing Stop RSTOP
Switch Reader SW
~ Search SCH
~ Switch and Search SW/SCH
Single/Double Line Space L SPACE

lOSZ91~
, - CODE ENCODED ~UilCTION KEY
- ~ First Line Find FL FIND
0 Track Link LINK
~ Fornnat ~ORMAT
~ First Line Set ~L SET
E Page End PG END

, - .
I~ the code print key ls not depressed, the encoded runction -- - will be inserted into the automatic wrlting system in the same manner.as any other character inserted at t.he keyboard;
_ - however, no slashed character representation thereof will be printed. The record key, the revise key, and the code print - key comprise all of tne mode control keys disposed on the -` left hand portion o~ ~he keyboard and enclosed within the dashed block 229. - -~5 The mode control Iceys disposed on the right hand portion o~ the keyboard are enclosed within the dashed block 230 and comprise the margin control key annotated MARG CONT, ` - the duplicate key annotated DUP~ the sklp key and the play key. The play key, when struck, selects the play mode o~
operation In this mode o~ operation, data is read ~rom a record media and the alphanumeric character in~ormation contained in such data is printed by the prlnter unit in accordance with the ~unction and control information also presen~ thereon. Generally, a prerecorded record media is read at the read/write station, loaded into the read/only bu~fer and selectlvely applied on a per character basis ~rom the main register M through the common data bus 19 to the printer unit. However, when it is desired to selec~ively lOSZ9~1 read data from a prerecorded record media and print the same while a second record media is prepared, as in such cases where the selective readout of the record media is periodically interrupted for the insertion of material from the keyboard, the play key may be depressed with the record key. Under these conditions, a prerecorded record media will be read from the read only station and printed while a recording operation takes place at the read/write record media station. In addition, when only the play key is depressed, playback from the read only station may be obtained by the depression of the alternate reader key, as shall be described below. Under these conditions, readout occurs from a prerecorded record media loaded at the read only record media station in the same manner as playback is normally initiated from the read/write record media station.
Thus, it will be appreciated that the play key is depressed any time a mode of operation is desired wherein data which has been prerecorded on a record media is to be printed and hence, the active peripherals to be defined are one of the record media stations and the printer unit.
The skip key when depressed, will cause recorded data including any encoded funations to be read from a record media in the same manner that normally attends playback. How-ever, no printing from such recorded data or the performance of the encoded functions defined thereby occurs.
This key normally operates as an alternate to the play key . .

~OSZ91~

and is utilized in conjunction with the action keys, ie., auto, para, line, word and character/stop, which will be described below. In essence, the skip key is used to selectively omit portions of a prerecorded record media which are being played back. Therefore, playback occurs in the normal manner and when a portion of the material to be omitted is reached, the printing is stopped, the skip key is depressed and the action key or keys which best define`
the body of material to be omitted are depressed. T,~hen an indication that the body of material to be omitted has been read is received, the automatic writing system according to the present invention is re-establi~hed in the play mode by a depression of the play key which places it in a condition where normal playback is continued.
For example, let it be assumed that a multiparagraph document has been prerecorded on a record media and it is to be played back in an editing mode of operation wherein the second paragraph, the first two lines of the third paragraph and the first three words of the third line in such third paragraph are to be omitted. Under these con-ditions, the operator would normally play back, in a manner to be more fully described below, the first paragraph of the document from a prerecorded record media located at the read/write record media station in the normal play mode.
l~hen the first paragraph has been fully printed, the operator would depress the skip key and the paragraph action - 21~ -key whose function is more fully described below, ~hereupon the second paragraph would be s~ipped and hence, although the data and ~unction information on the record media associated w.th such second paragraph would be read rrom the record media, no printing in response thereto would occur.
Similarly, if a second~record media were being prepared, -the skipped material would not be recorded thereon. There-after, with the skip Xey still enabled, and the paragrapb action key in an up condition, the operator ~Yould depress the line action key twice to achieve appropriate skipping of the first two lines of the ~hird paragraph. ~lith the s~ip key still enabled, the word action key would then be depressed three consecutive times to achieve the skipping o~ the first three words o~ the third line in the third paragraph so that the editing results soecified above are achieved. The skip key would-then be depressed a second time to cause disabling Or the skip function ~hereupon normal playback could continue upon the striking o~ the pl2y key and the further depression o~ a selected one o~ the action keys as will be described above. Thus, the skip key enables an o~erational mode in the automatic wrlting system according to the instant invention wherein when the automatic writing system is conditioned ror playback in either the play or revise modes, material read from the 2~ record media will not result in ~rinting, or in the carrying out o~ functional instructions rcc~r~ed in the material portions thereo~ for which tne skip key has been depressed.

105Z9~l The duplicate key, annotated DUP, is a key which when depressed acts to cause a high speed transfer of data from a prerecorded record medla located at the read only record media station to a record media located at the read/write station. The data transfer occurs at a rate o~
approximately one thousand (1,000) characters per second and obviously, no printing takes place during such transfer.
Tne transfer operation whicn takes place in the duplicate mode Or operation initlated by the depression of this key may be accomplished in a selective manner by the utilization of the action keys which define speclfic groupings Or alphanumeric ma'erial within a block of data whic~ repre-sents a ?a~e of material on the recorded document. In addition, as shall be seen below, each block of data, which 1~ represents a given page of material, is coded on the record media so that such blocks or pages of material can be located through a search operation for selective playback.
Thus, the duplicate mode o~ operation initiated by the depression of this key may also be utilized in a selective manner so that only selected blocks of information are duplicated. Accordingly, the duplicate mode of operation may be utilized to duplicate an entire record media or selected portions thereof which are defined, as shall be more fully set forth below, on a per page basis and each page is ~urther defined to provlde selectivity in terms of the paragraphs, lines, words, and characters located on that page. In the duplicate mode of operation, which will be l~)SZ91~

further described below, data is read from a record media located at the read only station on a per line basis and - inserted into the read only buffer 36. Thereafter, such data is transferred on a per c~aracter basis to the read/
write buffer 35 and when a line of character information has been fully loaded into the reac3/write buffer the contents of the buffer are dumped onto the record media located at the read/write record media station. Each transfer, of course, takes place by the insertion of each character conveyed into the main register M and from the main register M to the destination peripheral. However, as the relatively slow operation of the printer unit, when compared to the operational speeds of the remaining portions of the automatic writing system, as aforesaid, are not a consideration in the duplicate mode of operation, this operation may occur at extremely rapid rates such as the thousand (1,000) character per second rate mentioned above. The duplicate mode key would ordinarily be utilized under conditions where it is desired to selectively transfer a given portion of a prerecorded record media to another record media which is to be maintained for recordkeeping purposes or subsequent utilization and under conditions where no printing or editing functions are desired.
The margin control key, annotated MARG CONT, when struck during a play or revise mode of operation, acts to automatically cause the right hand margin of the document being prepared to be adjusted to within a limited margin zone ~oszsi~
so that the right hand margin of a document prepared with this key depressed is extremely uniform. Normally, the automatic writing system accordling to the present invention employs a standard five (5) character zone in its margin control mode of operation; however, the zone may be selectively altered by the operator so that a zero to seven character zone may be selected. The margin zone may be defined as a zone which is bounded at the extreme right column position on a document by the right margin set at the margin control lever 221 and whose left most portion is defined by the width of the zone being utilized as measured from the extreme right hand portion thereof set by the depression of the left right margin control lever 221. Thus, if a standard five (5) character zone is being employed, the margin zone will terminate at the setting provided by the right hand margin established and will be initiated five (5) character positions to the left thereof. If consideration is given to the operation of a conventional typewriter, what is here being employed as the margin zone may be considered to correspond to the zone of columns of print positions in such normal typewriter between the location where the bell originally rings to apprise the operator that the margin is being approached and the point where the keyboard is locked and no further typing is permitted until the margin release key is depressed. In conventional typewriter apparatus, this zone is generally s~even (7) characters wide, however, in order that more uniform margins be provided in the margin control mode of operation, a five (5) character zone is hard wired into iO5Z9~l the automatic writing system according to the present invention and the operator is provided with the capability to selectively vary the width of this zone between seven (7) and zero (0) character positions so that conventional or extremely tight right hand margins can be obtained in the finalized documents prepared.
Although the logic operation of the automatic writing system according to the present invention in the margin control mode of operation will be further described below, the manner in which the margin control mode of operation is achieved in the instant invention should be appreciated. For the purposes of understanding the manner in which margin control operates in the instant invention, consideration should be given to the format of a general document being prepared and this format should be considered to comprise two essential portions. One such essential portion is outside the margin zone and may be defined as ~he portion of such document between the extreme left hand margin and the beginning of the margin zone or the point which would correspond to the bell point in a conventional type-writer. The second portion of the document which must be considered is the margin zone portion thereof and should be viewed as comprising the number of column positions selected for the margin zone between what corresponds to the bell point in a conventional typewriter and the right hand margin.
In the margin control mode of operation, certain characters which occur in the normal printing of a document are treated ~05291~
differently depending upon whether they occur in the portion of the document external to the margin zone or in the margin zone per se. For instance, a carriage return normally occurs at the end of a line being printed; however, in the reorganization of material which generally attends an editing operation wherein a draft format is modiied in its evolution towards final copy, carriage return characters may sometimes end up being read from the record media at a portion of the line being printed intermediate the left and right margins set. If the carrier return occurs in the margin zone as defined above, it should obviously be treated as a carriage return so that the carriage of the printer is returned to the left hand margin and the paper incremented so that the printing of a new line may begin. However, if the carrier return appears outside the margin zone, it should be ignored and a space substituted therefore so that the resulting document to be printed does not manifest an extremely ragged right hand margin. Thus, in the margin control mode of operation carriage return characters read from the record media which occur when the daisy wheel print element carriage of the printer is in the margin zone are honored while carriage return characters read when the daisy wheel print element carriage is not in such margin zone are disregarded and a space character substituted therefor.
Similarly, hyphens which are employed to break the syllables of a word between lines of printing on a document should be honored when they appear in the margin zone and . .
. . . .

lOSZ~ll followed by a carriage return; however, when the reordering of the material printed on a document is such that a hyphen of the type mentioned above occurs in the middle of a line, the hyphen and following carriage return should be completely ignored so that the syllables of a word are printed without an intervening space or other punctuation. In addition, there are cases where the hyphen is used as a normal part of the textual material being printed and in these cases, the hyphen must be printed regardless of the position at which it appears in the textual material being printed.
Thus, for terms such as mother-in-law or other instances where a hyphen is properly a part of the textual material, the hyphen must always be honored. Hyphens which are to be honored in any event, or are mandatory are here referred to as coded or precedented hyphens and are inserted by depressing the code key 220 and the hyphen key so that a different eight bit character code is associated therewith from that representing a hyphen which results from the mere depression of the standard key having the hyphen thereon.
In margin control, coded hyphens will always be printed as a hyphen regardless of where they appear in the textual material which is being edited. Hyphens which are not coded however, will only be honored when they appear in the margin zone and hence, will be followed by a carriage return operation. Conversely, when uncoded hyphens are read in non-margin zone portions of the textual material being printed, they will be disregarded so that a non-hyphenated ~05Z91~
version of the word will properly appear in the intermediate portions of a line. In addition to the hyphen, there are a plurality of other characters such as space, carriage return, tab and the like which,, as shall be pointed out hereinafter, may have specialized funtions which attach thereto and hence must be distinguished for margin control purposes as to appearances in t:he textual material which do not designate such special functions. For example, there will be instances in the preparation for revision of a document where the daisy wheel print element on the printer is in an extreme right hand position and must be returned to the left hand margin in order that printing may continue.
However, due to material which is to be deleted in the line or additions to the line which are to be subsequently added, it may be necessary to physically return the daisy wheel print element carriage at the printer while not desiring that a carriage return character be recorded which causes the contents of the read/write buffer to be recorded on the record media. For this purpose, the code key 220 is depressed with the special carriage return encoded function key 227 which acts when utilized to physically return the daisy wheel print element carriage and will cause a normal carriage return when the same is played back; however, the contents of the buffer are not recorded in response thereto.
This specialized carriage return, like the specialized function of the hypen is obtained by striking the appropriate key on the keyboard with the code key 220 depressed and results in a specialized ~:. , . - . . .

~OSZ9~ ~
., function. Many of such specialized functions are employed ; by the instant invention and will be described in detail below in conjunction with a discussion of the encoded functions associated with the standard keyboard enclosed within the dashed block 219.
In a margin control operation, there are a plurality of instances where a character must receive specialized treatment and hence, must be distinguished for margin control purposes between appearances in the textual material where they serve merely as line terminating or line initiating characters and other cases where such characters must be printed in a regularized form regardless of the point in the textual material where they appear. For instance, while a carriage return normally acts to return the carriage at the end of a line and hence should be transformed into a mere space character at any point where the revision of the material on the document causes such carriage return character to occur in non-margin zone portions of the document; a pair of carriage return characters or a carriage return character followed by a tab character which in this case is coded, depending upon whether a blocked or indented format is being utilized, would ordinarily designate a new paragraph and accordingly, the initial carriage return in such designation may not be treated as a space regardless of the point in the margin zone or non-margin zone portions of the line in which they occur. In addition such carriage return and tab characters may be rendered mandatory by the depression of the code key 220 in the same manner described for a coded hyphen so that they are always honored during 105'~9~ .
a margln control mode of operation. These functions, as well as a plurality of addltional margin control functions are carried out under program control by the microprocessor indicated by the dashed block 16 and, as shall be seen below~
the unique capability of the data processing techniques employed herein enable the microprocèssor indicated by the dashed block 16 to perform various look ahead functions so that decisions for margin control and other purposes need not be based solely on a glven data character being .
presented but may be based on the data character which is presented as well as those which subsequently follow the character then presented for printlng. Thus, in the example given above, when the automatic writing system according to the present invention is in a play as well as a margin control mode of operation~ as designated at the ~eyboard depicted in Figure 5, a single carriage return character which appears in the margin zone wlll be treated as a carriage return while such single carriage return character appearing in non-margin zone portions of the document will be treated as a space character. Ho~Jever, regardless of where the carriage return character appears,i~ it is followed by a second carriage return character or a pre-cedented tab character, it will be properly honored as designating a new paragraph,lndentation, or the like. Similarly~
thls look ahead feature enables margin control operations ~lithin the instant automatic writing system to achieve the pre-paration of clocuments in ~inal ~orm which have extremely uniform and orderly margins rather tnan the ragged margin appearance which normally attends the margin control ~05;~9~1 operations present in conventional automatic typewriter apparatus. For instance, as stated above, the automatic writing system according to the instant invention has a standard five character margin zone as measured five characters to the left of the right hand margin set. In addition, the operator may selectively change the margin zone from a zero to seven character width by depressing the margin control key, holding the code key 220 depressed and entering a one digit numeral from the standard alpha-numeric character keys enclosed within the dashed block 219.
This will change the width of the margin zone from the standard five character width to a character width consonant with the single digit character entered from the keyboard.
Furthermore, it should be noted that as the margin zone is defined as a given number of characters from the setting of the right hand margin, there is no need for the document to be printed from record media to be played back with the same right hand margin setting utilized when recording took place. Thus, the margin control mode of operation may be employed to not only provide the finalized document to be prepared with an extremely uniform right hand margin, but such right hand margin may be substantially changed from that utilized in the preparation of the draft document. In any event the look ahead features available in the present invention allows a mode of margin control wherein once the margin zone is detected, the microprocessor acting under program control, acts to review the characters to be :

10~91~
; subsequently presented wi~hin the margin zone. I~ suchreview indicates that a space, non-precedented hyphen, or carriage return is to occur within ~lve characters of the start o~ the right margin zone, or any other character width set these characters are automa~ically printed and the daisy wheel print element carriage is returned at the occurrence of the non-precedented hyphen, space character or carriage return character as each of these eight (8) bit characters are treated as if they were carrlage return characbers when.they ~-ppear within the margin ~one in a margin control mode Or operation. Conversely, to the le~t ~ o~ the mar~in zone non-orecedented hyphens and carria~e returns are treated merelY as s~aces so that no carria~e return operation occurs.
I~, however, the logic within the microprocessor indlcated by the dashed block 16, does not detect a non-precedented hyphen, space or carrlage return character within five characters o~ the ~nitial portion of the margin zone, but instead, the review conducted of the characters to be presented indicates that only alphanumeric characters are present, which obviously indicates that a long word will be continued through the margin zone, the margin end zone mode o~ operation is immediately inltiated. Under these conditions, the automatic writing system according to the present invention, actlng under program control, will cause the printing function to stop &nd the system will be con-- , , . . ~. . .
.. . ..

105Z9~
ditioned for slngle character advance upon the depresslon o~ an appropriate action key. Thus, printing will advance on a per character basls and cause one character to be printed each time the approprlate action key is depressed.
This gi~es the operator the full width Or the margin zone selected to make an appropriate determination as to where to hyphenate the word being processed. Accordingly, as the operator's decision as to ~here to insert a hyphen and return the carriage does not awalt the end Or the margin 1~ zone, extremely tlgn~ rignt hand margins are availabIe in this mode of control and result in documents having extremel~ uni~or~ right hand marglns.
These runc~ions o~ the mar~in co~t~l mode o~
operation as well as a plurality Or addltlonal margin control runctions which will be descr~bed in detail when the various modes of operation of the invention are set rorth~
are carrled out under program control by the microprocessor indicated by the dashed block 16. More particularly, when a mode Or operation is utilized in whlch the record media is read and the margin control key is depressed, each eight (8) bit character loaded into the main register M for subsequent application to the printer unit ~rom a burrer unit associated with the active reader, ls processed under a playback program which rirst ascertalns whether or not the margin control mode key has been activated. I~ the margln control mode key has been activated by the depression there-o~, each character loaded into the main register M is ~0529~1 evaluated by insertion into the arithmetic logic unit 84 under margin control instructions issued by the read only ; memory 80. In brief, if the daisy wheel print element carriage position register 152 r as present in the printer interface shown in Figure 4, indicates that the daisy wheel print element carriage is not in the margin zone, pre-cedented carriage returns, precedented hyphens and the like will be honored as will be space characters, a pair of carriage return characters or a carriage return character followed by a coded tab. However, outside of the margin zone, hyphens will be skipped, carriage returns will be treated as spaces, and a punctuation mark, such as a question mark, an exclamation point, a colon, or a period followed by a carriage return will be treated as that punctuation mark followed by two spaces, provided that this sequence is initiated and is completed prior to the margin zone. A
space character followed by a carriage retu~n will be treated as a space character and tab characters other than those which appear in a first line of a page will be skipped unless coded.
In the margin zone, as measured five or another selected number of characters from the right hand margin set, pre-cedented hyphens, precedented carriage returns and preceden-ted space characters will be honored as will the carriage returns, hyphens, a pair of carriage returns followed by a tab, and a pair of carriage returns followed by a pair of space characters. Here, however, space characters, tabs, a carriage return followed by a tab, one or more space .

lOS;~91~

characters followed by a carriage return or one or more space characters followed by a plurality of carriage returns will all be treated, by the microprocessor indicated by the dashed block 16 as carriage returns. Thus, the margin con-trol mode key acts to enable the operator to provide a final document with a uniform right hand margin regardless of the margins employed in the preparation of the draft document and/or the uniformity thereof. Furthermore, as now will be appreciated, when the daisy wheel print element carriage first initiates entry into the defined margin zone, if none of the characters for which automatic carriage return operates is present within the full width of the zone as ascertained by a review of the characters to be printed, conducted in the microprocessor under program control, the automatic writing system according to the instant invention automatically enters a per character printing mode wherein the operator must depress an action key to obtain the printing of each character. This means, that the operator is given the option at the entry of the margin zone selected as to where to hyphenate the word being played out provided such word will not automatically actuate a carriage return in the margin zone. Thus, uniformity of margins is enhanced by this look ahead technique because a decision by the operator as to where and when to hyphenate may be made within the available character spaces in the margin zone and need not be made at the end of the zone as defined by the right hand margin set.
THE ACTION KEY~
The action keys indicated by the dashed blocks 231 .. ...

:;
~QSA:91 and 232 comprise the record media control keys enclosed ` within the dashed block 231 and the printer action keys enclosed within the dashed block 232. The record media control keys enclosed within the dashed block 231 comprise the alternate reader key annotated ALT RDR and the search key. As will be recalled from the preceding portions of this disclosure, the instant embodiment of the automatic writing system employs two record media stations which have been designated as a read only station and a read/
write station. Furthermore, it will be recalled that when automatic playback is initiated by the depression of the play key and appropriate acton key, information from the read/write record media station is read and utilized to initiate the operation of the printer The alternate reader key when depressed during the play mode will cause the reading of information from the record media to be switched from the read/write record media station to the read only record media station so that the input peripheral to the instant embodiment of the automatic writing system according to the present invention may be selectively switched from one record media station to the other. When the alternate reader key is depressed, the active station read indicator, i.e., the digital counter located next to the cassette transport in Figure 1, associated with the selected record media station will light when the selected reader is activated.
A subsequent depression of the alternate reader key will cause the reading to be returned to the read/write station.

~ ~S2g~1 Accordingly, the alternate reacler key acts to switch the record media being read from the read/write station, which is automatically selected when a play mode of operation is initiated to the read only station while a secona depression of this key acts to return playback to the read/write station. The search key, when depressed during the record or play modes of operation will actuate the active record media transport and automatically search the record media for a block address which corresponds to the particular block address set into the thumbwheels 233. If employed in conjunction with the alternate reader key, the search conducted may take place at the read only station. As was developed previously, character information to be recorded is loaded into the read/write buffer until a full line of information, which may comprise up to two hundred fifty-six (256) eight (8) bit characters is contained therein.
Thereafter, the read/write record media station is energized, the record media brought to speed, and the entire contents of the read/write buffer recorded thereon so that a full line of character information is recorded each time the record media station is energized and subsequently stopped.
In addition, as will be more fully explained below, a group of lines, paragraphs and the like may be arbitrarily designated as blocks and marked in a unique manner so that a search may be initiated therefor. Normally, block markings are utilized to code individual pages of documents being prepared and hence, it is ordinary operating procedure 105i~9il ~o insert a new block number on the record media each time a page Or a document being recorded ls terminated. In this manner, automatic playout on a per pa~e basis can be initiated and automatically terminated at the end Or a given block so as to coinclde wil;h a requirement at a printer that a new sheet Or paper be lnserted. In any event, numerical codes are entered at the ke!yboard, in a manner to be described below and recorded in a specialized manner~ also described hereinafter, prior to the recordation Or character ~O- in~ormation ass-oclated wi~h 2 page to be printed. There~o~e, when a given page Or material is sought, the block ~ designation or number associated ~ith that page is set at the thu~.bwheels 233 ~nd the seanch key is depressed. ~his will initiate, under program control, a search o~ the record media at the active record media station ~nd when the search is completed, it will be indicated by a coincldence in the numerical value set at the thumbwheels 233 and the digital counter associated wlth the cassettes at the read only and read/write record media transport stations. The digital counter located at the read only and read/wrlte record media station, as also will be brought out more rully below, also pro~ides a numerlcal indicatlon as to the last block code read ~rom the record media loaded at that station and hence when the settin~ Or the digital display and the thumbwheels 233 coincid~e, a successful search operation for a designated block Or material has been completed.
A:Lthough the manner in which a search operation ~SZ9i~
is accompllshed shall be described in detall below, a brief description thereof will now be set forth to acquaint the reader with the nature o~ the operation associated therewith. Placing initial ~ocus on the nature by which material is recorded on a record media, it will be appreciated that each line of materlal dumped onto the record media ~rom one of the bu~ers ls inltiated and terminated by a short lnterrecord gap associated wlth the startin~ and stopplng o~ the tape prlor and subsequent to recordlng.
lhen a block of materl~l ls to be placed on ~he record medi~, the interrecord gap assoclated wlth a blsck ls made sub-stan~ially 'l~nge~'than that ~ntermediate the recordin~ OL~
lines a'nd a di~ital code representing the number of the block, as well as certain other lnformation to be described below, ls recorded at the end o~ the block gap and prior to the start o~ any character inrormation. Therefore, when a search operation ls initiated, the character ln~ormatlon representative of the bloc~ designated at the thumbwheel - and representing the block to be searched is subtracted ' from the value of the block at whlch the record medlum is presently positioned as lndlcated at the dlgltal counter 11 or 12 tFigure 1) associated with the active record medla '' station. The subtractlon takes place ln the arlthmetic logic unit 84 and results ln elther a posltlve or negative value which represents in magnitude the number o~ blocks through which the record media must be displaced whlle the posltive or negatlve sign assoclated wlth this value represents the 1~5'~911 direction ~nrough which ~he displacement is to occur. Lhe direction information, as thereby obtained, ls utili~ed to drive the record media at a high search speed,i.e., approxi-~ately 70 inches per second (70 ips) in the clockwise o~ counter clockwise direction as indicated by the sign obtained from a comparison of the block address set at the thumbwheels 233 and that initially present at the digital display 11 or 12 (Fig. l)of the active record medi2 transport station. ~he magnitude of the coun~ obtained from the comparison of the block address set at the-thumbwheels 233 and ~ha~ initially present in the digital display 11 or 12 for the active read~r is 3tore~ in the ~ re~ister ~i~h~n ~he _~neral purpose re~istèrs indi`cated by bloc!~ 83, as afbresaid. As thè
record medi~ is displaced in the direction indicated by the sign in~ormation from the comparison, an analysis is con-ducted in the arithmetic logic unit 84 and the main register M to detect gaps on the record media whose length is sufficient to indicate that they are interrecord gaps associated with block information rather than those associated with the plurality of lines present within each block. This may be readily accomplished, as shall be des-cribed below, by enabling the read head located at the active record media transport and conducting an analysis at the arithmetic logic unit 84 and the main register M
which seeks to ascertain the absence of transitions on the record media ~or a given interval of time.
As the gaps associated with block information are - . .. .

~05Z91l approximately nine inches in length while the interrecord gaps required for starting and stopping the record media intermediate individual lines within a block are generally only approximately 2 1/2 inches in length, a substantially longer period without the transitions normally associated with one and zero information dligitally recorded on the record media in response to character information may be readily detected by the read head which is energized. Each time an absence of transitions occurs for an appropriate interval, the analysis being conducted under program control utilizes such absence of transitions for a pre-determined interval to determine that a block is present.
Accordingly, the count in the G register is decremented while the digital display associated with the active reader is incremented or decremented depending upon the direction in which the search is taking place. When a sufficient number of gaps indicative of block information have been detected to decrement to zero the count in the G register and to cause the digital display at the active reader to be equal in numerical value to the value set~at the thumb-wheels 233, the automatic writing system according to the instant invention is placed under program control, in a normal read mode. This read mode, as shall be seen here-inafter causes the record media to be read at approximately twenty inches per second (20 ips) in a direction wherein the record media is moving with respect to the record head from left to right. In this mode, the block information ~05'~9~1 actually recorded at the end of the interrecord gap associated with a block is actually read and the numerical value thereof is placed in the read/write buffer and sub-sequently into the main register M for analysis. The character representing the block information as thus inserted into the main register M is then inserted into the arith-metic logic unit 84 where it is compared with the thumb-wheel settings which have been loaded into the G register present in the block annotated general purpose registers 83.
If an appropriate comparison is obtained no further searching takes place; however, if an appropriate comparison does not take place, further searching is accomplished in the previously described manner. When the search has been appropriately completed, the setting of the thumbwheels 233 and the setting of the digital display for the active record media station will coincide whereupon any desired operation may take place as the record media is located at the desired position as set at the thumbwheels 233.
Accordingly, it will thus be seen that the search key located at the keyboard depicted in Figure 5 gives the operator the facility to cause one of two record media, which may be utilized in the instant embodiment of the present invention, to be searched and cause a record media to be positioned at the desired block of information re-quested. Although such block indications are ordinarily utilized to designate pages within a document being prepared, it shall be ap]parent as this disclosure proceeds that such 105'~91~
block settings may be utilized to designate any given groupings of material within a document under preparation and hence any time any particular portion of a record medium is desired for playback, duplication, or any other purpose it may be rapidly accessed by an operator.
The printer action keys enclosed within the dashed block 232 comprise the character/stop key annotated CHAR STOP, the word key, the line key, the paragraph key annotated PARA, the automatic key, annotated AUTO and the line correct key annotated LINE CORR. The line correct key is operative during a revise or record mode to allow correction of a recorded line of information. All of the re-maining action keys enclosed within the dashed block 232 will cause the actions specified thereby to occur when the automatic writing system according to the prensent invention is in a play, skip or duplicate mode, whether or not associated with a revise or record operation, and it should be appreciated at the outset that the action keys included within the dashed block 232 cause the specific action associated therewith to occur upon the depression of the key assuming that the automatic writing system is otherwise appropriately conditioned. The character/key, when depressed, when the automatic writing system is in a play, revise, skip or duplicate mode of operation will immediately stop the respective operationO Each subsequent depression of this key will cause a single character to be played back and either printed, skipped, or duplicated depending upon the mode key which is then depressed at the keyboard. As will be appreciated from the various modes of operation of the instant embodiment of the automatic writing system des-.: .- ~ ~ . . . ..
.

~0~ 9~1 cribed above, whenever a record medla is read, as takes place for all modes of operation other than that initlated by the depression of the record ~REC) key, a line o~
; characters representing a ~ull line o~ information on a document is read rrom a record media located at either the read only or read/write record station depending upon whether one or both Or said record media stations are active ~or the operatlon then in process. The line Or inrormation thus read is then loaded into the read only bu~fer through the main register M ror subsequent insertion on a per character basis into the main register M for application to a destination peripheral. Each character thus appl~ed rrom the read only bu~fer to the main register M is an eight (8) bit character and each represents either }5 an alphanumeric character or functional lnformation. The main register M upon receipt of each character loaded, proceeds to classify the eight (8) bit character, through the previously mentioned comparison operations performed at the arithmetic logic unit 84, as to whether it is an alphanumeric character appropriate for printing or a non-prlnt character. Ir it ls ascertained that a non-print character is present, this character will be utilized to condition the automatic writlng system to perform the runctions speci~ied thsreby such as by causing a branch operation at the ROM address regls~er 81. However, ir a print character is present, the eight (8) bit character classiried would ordinarily be forwarded to the printer, 105'~:911 assuming a print operation is inYolved, t.o thereby cause the actuation of the printer and the p~inting Or the alphanumeric character designated thereby. When the characterfstop key is depressed, a stop flag, as shall be seen below, is set at the keyDoard interface 26 while an eight (8) bit character representing the depression of the character~stop key is applied through the keyboard interface 26, the common data bus 19 and the arithmetlc logic unit 84 to the main register M. The eight (8) bit character representing the depression Or the character/stop key is then read rrom the main register ~ and applled to the G register within the general purpose registers 83 wherein it is employed to set a bit location lndicative that the stop key has been depressed. Depending upon the operation then in process, the stop flag, when gated onto the common status bus 21 in one of tne rrequent sampling operations of the keyboard interface 26 by the instructions ~rom the read only memory 80, will cause, as will be described below, a branch operation to take place at the read only memory address register 8~ through a comparison of bit B10 in the preceding instruction read rrom the read only memory 80 with the condition Or the status bus 21. This branch operation will generally cause the processing operations being carrled out in the microprocessor enclosed within the dashed block 16 to stop either immediately or at an appropria'e point within the branch operation which has been lnitlated. or course, as will be appreciated by those Or ordinary skill in the art, . - 243 -.
... .

~05Z91l ~he proFra3min~ sequence being carried out by the RO.~I
address register 81 must StoD at a point in a program sequence ~lhere reinitiation of the program then ~n process is convenient and accordingly, whether or not the one tl) bit set on the common status bus 21 causes a branch operation.wherein the program sequence is immediately stopped or stopped upon the completion of several additlonal program steps depends upon the nature o~ the branch instruction deflned.
` I~ the branch caused by the high level on the common status bus 21 alwa~s acted to cause the sequencing by the ROM address register 81 to stop, it ~ould be unnec-essary to set a bit location in the G register indicative that the character/stop key had been depressed as the high level on the common status bus 21 in response to the stop ~lag set upon the depression o~ the character/stop key would be sufficient. However, as shall be fully appreciated in connection with the discussion of the struc~
ture of the keyboard inter~ace 26, depicted in Figure 7, whenever a stop flag is applied to the common status bus 21, the ~lip flop which was set is reset and accordingly once the status indication is applied to the ROM address register 81 it no longer resides on the common status bus. Therefore, for cases where the branch routine initiated at the RO~
address.register 81 causes an operation where the automatic writing system according to the instant invention is sub-sequently sto~pedl the stop bit must be set in the G
re~ister so that when such register is subsequently inspected . - 244 -,, . . ~ . .

~ lOSZ9~i .
when a convenient stop position ls reached, an indication will be available to the automatic writin~ system that the character~stop key was depressed e~en after the stop flag has been removed from the common status bus 21.
In effect, when the character/stop key is depressed, the ROM address register 81 goes lnto a branch routine which causes the read only memory 80 to supply instructions on the common instruction word bus 20 whlch causes the automatic writing system according to the present invention to process one character and stop. Thus, as each eight (8) bit character loaded into the main register M from the read only buffer 36 represents either an alphanumeric or function character, each eight t8) bit ~haracter so loaded will be processed and then the auto-matic writing system goes into an idle sequence awaiting the next depression of an actlon key. Ir-the character/stop key is again depressed, the next character present in the read only buffer 36 is loaded into the main register M
under pro~ram control and applied to the destination peripheral de~ned by the operatlonal mode of the automatic writing system as indicated by one of the mode keys enclosed within the dashed block 230. For instance, if the play key is depressed, each depression of the character/stop action key will result in one character which may compri-se either an eiFht (8) bit character representing alphanumeric in~ormation such as a letter or an eignt (8) bit charac~e~
representing a function being applied to the printer and the ~05Z91 appropriate program routines to cause the printer to appropriately respond thereto are supplied through the prin-ter interface 27 so that if the eight (8) bit character loaded represents a letter, the letter will be printed, the daisy wheel print element carriage will be displaced and any other appropriate action in response to the characters supplied from the main register M will be carried out.
After this occurs, the automatic writing system and more particularly the microprocessor indicated by the dashed block 16 will go into an idle loop awaiting the occurrence of a next event at the keyboard which generally would take the form of another depression of an action key. If the character/stop key is again depressed, a character will be again loaded from the read only buffer 36 into the main register M and supplied to the destination peripheral which in this case takes the form of the printer means 2. It should be appreciated however, that the play mode is merely exemplary, for instance, if the skip mode key was depressed, each depression of the character/stop key would result in a character being loaded into the main register M and subsequently processed according to the skip mode of operation where instead of being conveyed to the printer for printing this character is not further applied to a destination peripheral so that it is effectively skipped or edited out of the document then in preparation. Further-more, should the duplicate mode key be depressed rather than the play mode, each character loaded into the main register M

~LOS'~9~
upon the depression of the character/stop key will result in the loading Or the character into the read/write buffer 3~, however~ no printing occurs and this operation takes place at the 1,000 character per second data processin~ rate available ~Yhen the printer :ls not e~?loyed.
. Thus, as will be appreciated by those of ordinary skill in the art, the character/stop ~ey provides two distlnct functions ln the instant embodiment of the auto-matic writlng system according to the present invention.
The first function ls to provide the operator wlth the capability to l~.medlately stop the automatic writlng system according to the present inventlon so that the mode of operatlon then in progress may be altered, a mistake encoun-tered during playback or the like may be corrected by changing the mode of operation ~rom play to revise the -operation can be stopped to enable the operator to temporarily leave the environment of the automatic writing system or to enable the operator to correct or modify the substance of the document.then under automatic prepara-tion by one of the multitude of editing features available ln the instant inventlon. The second functlon of the character/st;op key and that which is generally associated wlth the remainder of the action keys enclosed withln the dashed block 232 ls to enable the selective editlng of documents under preparation. It was seen that each eight (8) bit ch~r2cter loaded into the main register ~l was forwarded to the appropriate peripheral defined by the mode ~05291~

control key then depressed, fully processed and then the operation of the automatic writing system was stopped pending further actions by the operator at the keyboard. As each eight (8) bit character so processed represents an alphanumeric character or a function character, it will be appreciated that the utilization of the character/stop key readily admits of a wide ambit of editing functions. For instance, if it is assumed that the automatic writing system is in a play mode, wherein a document previously recorded on a record media is being prepared at the printer means 2, the use of the character/stop key in an editing function may be readily appreciated. Thus, if it is assumed that a line of information is being played out and the operator notes from the draft materials available from the recording operations that the first word in a given line is misspelled, the character/stop key would be employed with the remaining editing features of the present invention to correct such misspelling. For instance, if the first word having an error contains a wrong letter, the operator would maintain the automatic writing system in the play mode and depress the character/stop key until the letter just prior to the improper letter has been printed. Thereafter, the skip key would be depressed, and the character/stop would again be depressed so that the improper letter is skipped. Sub-sequently, the proper letter could be entered from the key-board and then the automatic playback could continue. For example, if the erroneous word appeared as "wodds" while the 105Z9tll appropriata word was "words", the operator would maintain the play key in a depressed condition and depress the character/stop key twice so that the letters w and o were played out and printed. Then t:he operator would depress the skip key and again depress the character/stop action key so that the letter d was s]cipped. ~le operator then would place the play key in the. up condition by pressing it a second time, entex the alphanumeric character from the keyboard so that the same was printed on the document under preparation and thereafter automatic playback, as shall be described below, would be resumed. Of course, in the same example, if it were desired to prepare a corrected record media in the editing process just outlined, instead of merely correcting the document then in process, the revise or record key could be depressed for a single or double record media operation as the case might be. In this manner, a corrected record madia could bs obtained. Similarly, if the operator noted from the draft materials that the word "words" was entered on the record media while the appropriate term in the document was "word", the operator would merely maintain the automatic writing system in the play mode and depress the character/stop key four times so that "word" was played out. Thereafter, the operator would depress the skip key and again depress the character/stop key so that the impro-perly recorded "s" would be deleted on the document then in preparation. Accordingly, it will be seen that the character/
stop key in its editing function enables an operator to - ~49 -~. . ~ . .

105'~9~1 selectively print each letter of a ~ord or functional ; information associated with the preparation of a glven document until ~n error or other item ~Jhich is desired to be changed is approached. Thereafter, when the nec~ charàcter is to be changed, the mode of operation of the automatlc writing system is changed, so that the nature of the editing desired~is achieved. Thereafter, automatic playback, as shall be described below, may continue. It will also be noted-that as each eight (8) bit character supplied to the main register r~ represents an alphanumeric character or a unique function character, no specialized software analysis need attend the operation of the character~stop key ln the editin~ function. This .rill not, however, be the case for the remaining action keys within the dashed block 232 as the remaining action key~ require the monitoring of each eight ~8) bit character supplied to the main register M to ascertain whether ~redetermined characters designating the information sought is present. The character/stop key will have primary importance ~uring the play, revise, skip, or dupli-cate modes of opera~ion of the automatic ~riting system accordin~to the present invention and each depression o~ the character/
stop key ~rill cause a single character to be played and printed, skipped or duplicated depending upon the mode key ~rithin tne dashed bloclc 230 :rhich has been depressed.

105A~91~

The word key is also preferably a lighted key so that the operator is apprised t:hat this action key has been depressed and is controlling the system. When depressed during the play, revise, skip or duplicate modes of operation, the word action key within the dashed block 232 will cause the automatic writing system according to the present invention to play and print, skip or duplicate a single word wherein the term "word" here means an actual word printed on the document under preparation. Unlike a character, a word in a document under preparation is not uniformly represented by a given number of eight (8) bit characters but instead may comprise a plurality of letters and hence an arbitrary number of eight (8) bit characters.
However, a word is always followed by a space, tab, index lS or carriage return character and hence an analysis of the character being supplied to the main register M
to ascertain the presence of a character designating a space code or the like will act to invariably define a word on the printed document and if the word is followed by a punctuation mark, the punctuation mark will be included as part of the word so that it will not be left standing alone. Accordingly, when the word key within the dashed block 232 of the key-board illustrated in Figure 5 is depressed, an eight (8) bit character representative of the depression of this key is supplied through the keyboard interface 26, in a manner to be described below in conjunction with Figure 7 through the common data bus 19 and the arithmetic logic unit 84 to the main re~3ister M. In the subsequent classification .. ..

. ~5'~911 operation for this character which takes place in the arithmetic logic unit 84, the specialized function of the word action character is detected and a branch condition is supplied to the ROM address register 81 through the branch conductor 106. The ROM address register 81, accordingly, is caused to enter a branch routine wherein the address words supplied to the read only memory 80 causes a bit location in the G register to ir.dicate that a word action operation is in process and causes the remaining instruction words read from the read only memory 80 to supply the appropriate program control so that each eight (8) bit character thereafter loaded into the main register M is compared in the arithmetic logic unit 84 with the space, tab index and carriage return character constants read from the read only memory 80 until an appropriate comparison indication is achieved. This comparison indication, as will be appre-ciated by those of ordinary skill in the art~ indicates that the character presently loaded in the main register M is a a character which defines the end of a word. Accordingly, the instruction sequence then in process forwards the space character or other definition characters to the appropriate destination peripheral and thereafter stops the automatic writing system according to the present invention and places it in an idle loop in the same manner explained in connection with the character/stop key to await the ~ ~OSZ~l occurrence of a new event at the keyboard which generally takes the form of a new depression of an action key. Thus, in essence, the depression of the word key causes the ` microprocessor indicated by the dashed block 16 to run through an analysis sequence wherein a space tab, index or carriage return character is detected. Once such a definition character is detected, the microprocessor acts in the same manner as it did upon the depression of the character/stop key. However, here rather than stopping the system and placing it in an idle loop in response to each eight (8) bit character loaded into the main register M, the stop and idle sequence will only occur subsequent to an indication that the character presently loaded in the main register M is a word defining character and hence, that the preceding characters have defined a word. It should be additionally noted that the depression of the word action key does not result in a high condition on the common status bus 21 but instead an eight (8) bit data character representative thereof is loaded into the main register M, analyzed and a branch operation is initiated from the arithmetic logic unit 84. This sequence of events is necessary because the nature of the branch required for the word key as well as the remaining action keys within the dashed block 232, with the exception of the character/
stop key, require a specific type of analysis in the form of a comparison to be conducted and hence, predetermined constants to be read from the read only memory 80. In this case, the constants read and compared are space, tab, index and carriage return characters as one such ` lOSZ911 character will follow each word and it is here desired to play a word and then stop to await further instructions.
The primary function of ~he word key is to enhance the editing capabilities of this embodiment of the automatic writing system and more particularly, the ease with which editing may be accomplished by an operator.
For instance, as was described in connection with the character/stop key, when inappropriate letters have been recorded on the record media as indicated by the operator's draft document, the character/stop key allows the selective deletion of individual characters from the docu-ment which corresponds to individual letters or functions printed at the printer means 2. The word key allows the selective correction or deletion of words as a whole, but in addition provides the secondary function of enabling the operator to rapidly arrive at a character position on the document at which a correction is to be implemented. For instance, if in a given line in a document being prepared an erroneous word or words which are to be changed are present, the operator when the automatic writing system is in a play mode may play out each word in the line by simply depressing the word key until the printer arrives at a word to be corrected. Thereafter, the operator may depress the skip and word keys to appropriately skip the offending word in the line whereupon another word may be inserted directly from the keyboard and automatic playback may be resumed.
Alternatively, the record media may be updated rather than 105'~911 merely correcting the document by using the revise mode of operation, described above, in either the single or plural record media modes available. However, in addition to this function, the word key allows the operator to S rapidly arrive at a given word in a line where a correction is to be achieved. For instance, if it is assumed that a letter correction is to be carried out in the fifth word of a line and the third letter of the fifth word is to be corrected, the operator, using the character/stop key previously described would have to play on a per character basis each letter of each of the four words which precede the word wherein the correction is to be accomplished.
However, using the word key, it would only be necessary to depress this key four times to play out the four words which precede the word at which the correction is to be initiated.
Obviously, this could be accomplished at a much greater speed and at greater operator convenience then by using the character/stop key. Once the four words were played out by depressing the word action key four times, the operator could then employ the character/stop key to cause the printing of the proper letters in the fifth word to be corrected and thereafter use this key with the skip key depressed to delete the offensive letter, whereupon the correction and resumption of automatic playback could follow in the same manner set forth in conjunction with the explanation of the character/stop key. The word key thereby allows the operator not only to play, duplicate or skip 105'~9~ i given words but provides the additional function of allowing ! an operator to rapidly reach a predetermined point within the document being prepared where a correction is to be carried out. This second function is as important as the actual editing capability provided at the keyboard because the capability of rapidly and conveniently reaching a point where a correction is to be achieved, is quite as important as the ability to carry out such correction.
The line key present within the dashed block 232 also preferably takes the form of a key which is lighted when the same is depressed and acts when depressed during the play, revise, skip or duplicate mode to cause the automatic writing system according to the present invention to play and print, skip or duplicate a single line of information as represented by a line of information upon the document to be printed. Thus, the line action key within the dashed block 232 performs the same function with respect to a line of printed information on a document being prepared as the word key performs for a word of information and the character/stop key performs for each character. As will be appreciated by those of ordinary skill in the art, a carriage return character, whether precedented by operation of the code key 220 or not terminates each line of printed material on a document prepared and hence, the detection of these characters may be relied upon to define the end of a line of printed material regardless of the internal structure or punctuation employed in such line of printed material. Therefore, when the line action key is depressed, an - - . ; . ... ..

-~0529~1 eight (8) bit character representative of the depression thereof is supplied from the keyboard depicted in Figure 5 through the keyboard interface 26, in a manner to be described in conjunction with Figure 6, through the common data bus 19 to the main register M. Subsequently, this eight (8) bit character is classified through the operation of the arithmetic logic unit 84 and a branch condition is signaled to the ROM address register 81 through the branch conductor 106. The branch routine 10 thereby initiated at the ROM address regis~er 81 causes the read only memory 80 to set a flag in the G register indicating a line action key is depressed. Furthermore, constants representative of the carriage return character in precedented and nonprecedented form are read out of the 15 read only memory 80 as each character is subsequently loaded into the main register M so that such characters may be compared therewith in the same manner as was done for word defining characters in response to the depression of the word key. Thus, in the same manner as was explained in 20 connection with the description of the word key, once the line action key is depressed, eight (8) bit characters from the read only buffer 36 will be loaded into the main register M and thereafter supplied to a destination peripheral until a carriage return character is 25 detected by the comparison operation for each character which is conducted at the arithmetic logic unit 84. ~hen such a line defining character is detected the arithmetic logic unit 84 will cause a branch condition to be supplied on conductor - . ~. ~ , ~os~s~l ;
106 whereupon the operation of the instant embodiment o~
the auto~atic writing system will be stopped while the ROM
address register 81 is placed in an idlè loop awaiting the next event to be signaled from the keyboard whlch ordinarily would take the form of the depression of an action key.
Thus, the operation o~ the microprocessor indicated by the dashed block 16 and ror that matter, the instant emb~diment of the automatic writing system according to the present invention is the same when the line key is depressed as that which occurs upon a depression of the word key. ~ow-ever, rather than de,ecting the presence of a space character, or the like ~hen the line ac,,ion key is depressed, each charac-ter supplied to the main register M will be forwarded to a destination peripheral until a carriage return charac-ter, signaling the end o~ a line is detected and at that point the system is stopped an-~ placed in an idle condition.
Accordingly, the line action key provides an operator and the system as a whole wit~ a further editing capability in that a line o~ information may be selectively played and printed, skipped or duplicated in the same manner as was described ; above in con~unction with the word action key and rurther-more an additional capability is provided to rapidly enable the operator to get to a point on the document being prepared where an editing operation is to take place. For instance, if it is assumed that the draft document indicates that an error has been recorded on the record media in the third letter of the ~ourth word of the fi~th line of a given , ~05'~911 paragraph on the document, the operator, once the appropriate paragraph is reached, would depress the line action key four times so that in a play mode the four appropriate lines would be played out and printed on the document. Thereafter the operator would depress the word key three times so that the three appropriate words in the fifth line would be played out. Subsequently, the operator would depress the character key twice so that the two appropriate letters in the fourth word in which the error appears would be played out. Thereafter, correction of the error in one of the appropriate manners set out above would take place whereupon automatic playback could again be resumed. Thus, the line action key provides an operator and the system as a whole with the ability to selectively play and print, skip or duplicate a given line of material as well as to rapidly play and print data recorded on a record media until a selective editing point is achieved.
The paragraph action key, annotated PARA in Figure 5, is also preferably a key which is illuminated when it is depressed, to indicate that this action key is now control-ling the system. When depressed during the play, revise, skip or duplicate mode, this key will cause the system to play and print, skip or duplicate a single paragraph of information. Thus, this key provides the same function for the system as did the line key except that while the paragraph key functions with respect to printed information on the document in a paragraph format, the line action key 105'~
operated with respect to lines on such document. As will be readily appreciated by those of ordinary skill in the art, two consecutive carriage return characters, a carriage return character and a requireci tab character or a required carriage return all signal the termination of a paragraph and hence, may be relied upon to designate that the preceding information processed by the automatic writing system according to the present invention formed a complete paragraph. Accordingly, when the paragraph action key is depressed, character information representative thereof is loaded into the main register M and subsequently, when a classification operation occurs in the arithmetic logic unit 84, a branch instruction is supplied through conductor 106 to the ROM address register 81 which causes the read only memory 80 to insert a paragraph flag within a predetermined storage location in the G register. Thereafter, as eight (8) bit character information is loaded into the main register M
for processing, constants representing carriage return character, precedented carriage return character and re-quired tab character information are read from the read only memory 80 and compared therewith so that comparison operations carried out under program control in the arithmetic logic unit 84 may seek to determine whether or not two consecutive carriage returns, a carriage return and a required tab, or a required carriage return in the form of eight (8) bit character information have been loaded into the main register M. In this manner, when the paragraph key is depressed, the instant embodiment of the automatic writing system according to the present invention will be . . ~ . . ~ .

lQ5'~911 placed in an automatic play and print, skip or duplicate mode of operation, as determined by the setting of the mode keys, whereupon lines of information as recorded on the record media at the active record media station are auto-5 matically read and loaded into the read only buffer, selectively applied on a per character basis to the main register M and forwarded to a clestination peripheral as selected by the mode key depressed and such operation will continue until the comparison operations conducted in the arithmetic logic unit 84 indicate that the last character loaded into the main register M was a required carriage return or that the last two characters loaded into the main register M comprise a pair of consecutive carriage return characters or a carriage return character followed by a precedented tab character. When this condition is detected, automatic operation will terminate upon the forwarding of these characters to an appropriate destination peripheral and the system will be placed in an idle cycle awaiting the occurrence of a further event at the key board which again would generally take the form of a depression of another action key. Therefore, it will be appreciated by those of ordinary skill in the art that when the automatic writing system according to the present invention is in a play mode, revise, skip or duplicate mode of operation, and the paragraph action key is depressed, each character, word, and line of a paragraph will be played and printed, skipped or duplicated, depending on the mode of operation selected and upon the occurrence of character indicia signaling the . . ~ ~ . . . .

105'~
end of paragraph, automatic operation will terminate.
Thus, the operation of the paragraph action keys allows the automatic printing, skipping or duplicating of information in paragraph format while further enhancing an operator's ability to quickly arrive at a location where an editing operation is to be achieved by allowing information in paragraph format to be automatically processed until the appropriate paragraph wherein an editing operation is to take place is obtained. For instance, if it is assumed that the third letter of the fourth word in the fifth line of the sixth paragraph of a page of recorded information is to be edited, the operator, upon arriving at the appropriate page where the draft indicates that an error is to be corrected would depress the paragraph action key five times so that in a play mode the first five paragraphs where no corrections are required would be automatically played on the document then in preparation. Thereafter, the line key would be depressed four times so that the four appropriate lines in the sixth paragraph would be played out. The word key would then be depressed three times so that the three proper words in the fifth line would be played out and printed; subsequently, the operator would depress the character/stop key twice so that the two appropriate letters in the word at which the correction is to be carried out would be played and printed. At this juncture, the correction could take place in the same manner described above and thereafter automatic play back could be resumed.

1~5'~91~
Thus, the paragraph key provides an operator and the auto-matic writing system according to the present invention with the capability ~o play and print, skip or duplicate, paragraphs as a whole as well as with the enhanced ability to rapidly arrive at a portion of a document being prepared where an editing operation is to take place by enabling the automatic processing of information in paragraph format as well as providing additional graduations from paragraph to line and line to word and word to character so that the operator may always employ the largest block of appropriate information in an automatic mode of operation to arrive at a location wherein an editing operation is desired. It should also be noted that as in all the editing operations discussed below, once a portion of a document wherein an editing operation is desired to take place is located, any amount of information may be inserted from the keyboard for the correction of the document or the correction of a document and the preparation of an updated or corrected record media and the previous examples concerning the mere correction of an erroneous letter and the like were only set forth to serve as an appropriate example but should not be viewed as limiting with regard to the nature of the editing operation which may be performed because the nature of in-formation retrieval relied upon in the present invention is independent of the operations which may be utilized in achieving the editing operation per se. For instance, as shall be seen below, a single record media revise operation OS'~911 ,-may takc place so lon~ as not more than rlrty (50) characters ~re to be added to a given line Or characters;
however~ should more than filty (50) characters be desired ~o be added, a two record medium mode o~ revis~on must be employed.
The automatic action key annotated AUTO in Flgure 5 ~yhen depressed durin~ the play, revise, skip or duplicate mode of operation will cause the sys~em to play and print, skip or duplicate a single block of information wherein a block of in~ormation is here de~ined as the record material identified by the previously described numerical codes - : inserted at the end of ~he large, nine (9~ inch interrecord ~aps em~loyed to code whate~ter information is deslred to - be designated as blocks and re~rievaole through ~he ; search operation described in con~-junc~ion with the search s; 15 key. Ordinarily, such bloclcs o~ in~orma~ion are associated - with complete pages Or information ln a mul~ipage document `, recorded on a record medium or items such as let~ers and - ~he like which are independent Or each other even though they are recorded on the same record medium. However, as 2Q was explained above, any selected number o~ paragraphs, lines, words or even characters could be designated as such ---bloc]cs. Thus, alt.hou~h a bloGlc o~ lnrormation may be arbi~rarily designated by an operator to uniquely identi~y .. _ .. . . ._ .
any deslred amount Or material, i~ will be appreclated by thos~ of ordinar~ slclll in the art that block designations - are mos~ con~eniently employed to deslgnate lndividual - 2611 ~

.

. .. .. .... . . . . .. . . . ... .. . .. . . .. .. ... . ..
, . . .. . . , .. . , . ... . .. . . . . . . . , ... .. . ... , .. ... .. . .. . ~ . . .... ~ . . .
. .. . . . .

105~9~1 pages because the paragraph, line word and character/stop action keys described above will allow an operator to rapidly achieve any location within a given page because each of these action keys selectively act, as aforesaid, to process information as a function of the character information which uniquely terminates them and hence serve to readily provide an identifier therefor. Accordingly, when a block is employed to designate less than a page of information, the operator is provided with a dual mode of information retrieval in the system which, although from time to time may be advantageous, is generally wasteful when viewed in terms of the overall capability of the automatic writing system according to the present invention.
Thus, although not mandated by the requirements of the system a block of information may generally be viewed as a complete page of printed material. The operation of the automatic action key, AUTO, will vary depending upon the mode in which the automatic writing system according to the present invention is operating in as determined by the mode key which is depressed. Thus, if the play, revise, and/or skip key is depressed, the operation of the automatic action key will be such that a block of material representing a page of a document will be played and printed or skipped.
Thereafter, the operation of the system will stop and be placed in an idle loop awaiting the occurence of a further event at the keyboard which generally takes the form of the depression of an action key. For the play, revise and/or lOSZ911 ` skip modes of operation this is highly convenient because ; at the end of each block of information wherein the block represents a page as aforesaid, a new sheet of paper must be inserted at the printer assuming a continuous document feeding technique is not being employed. In the duplicate mode, however, the operation i~; such that when the automatic action key is depressed, all data on the record media up to and including the data specified by the block address, as set into the block address thumbwheels 233 will be duplicated at the record media located at the read/write record media station. If the thumbwheels 233 are set to 00, the record media at the read only station will be duplicated from its present position to the end of the recorded material thereon and hence, a setting of 00 at the thumb-wheels may be employed to rapidly duplicate an entire record media. If, however, the thumbwheels have a specified numerical setting which is higher than the present block position of a record media loaded at the read only station, all data from the present location o the record media up to and including that data specified by the block address set at the thumbwheels 233 will be duplicated on a record media loaded at the read/write station. However, should the thumbwheel 233 be set ~o a block address which is lower than that of the present location of a record media loaded at the read only station, no duplication will take place. The duplication of data will only terminate after all selected conditions have been fulfilled.

lOS29î1 When any of the mode keys such as revise, play, duplicate and/or skip have been depressed an eight (8) bit character representative thereof is loaded into the main register M in the manner described above to thereby cause the automatic writing system to be conditioned under program control for the mode of operation specified thereby. Sub-se~uently, if the automatic action key is depressed, an eight (8) bit character representing the depression of the action key is loaded from the keyboard interface 26 in a manner to be described below and is applied through the common data bus 19 and the arithmetic logic unit 84 to the main register M. The eight (8) bit character representing the mode key depressed is utilized to set a bit in the G register representing the mode for which the system was conditioned and thereafter a bit representing the action key depressed is similarly loaded into the G register. These two representations are appropriately processed by the arithmetic logic unit 84 which will cause a branch operation in response thereto depending upon the nature of the conditions indicated. For instance, if the duplicate key was depressed in conjunction with the automatic action key, the ROM address register 81 will go through a branch routine which causes sixteen (16) bit instruction words to be read from the read only memory 80 causing information to be recorded from the read only record media station to the read/write record media station in accordance with the block information set at the thumb-wheels 233. The transfer of record material from the read only record media station to the read/write record media lOSZ91~
station will be further described below, however, it is here sufficient to note that it takes place as a continuous transfer operation wherein lines of data are read from the record media located at the read only station inserted on a per line basis in the read only buffer 36, loaded on a per character basis into the main register M for transfer to the read/write buffer 35 and such loading into the read/write buffer 35 continues on a per character basis until a full line of data as designated by a carriage return character has been accumulated. Thereafter the contents of the read/write buffer 35 are recorded onto a record media located at the read/write record media station and this operation repea~s on a continuous basis until the block address set at the thumbwheels 233 corresponds to the block address read from the record media loaded at the read only station. The aspect of the duplicate mode of operation which is associated with the reading of all the material from the present position of the record media at the read only station to the block address set at the thumbwheels 233 takes place in the same manner as was described above with respect to a search operation. However, the comparison operation is limited so as to only take place in the direction in which reading occurs as no high speed search is involved. Therefore, duplication will only take place when the block address set at the thumbwheels is higher than that of the present position of the record media located at the read only station. A 00 block address set at the thumbwheels - : ~

lOSZ9~1 is a special address which when decoaed in the microprocessor indicated by the dashed block 16 mandates a duplicate operation in the read direction until an end of record character is detected.
When the mode of operation set is that of revise, play and!or skip, the branch operation induced by the level applied by tl~e arithmetic logic unit 84 to the R0~ address register 81 through conductors 106 upon the depression of the automatic action key is such as to ca~se the read only ~emory ~0 to supply sixteen (16) bit instruction words to the common instruction word bus 20 so that the record media at the active station is read and processed in the manner determined by the mode key depressed. In all cases, data read from the record media is loaded on a per line basis into one o~ the buffers 35 or 36 and is thereafter processed and possibly printed in the manner determined by the mode key depressed. However, what is here important to note, is that under these conditions the instructions applied by the read only memory 80 will be such that an entire block of information will be read and appropriately .processed in accordance with the mode key depressed. When the end of the block is reached, as indicated by the substantial interrecord gap and the particular numerical designation associated wi~h block information set, as aforesaid, automatic prGcessing will stop and the micropro-cessor indicated by the dashed block 16 will go into an idle loop and await the next event which takes place at the key-.... ,, . , . ;.. ~ .. ~ .

105;~9~
board means ~hich, in the usual case, is a subsequent depression of an action key. Thus, whenever the automatic writing system according to t~le instant invention is not in the duplicate mode, the depression of the automatic action key will result in the appropriate playback and processing of the block of information presently in position at the read head of the active record media station; however, only this block will be read and upon the completion of the block of information, ~e automatic processing will stop to await further instructions from the keyboard. This is highly convenient because as block information normally represents a page of printed matter on a document, as aforesaid, automatic stopping intermediate blocks of information is necessary to provide the operator with an appropriate interval of time to insert new paper at the printer and even if a contir.uous form of paper feed arrangement i5 employed, the operator will generally have to provide an appropriate spacing increment on the page ~st ~`~
being completed and a further appropriate paper indexing for the new sheet of paper on which the next subsequent block is to be printed. As will be appreciated by those of ordinary skill in the art, since the operation of the automatic action key when the instant embodiment of the automatic writing system is in a revise, play, and/or skip mode of operation is such that the block of information presently positioned in the active reader is played until the end thereof is reached, appropriate positioning of the 105~9~:~

desired block of information in the active reader normally precedes the depression of the automatic action key. Such positioning, as now will be apparent, is accomplished through the search routine initiated by the appropriate setting of the thumbwheels 233 and the search key as outlined above.
The automatic, paragraph, line, word and character/
stop action keys enclosed within the dashed block 232 combine in function, as will be appreciated by those of ordinary skill in the art, to provide the instant embodi-ment of the automatic writing system according to the present invention and hence, an operator using such system with the capability to access any given unit of data recorded on a record media which is indicated on draft materials. For instance, if it is assumed for the purposes of the instant discussion that a ten page document has been recorded in draft form on a record media and it is desired to insert corrections on page 3 thereof and reproduce pages 2 through 6, the operator would merely load the record media in the read/write record station, set the thumbwheels for block 2 and initiate a search operation for this block of data by depressing the search key. Once a successful search has been indicated, the operator would depress the play mode key assuming paper had been previously loaded in the printer and a play mode is desired, and there-after depress the automatic action key. As no corrections are to be made on page 2, the operator's action in de-.. . .~ . :

~o~9~
pressing the automatic action key would cause block 2, which here corresponds to page 2, to be automatically played out and thereafter the automatic operation of the printer would be stopped whereupon a new sheet of paper could be loaded at the printer. Once the new sheet of paper is loaded, the operator would selectively depress the paragraph line, word and character/stop ~eys so that the point at which each correction is to be made on page 3 is rapidly reached. Thereafter, the correction could be made by utilization of the skip key and the direct insertion of corrected material at the keyboard or depending on the nature of the correction required, only the skip or direct insertion might be utilized as the play mode of operation is here being relied upon and hence no updating of the record media is required. Of course it will be readily appreciated by those of ordinary skill in the art that the record media could be updated by either using a single record media mode of the revise operation or if it were desired to make major revisions a two record media revise mode of operation would be employed and in this case the record media upon which the draft material was recorded would be loaded at the read/only record station. Thus, in the manner outlined above, the paragraph, line, word and character/stop keys would be selectively employed by the operator to rapidly approach the point at which a correction is desired and thereafter the material to be corrected would be operated upon by the selective utilization of the skip keys and data 105291~L
insertion from the keyboard. In this manner, the operator would perform all the corrections to the third page of the document being played out and w~hen the last correction has been made, the automatic action key would again be depressed so that the remaining portions of the data in this block of information would be automatically played out to complete the playback and printing of page 3. Thereafter, a new sheet of paper would again be loaded for each page to be played out without correction which in this case, involves pages 4 - 6 and each time a new sheet of paper is loaded, the automatic action key would be depressed so that the page would automatically be played back and thereafter the automatic writing system would again stop. Thus it will be seen that the action keys annotated automatic, paragraph, line, word and character/stop enclosed within the dashed block 232 cooperate with the mode keys enclosed within dashed blocks 229 and 230 to provide an operator with the unique cabability of rapidly accessing pre-recorded information and operating or otherwise processing and printing such information in virtually any desired manner.
The line correct key, annotated LINE CORR present within the dashed block 232 is also a lighted key which provides an operator with the ability to correct errors noted during the recording operation, which errors are either of substantial magnitude or are not immediately detected while the operator was recording that information.
As will be appreciated from the description of the operation 1{15;~9:1~
of the instant invention as outlined above, when the record key is depressed and data is inserted at the keyboard, each depression of an alphanumeric character key results in the application of an eight (8) bit character, actually a seven ~7) bit data character as the eighth bit thereof is a zero, into the main register M and such character is subsequently applied and inserted into an appropriate location within the read/write buffer 35. In addition, when the first character for a line of information is inserted, the present position of the daisy wheel print element carriage, as available at the output of the carriage position counter 152 shown in Figure 4, is gated under program control onto the common data bus 19 and stored in an appropriate character location within the general purpose registers 83. This line start position character, as shall be seen below, is recorded at the end of each line of information on the record media so that the starting position of the printer for each line of character information is available as a reference. Such a carriage position reference is desirable as will be appreciated by those of ordinary skill in the art because not all lines of information recorded are initiated at the left margin.
The read/write buffer acts to accumulate each of the characters inserted until a full line of data cAaracters has been stored therein. Thereafter, the contents of the buffer are recorded on the record media located at the active record media station which in a record operation is always the read/write record media station, and the carriage position character is recorded at the end of each line as one of the three housekeeping characters described hereinafter. Thus, .. . - ~ ~

105,'Z9~
the manner previously described above, alphanumeric character information inserted at the keyboard depicted in Figure 5 during a record operation is accumulated in the read/write buffer 35 until a full line of alphanumeric character information has been loaded therein and thereafter each line so accumulated is recorded on the record media so that the record media need only be brought to speed and subsequently stopped each time a full line of alphanumeric character information is to be recorded and in this manner wasteful starting and stopping of the record media is avoided. If in a record mode of operation, as shall be more fully described below, an operator immediately notices that an error has been made in the entry of information from the keyboard, the backspace key enclosed within the dashed block 219 of Figure 5 may be depressed to effectively back up the buffer by one alphanumeric character position for each depression of the backspace key. In this manner, the operator may reinsert new information for that character position from the keyboard as if no erroneous entry had been previously made. Where, however, an erroneous entry from the keyboard means remains unnoticed until a large number of alphanumeric characters have been subsequently inserted, for instance, consider a case where an error was made in the entry of alphanumeric characters associated with the second word of the line and remains unnoticed until the operator has completed one of the last words in the line, the use of the backspace key to obtain a correction of the erroneously inserted information would be a time consuming and fatiguing process.

105~9~
Similar observations could be made under conditions where the operator notices an error in a previously completed line of information when data is being inserted for the next subsequent line of information or perhaps two lines of information removed from that in which the error occurred.
To correct errors like the foregoing, the line correct action key is employed. The line correct key, when depressed during the record mode, will cause the line of information presently being stored in the buffer to be cleared and the daisy wheel print element carriage to be returned, under program control, to the carriage start position for that line, as defined by the stored position character without indexing except as to such indexing which is present in the recorded line of information through which a return was initiated.
Alternatively, return to the left hand margin could be employed. The information so cleared is not recorded on the record media nor will the record media be erased or rewound since the line was not transferred from the read/write buffer 35 onto the record media at the read/write record station. Each subsequent depression of the line correct action key will merely cause the record media to be rewound a distance which corresponds to the length of record media utilized for the line of information recorded, as measured by the interrecord gaps on each side thereof, and will additionally cause the printer to reverse index to the beginning of the previous line of information. This is achieved under program control by rewinding the record media for the length of a line, reading the recorded information into the read only buffer so that the carriage position character is obtained and thereafter : ~0529~1 again rewinding the record media to the beginning of the line.
The record media, in this case, will be erased and re-recorded as the operator reinserts new information over any portion of the existing information.
When the line correct key is depressed an eight (8~ bit character representing the depression of this key is applied through the keyboarcl 26, the common data bus 19 and the arithmetic logic unit S4 into the main register M.
Thereafter this eight (8) bit character is reinserted into the arithmetic logic unit 84 wherein a classification operation takes place to ascertain the nature of an eight (8) bit data character. The identification of the eight (8) bit character as a line correct action character results in a branch level being applied to the branch conductor 106 which causes the ROM address register to go through a branch routine.
The branch routine associated with the line correct function causes a sequence of sixteen (16) bit instruction words to be read from the read only memory 80 to achieve the desired line correct sequence of operation. More particularly, the ~o sequence of instructions read from the read only memory 80 initially ascertains the state of the pointer, to be described below, in the read/write buffer 35. If the read/write buffer 35 is not in an aligned condition, a condition where the pointer is at a zero character position, the read/write buffer 35 will be cleared by placing it through a read alignment sequence and thereafter the daisy wheel print element carriage will be returned to the line initiating position defined by the carriage position character stored in the general purpose registers. Additionally, the contents of the buffer are - revie~ed to ascertain if indexin~ oper~tions took place an~
if presen~ complementary inde~ing at the printer is initiated.
This sequence of events is appropriate for a condition where the line c~rrec~ action key is depressed for the first time and hence the portion of the line to be omitted is stored in the read/write buffer 35 but has not yet been recorded on the record media at the read~write record medla station. This is indicated by the pointer at the read/write buffer 35 not being in an allgned condition which indi^ates that data is present therein. If the pointer at the read/Nrite buffer 35 is at the zero condition, the logic no~es that the read/
write buffer 35 is in an aligned condi~ion and hence, that the instant depresslon of the line correct key is not an initial depression of such key. Under these conditions, the record media at the read/write st~tion is, under progra~ control, rewound an interval which corresponds to the distance required for the recordation of one line, the recorded contents are loaded into the read only buffer and the record media again rewound, under program control through a line inter~al. The daisy llheel print element carriage, which is already at a line initiating position, is allowed to remain in this con-dition if the carriage position character read corresponds to the present position thereof. However, if the carriage position differs, as determined by a comparison operation in the ALU, i-t is adjusted and the paper is reverse indexed one line in addition to any complementary indexing indicated ~ - 278 -., . .

lOS~93~1 by the line information read so that printing may take place on the document in a position occupied by a subsequently printed line of information. Thus, the line correct key enables the operator to correct subsequently noticed errors or errors of major proportion which appear in the line of information presently being recorded or those which may appear in already recorded lines of information preceding that presently being recorded.
Practically, however, it should be observed that the line correct action key when properly utilized should only be relied upon to correct subsequently noticed errors in preceding lines of information if such errors appear within a relatively small number of lines from that which is presently being recorded. This position is taken, because, as will be readily apparent to those of ordinary skill in the art, the utilization of the line correct key although allowing an operator to rapidly return to the point in which an error appeared in a previously recorded line, causes the information which is returned through to be lost. Therefore, if a substantial number of lines must be returned through before the operator can arrive at the previously recorded line in which an error appears, it is most expeditious to ignore the error and continue with the recording operation and thereafter to correct the error in a revise mode of operation when the material being recorded is being played out for use in connection with a final doc-ument. Thus, the line correct action key provides the - 278a -` lOSZ911 instant invention with the capability to return through discrete lines of previously recorded material to enable an operator to rapidly arrive at a point in which an error occurred to thereby provide a highly advantageous mode of editing in a record mode of operation.
The action keys enclosed within the dashed block 232, as shall now be appreciated from the descriptive material set forth above, provide the automatic writing system according to the instant invention and hence, any operator thereof with a powerful set of control modes wherein in any record or playback situation, the instant invention may be operated in such manner that predetermined amounts of material may be rapidly accessed and presented for any desired purpose such as the correction of errors which may appear or the selective editing or printing of pertinent portions of the prerecorded material. Thus, the automatic, paragraph, line, word and character/stop action keys cooperate in such manner that an operator may duplicate, ~ play, revise, and/or skip material on a selective basis so that the material processed in the selected mode may be accessed in a graduated manner wherein the largest unit of material i.e., blocks, paragraphs, lines, words and characters are processed on a per unit basis so that the largest units of material are handled until the unit at which the location is sought is obtained whereupon accessing the steps down to the next smallest logic unit to be operated upon. Accordingly, to arrive at an appro-105Z91~
priate page, the operator would depress the automatic action key until the preceding page was completed. There-after, the paragraph key would be depressed until the paragraph in which the desired material is located was obtained. Then the line key would be depressed until the appropriate line was obtained and subsequently the word key would be depressed until all portions of the line preceding the word in which a desired location was sought was obtained.
Thereafter, the utilization of the character key would precisely locate a desired character. Similarly, in the record mode, the line correct action key could be employed to back up the information inserted into the present embodiment of the instant invention until the daisy wheel print element carriage and the record media and/
or the read/write buffer 35 were positioned at the beginning of a desired line of information while intra line corrections are obtained if they are relatively close to the present position of the daisy wheel print element carriage by repeated depressions of the back space key.
The program controlled backing up of the carriage in response to each depression of the backspace key also makes use of the stored character which defines the initial position of the carriage for that line in that whenever this key causes backup through a tab or similar characterwhose point of initiation is not readily available, a calculation is initialed under program control which effectively adds the widths of characters to be retained in the register to the position where the line is initiated so that the appropriate position for the carriage is obtained. Accordingly, the automatic writing ~ - 280 -`~

' ~OSZ9~1 system according to the present invention not only pro~ides a plurality of modes of operation wherein material may be recorded and selectively played bac~ to speed and automate the evolution of draft copy into final documents, but in addition provides a highly selective and graduated mode for obtaining the selective accessing of desired positions within either the draft or final copy being prepared.

280a ~1 ~LOS;~9~1 ' THE THUMBWHEELS
The pair of thumbwhe~els 233 may take the form of a pair of rotatable drums having the numerals 0 through ` 9 inscribed thereon and are adapted to act in the conven-tional manner to set the state of a register in accordance with the numerals displayed in the topmost portion thereof.
The pair of thumbwheels 233 are disposed on the keyboard shown in Figure 5 in such manner that the numeral displayed at the opening in the keyboard housing indicated is the numeral for which the corresponding count in the register has been set. The thumbwheels 233 may be set by the thumb adjustment of the narled disc portions thereof 23~ and 235 and it will be appreciated that the pair of thumbwheels 233 act in concert to allow the operator to set any block reference codes therein from 00 to 99. The register, not shown, which is set by the condition of a pair of thumb-wheels 233 produces an eight (8) bit output code represen-tative of the numerals displayed at the keyboard. This eight (8) bit code indicative of the setting of the thumb-wheels 233 is not associated with the eight (8) bit character codes utilized for the alphanumeric and function - information from the keyboard; however, instead a direct eight (8) bit numerical code is employed and as shall be seen below, in connection with the description of the key-board interface shown in Figure 7, the setting of the thumb-wheels is selectively gated onto the common data bus 19 through the keyboard interface 26 in response to an interro-gate instruction received on the common instruction word bus ., - , - - .

~05'~9~
20. Thus, when the keyboard interface 26 is interrogated by the read only memory 80, the condition of the thumbwheel register is gated onto the common data bus 19 for insertion into the main register M. As the condition of the thumbwheels is applied to the common data bus 19 upon the receipt of an instruction therefrom from the microprocessor indicated by the dashed block 16, no specialized coding therefor is reguired as the information requested is directly acted upon in a programmed manner and hence no special code assignments are required for classification and subsequent utilization.
The pair of thumbwheels 233 are employed to indicate the two digit block addresses for numeric codes mentioned above which range from 00 to 99. In a record operation, the reference codes or block addresses are set sequentially at the beginning of each page to be recorded as reference code assignments are entered from the keyboard. In this manner, each page of material which is recorded on the record media is provided with a unique, sequential block 105Z91~L

address which may then be designated at the thumbwheels 233 ; and employed, in the manner described above, to reference such block of material for the purposes of a search opera-tion or various play, revise, cluplicate, and/or skip modes of operation. Thus, for instance, when it is desired to prepare an updated or duplicate record media, the duplicate operation may be employed wherein if a 00 code is set at the pair of thumbwheels 233 the entire contents of the record media located at the read only record media station will be duplicated onto the record media located at the read/write record media station while if a number is set into the pair of thumbwheels 233 which exceeds the present block position of the record media located at the read only station, all information from this record media up to and including the block of information set at the thumbwheels will be transferred onto the record media located at the read/write record media station. Similarly, when it is desired to play selected blocks of information from a record media located at an active record media station, in either the play, revise, and/or skip modes, a search operation may be utilized in the manner explained above to position the record media located at such active record media station at the desired block location prior to the depression of an action key which initiates playback in the mode selected. Accordingly, the pair of thumbwheels 233 cooperate with the action keys located within the dashed block 232 to provide an operator with the capability of rapidly accessing predetermined blocks of information placed on the record media. It should be noted that in the 105~911 a necessary attribute of a highly efficient word processing system as is the ability to rapidly arrive at a predetermined character location within a given page of material.
THE ENCODED FUNCTIONS
As was described previously, the code key 220, acts when depressed to provide an encoded function for the selected ones of the standard keys within the standard keyboard array enclosed within the dashed block 219 which are employed for encoded functions. These encoded functions are briefly described below together with the function of the encoded character associated therewith; however, it should be noted that when the encoded function is akin to that normally employed by the key itself, i.e., such as tab, carriage return, space and the like, the encoded function is referred to as a precedented function and it will be understood that in each case a precedented or encoded function is obtained by depressing the code key 220 and the standard key associated with that function.
In the instant embodiment of the automatic writing system according to the present invention, as mentioned above, whenever the automatic writing system is removed from the record mode of operation by a second depression of the record mode key, the record media in which recording was taking place is marked with an end of record code. The end of record code is employed to mark the record media at the point in which a record operation terminated so that when the automatic writing system is again energized in a record mode of operation, the record media may be automatically searched .
.. . ~, ~ . . ; ~ .

105;~911 for the end of record character to thereby allow recording to pick up at the point in which the previous recording operation terminated. This is a highly important feature in an automatic writing system such as that presently being discussed as it allows an operator to interrupt recording, de-energize the machine and at some other time return to the automatic writing system and continue the recording operation at the point at which recording terminated. In the instant invention, this is implemented by an automatic program sequence which is initiated whenever the automatic writing system is energized and placed in the record mode. This automatic program sequence causes the record media to be automatically searched for the end of record character and new information inserted at the keyboard to be recorded only at the point in which the end of record character appeared so that recording continues from the point in which it was terminated while the end of record carrier is written over.
Thus, if the record media is not fully recorded by the instant recording operation, a new end of record character may be applied to the medium when the instant record operation terminates.
There are times, however, when it is desired to destroy the information previously recorded on the record media and to re-use the record media in the recordation of new material. For this purpose, an erase function key is provided. The erase function key, the key within the dashed block 219 annotated ERASE, i.e., the ONE key, acts when lOSZ9:1~
depressed together with the code key 220 to place the system into the automatic record mode and bypass the usual automatic search routine for the end of record character.
In this way, a prerecorded record media can be erased and re-recorded from its beginning rather than from the point at which the end of record character appears. In operation, when the erase key is depressecl together with the code key 220 an eight (8) bit character indicative of the erase function is supplied from the keyboard interface 26 through the common data bus 19 to the main register M. This character, after classification, causes a branch operation which is initiated by a ONE (1) level on branch conductor 106 to take place at the ROM address register 81 which effectively causes a record mode instruction routine to be issued by the read only memory 80 in a direct manner without the issuance of sixteen (16) bit instruction words calculated to cause a search for the end of record character on the record media. In this way, recording will take place from either the beginning portion of the record media or any other portion of the record media which is appropriately positioned by the operator. Thus, whenever it is desired to reuse a previously recorded record media in a new recording operation, or to partially reuse such record media, the depression of the code key 220 and the erase key must precede the usual recording operation.
The reference code key, annotated REF in Figure 5, when depressed together with the code key 220 during a 105'~
record mode, will encode and record a re~erence code to~e-~her with a seQuential block address onto the record medla. The re~erence code is loaded into the ~ain register M from the keyboard inter~ace 26 and the co~mon data bus 1~. lrhen the reference code is classified,a block address counter in the general purpose re~isters 83 ~or the read/write record media station ls incremented and this code together with a sequential block address from the incremented counter is recorded onto the record media. It should be noted that the microprocessor indicated by the dashed block 16 keeps track o~ the current block address and automatically increments such block address and applies the same to the record media as each succeeding block address is recorded so that the operator need not constantly update the block addresses each tile the re~erence key is depressed. Block addresses, as mertioned above, are normally utilized to separate particular seOments of infor-mation on the record ~edia and generally a block address is inserted ~or each page of material recorded; ho~iever, should circumstances warrant, block addresses may be employed to particularly designate paragraphs or any other more specialized unit o~ information recorded. If the code print key is in a do-.~n position ~hen the code key 220 and the re~erence key are depressed, an indicia that a re~erence code has been inserted at this point Yill be printed together ~rith the block address recorded. In this case, the indicia for the re~erence code character which is printed is the numeral t~^lo overprinted with a slash (Z).
The stop key~ ~hen depressed to~ether with the code key 220 durlng the record mode will encode and record a ~os~
stop code onto the record media. If the code print key is depressed when the stop an~ code keys are actuated, a three overprinted with a slash (~) is printed to indicate that a stop code has been lnserted at this point in the information being recorded and printed. The stop code, when read during playback, will automatically stop both printing and playback to permi~ the operator to :lnsert additional information from the keyboard which is not ~ound on the record media.
Such additional information may take the form of names and 1~ dates such as u~der conditi-ons where t~e body of 2 letter has been recorded whlle lndividual name and date information of those who are to obta~n copies o~ such letter are inserted from the keyboard. Ad~i~ionall~, .the stop .code may be employed to allow the daisy wheel print element to be changed at this Doint for the printing of a specialized character which is not found on the daisy wheel print element generally utllized in the processing of the document. For instance, if ~ paper concerning a mathematical presentation were being prepared, the stop code might be employed to allow printing and playback to stop while a daisy wheel print element ls inserted having Greek letter characters thereon.
Thereafter, such Greek letter characters could be employed where necessary and thereafter the regular daisy wheel print element could be reinserted and automatic playback continu,ed.
When the stop key is depressed with the code key 220, an eight (8) bit character representing the encoded function of this key is applied through the keyboard interface 26 through the common data bus 19 tG the main register M. This eight (8) ~05'~911 bit character is ~hen transferred ~rom the main register ~1 lnto the read/t~rite bur~er 35 and subsequently onto the record media ~Jnen the line accumula~ed in the read/write buffer 35 is recorded. It should be noted ho~rever, that the stop code character (~) is prohibited by the logic çircuitry within the-micro?rocessor inàic2ted by the dashed blocX 15 from bein~ transfer~ed from one reco-d media to another although the eight (8) bit stop code will be -ead from the record media and logically processe~ to cause a brar.ch operation w~hich stops playback and printing. Therefore, stop codes may not be employed ~here it is ultimately deslred to Dre~are a final form record media from cn initially pre~ared recorà media.
The rep-oducing stop code key, the key annotated R S~OP in Figure 5, when depressed to~ether with the code ~ey 220 durinr a record mode, will encode and record a reproducin~ sto~ code onto ~he record ~edia. If the code ~rint key is depressed, a four overprinted witn a slash (~) is printed on the document being prepared to indic~e tnat a reproducin~ stop code nas been inserted. This code, when read during pla~back, will cause a function ~lhich is identi-cal to that of the sto?`code (~) discusseà above. The difference bet~Jeen the re?roducing sto3 code (~) and the sto~
code t~) is that the re~roducin~ sto? code must be used when transferrin~ infc,r~ction in a reco~d ~ocle rro~ a record ~edia loaded at tne read only reco-d ~edia s~ation to a record media located at the read/~rite record media stat~on since - 2~9 -.

lOS;~911 this code will be written onto the transfer record media while the stop code (~) will not due to the aforesaid function of the microprocessor indicated by the dashed block 16.
The switch key annotated SW in Figure 5, when depressed together with the code key 220 during the record mode, will encode and record a switch code on the record media. If the code print key is also depressed, the depression of the switch key together with the code key 220 will result in the printing of a five overprinted with a slash t~) on the document to indicate that a switch code has been recorded. The switch code generated is inserted into the main register M through the keyboard interface 26 and the common data bus 19 and is transferred to the read/write buffer 35 and subsequently to the record media in the same manner as any other character inserted at the keyboard.
This code, when read during playback, will cause the instant embodiment of the automatic writing system to switch, under program control, from one reader to the other. This enables the operator to automatically combine and print information prerecorded on two different record media and, as will be readily appreciated by those of ordinary skill in the art, allows documents having merged contents to be readily prepared.
The search key annotated SCH in Figure 5, when depressed together with a code key during the record mode will encode and record a search code into the record media. If the 105Z9~L
code print key is additionally depressed, a six with a slash therethrough (~) will be printed to indicate that a search code has been inserted at this point. Each time the search key is depressed, it must be followed by the insertion of a block address to designate the block for which the search is to be conducted. The block address is here supplied by the insertion of a two digit number from the keyboard such as 01 which is inputed by depressing the zero (0) and one (1) keys within the standard keyboard array, indicated by the dashed block 219, respectively. The search code together with the block address inserted are recorded onto the record media in the same manner as any other information inserted at the keyboard is recorded thereon. The eight (8) bit search code together with the block address inserted, when read during playback will cause the automatic writing system according to the present invention to automatically search, under program control, to the block address which has been recorded. In this way, particular segments of information can be played irrespective of their chronological order on the record media. The direction of the search, i.e., forward or reverse, is determined by the block address which has been recorded as compared to the current block address of the record media. An automatic forward search is actuated when the record media is at its beginning portion and an automatic reverse search is actuated when the record media is at the end portion thereof or an end of record character is detected. Thus, the search key allows an operator to cause .. . . . . . .. . ~ ,.. . .. .. .. .. . . . . . .

~Q~Z9il the playback of information previously recorded on a record media without a fixed relationsllip to the information - presently being read from the record media.
The switch and search key, annotated S~/SCH in Figure 5, when depressed, together with the code key 220 during -the record mode will callse a switch and search code to be recorded onto the record media. If the code print key is also depressed, a switch and search cod~ indicia in the form of a seven with a slash overprinted thereon (~) will be printed on the document to indicate that a switch and search code has been inserted at this point.
A block address must also be inserted from the keyboard following the depression of a switch and search code (~) key to indicate the block address for which the search must occur. The block address is inserted following the insertion of tha switch and search code (~) by the insertion of a two digit number from the keyboard in the same manner as was explained in connection with the search key (~) and again this information is recorded upon the record media in the same manner as any other information inserted at the keyboard.
~hen a switch and search code together with a bloc~ address is read during playback, the system operating under program control will automatically switch from the active record media station to the other record media station and the newly active record media station will be searched for the pre~
recorded block address. In this way, an ope~a~or can automatically combine and print information pre-recorded on .

, - . ~ - . -lOSZ9~

two different record medias irrespective of the chronological order in which desired information appears on the record media. The most prevalent use of the switch and search (~) key would be to merge information from two record medias in such manner that batched letters or the like are prepared.
As a typical example of the preparation of batched letters may be utilized to illustrate the function of the switch and search (7) key as well as several additional keys which have heretofore been mentioned, a brief example thereof will be set forth. For the purposes of the instant example, it will be assumed that a standard letter is to be prepared and forwarded to a group of designated addressees.
The letter will be in the conventional format and hence, will include when in final form, the following portions:
(a) Date information (b) The named addressee and any appropriate title information together with his address, (c) the word Dear followed by (d) Mr., Mrs., or Ms., and the addressee's surname, although as will be readily appreciated, if all of the addresses have the same title, such title may be lumped with the word Dear and portion (d) may be devoted solely to the family name and, (e) the body of the standard letter which ~05;~9il may include one or more paragraphs, a closing salutation and the name and perhaps the title of the sender.
In order to prepare for batching letters of the standard type described above, two record medias will be prepared.
The first record media preparedl is referred to as the constant record media as this record media contains the standard letter as well as additional information which does not vary in each of the batched letters to be prepared.
The second record media which is prepared is referred to as the variable record media and will include essentially the name and address information associated with each of the addressees, which information will vary with each batched letter prepared. To prepare the constant record media, the operator will load a record media at the read/write record station, depress the record mode switch, depress the code print key if it is desired to observe the points in the draft copy for the constant record media at which encoded functions are recorded which is generally a preferred mode of operation in the preparation of the constant record media for a batched letter operation and thereafter the operator will record a reference code by the depression of the code key 220 and the reference key (Z) to designate the block address of the standard letter. Thereafter, the operator will prepare the constant record media by performing the following steps:
1. Depress the code key 220 and the , . , ~
- . -: - , : .

:
~OSZ9~1 reproducing stop key (~).
2. Insert data information at the keyboard in the same manner as would be done in a normal typing operation.
3. Depress the carriage return key four (4) times to provide appropriate paper indexing between the date information and the inside address information associated with the named addressee.
4. Record a switch code by depressing the code key 220 and the switch key (~).
This will act, as shall be seen below, to transfer playback to the variable record media to obtain the name and address information therefrom.
5. Depress the carriage return key twice to obtain appropriate spacing between the address information and the "Dear Sir"
or similar information.
6. Insert the word "Dear" by depressing the appropriate keys on the standard keyboard array as would be done in a normal typing operation.
7. Encode a second switch code in the same manner as was done in step 4. This will switch playback to the variable record media so that the surname and title ~052911 associated with the word "Dear" may be obtained.
8. Insert a colon from the keyboard in the same manner as would be done in a normal typing operation.

9. Depress the carriage return key twice to obtain appropriate spacing between the "Dear Sir" phrase and the body of the letter. Thereafter insert the body of the letter together with the salutation, signature and title portions thereof in the same manner from the keyboard as would be done in a conventional typing operation.

10. Record a search code by depressing the code key 220, the search key (~) and inserting the two digit number employed as the block address for the standard letter, as mentioned above.
Thereafter, the record key may be released, the eject button - -depressed and the constant record media removed. A new record media should now be inserted in the read/write station so that the variable record media may be prepared. If the second record media in place at the read/write record media station has not been previously utilized in a recording operation the automatic writing system may be immediately placed in a record mode of operation, the code print key 105'~911 should be depressed so that the codes inserted in the preparation of the variable record media may be observed by the operator and thereafter a block address would be recorded prior to the insertion of data on the variable record media by the depression of the code key 220 and the reference key (Z). However, if as is normally the case, the record media inserted at the read/write station has been previously utilized, the code key 220 plus the erase key should be depressed prior to the placement of the automatic writing system in the record mode and any of the previously outlined steps which are associated with the recording of a referenced code so that the material to be recorded on the variable record media is recorded over previously recorded information on the record media. Of course, if the variable record media has been previously used but has sufficient unused space thereon to accommodate the preparation of the variable record media, the code key 220 and the erase key would not be depressed in combination so that when the automatic writing system was placed in the record mode, the system would automatically search the record media, in the manner des-cribed above, until the end of record character recorded thereon was located and recording of new information would start at this point. Once the record media to be employed as the variable record media has been loaded at the read/write record media station, the automatic writing system according to the present invention has been placed in the record mode, the code print key has been depressed and an appropriate :, ~ . - : . ~ , ~05'~91~
block address for the material which is to constitute the subject matter of the variable record media has been recorded, recoding of the variable record media would proceed as follows:
1. Record by inserting information from the keyboard corresponding to the name and address of the first party for whom a standard letter is to be prepared. For instance:
Mr. Norman E. Berson 2966 South Orange Rd San Beradino, California 94211 2. Record a switch code by depressing the code key 220 and the switch key (~).
This switch code, as shall be seen, will transfer the play operation from the variable record media to the constant record media so that the word "Dear" will be palyed out therefrom.
3. Record Mr. Berson by inserting the appropriate character information from the standard keys on the keyboard in the same manner as would be done in a normal typewriting operation.
4. Record a switch code by depressing the code key 220 and the switch key (~).
This switch code will, as shall be seen 105Z9~ 1 below, transfer playback to the constant record media so that the body of the standard letter will play out thus completing a first letter to the first addressee.
5. Record from the keyboard in the conven-tional manner, the name and address information of the second addressee.
For instance:
Mr. John Doe 8 Eton Place Springfield, New Jersey D7081 6. Record a switch code by depressing the code key 220 and the switch key (~).
This switch code will act to transfer playback to the constant record media so that the word "Dear" as shall be seen hereinafter, will play out therefrom.
7. Insert from the keyboard Mr. D~e.
8. Record a switch code by depressing the code key 220 and the switch key (~).
This switch code will transfer playback to the constant record media so that the body of the letter will play therefrom.
9. Continue inserting name and address and surname information for the remaining addressees together with intervening switch codes in the same manner as lOS;~9~
outlined above.
10. At the completion of the recording operation for the variable record media release the record key by depressing the same, release the code print key by depressing the same and remove the variable record media which has been prepared.
Once the constant and variable record media have been prepared by the recording operations outlined above, a batched letter operation may be initiated so that the standard letter recorded on the constant record media is prepared and appropriately addressed for each individual addressee recorded on the variable record media so that a plurality of individually addressed standard letters are prepared. The batching operation may take place in the following manner:
l. Load the variable record media at one of the record media stations. For instance, the read/write record media station.
2. Search the variable record media for the block address utilized to identify the beginning portion of the address information inserted on the variable record media during the recording process.
This is done by setting the appropriate two digit block address at the thumb-105Z9li wheels 233 on the keyboard depicted in Figure 5 and depressing the search key enclosed within the dashed block 231.
3. Load the constant record media at the second reco:rd media station which in this case would be the lower or read only record media station.
4. Search the constant record media for the block address utilized during the recording mode to identify the recorded information associated with the standard letter. This is done by setting the appropriate block address at tbe thumb-wheels 233, depressing the alternate reader key enclosed within the dashed block 231 so that the search of the constant record media is identified to the microprocessor and subsequently depressing the search key enclosed within the dash block 231. At this juncture a batched letter operation may be initiated since both the variable and constant record media are at the start positions for the material recorded thereon, the automatic writing system is initialized to start a read mode of op-eration from the constant record media, .

105'~91~
due to the previous depression of the alternate reader key and all information required for the preparationof batched letters has been recorded on the constant ; 5 and variable record media.
5. Depress the play and auto keys. It should be noted that although a play mode has here been selected, a margin control mode of operation could also be utilized.
lQ As the automatic writing system according to the present invention has been already conditioned to start playback from the constant record media loaded at the read only record media station, playback will begin from the constant record media.
Referring now to the recording operation employed for the constant record media, it will be seen that the first character of information recorded thereon was a recording stop. Accordingly, no printing will result from Step 5 because as soon as automatic playback is initiated by the depression of the automatic action key, the recording stop code will be read and all playback and printing operations will terminate.
6. Load and appropriately position a piece ;

.- . , ~0529il of letterhead paper in the printer. This step is necessary prior to the preparation of each standard letter being prepared and it was for this reason that the first step in the recording of the constant record media was the recordation of a recording stop code.
7. Depress the automatic action key.
As playback is still conditioned to occur from the constant record media, the date information recorded in Step 2 of the recording operation and the four carriage return characters recorded in Step 3 of such operation will be played back and cause the date information to be printed on the sheet of letterhead paper followed by the four carriage returns which normally reside intermediate the date information and the name and address information associated with the party to whom the letter is to be sent. The next code read from the constant record media, as will be appreciated by reference to Step 4 in the recording operation outlined for the constant record media, will be the reading of a switch code.
This will cause, as aforsaid, the instant embodiment of the automatic writing system according to the present invention, to terminate playback from the constant record media loaded at the read only record media station and to initiate playback from the variable record media which was loaded at the read/write record media station. Accordingly, the variable record media loaded at the read/write record ~05~
media stalion is in its initial position, r~.r. Nor.man E. Berson 2966 South Orange Rd.
San Bernadino, California 94261 will play out ln the normal manner utillzed ln a letter and such information ~tlll play out ,along the lert hand mar~in and space,d by four character i~dices from the date lnformation due to the four character return codes prevlously read from the constant record media. After the name and address infor~ation initially recorded on the variable record media has been played, a switch code, as may be seen by reference to Step 2 of the recording operations for the variable record media wlll be read out. ~his terminates the playback operation from the variable record media loaded at the read/write record media station and initiates playback from the constant record media loaded at the read only record media station~ As the previous playback operation at the constant record ~edia terminated with the switch code recorded as Step 4, playback therefrom will begin with the two carriage return characters reco.rded at Step 5 of such recording operation to be followed by the playbac~ of the word "Dear" recorded during Step 6 of such recordin,~ operation.
After the word "Dear" has played bac~ and been printed, a switch code, recorded as Step 7 for the recording operation associated ~tith the constant record media ~ill be read which thereby terminates tne read operation at the constant record media and ~nitiates ~layb~ck ~rom the variable record media.

~ 304 _ . ~, . , . -l~S;~
As playback rrom the variable record media was previously terminated by a switch code, recorded during Step 2 of the recording operation therefor, playback from the variable record media begins with the reading and subsequent printing of the words "~lr. Berson", recorded during Step 3 of the recording operation for the variable record media an~ the playback of the words "Mr. Bers,on" is followed by the readin~
of the switch code recorded during Step 4 of such recording operation. When the switch code is read, playback at the variable record media is terminated and is initiated from the constant record media in the manner described previously.
When playbac~ is initiated at the constant record media, the colon recorded during Step 8 of the recordin~ ooeration therefor ls read and printed followed by the two carriage returns and the body of the standard letter together with the appropriate closing information so that the entire standard letter is printed. After the entire body of the standard letter has been played and printed in response to the information recorded and subsequently being read at the constant record media, a search code and the block address associated with the beginning portion of the standard letter information on the constant record media is read. This search code, it will be recalled, was recorded during Step 10 of the recording operation associated with the preparation f the const2nt record media. When the search code and block address recorded as a part of Step 10 of the recording operation associated with the preparation of the -~osZ9ll .
constant record media is read, the automatic ~riting system according to the present inventionJ acting under program control as aforesaid, will automatically go into a search mode of operation and perform a search for the pre-recorded block address on the constant record media.
Thus, a search operation will be initiated by the playback of the search code and block address which causes the constant record media to be searched and positioned at the beginning of the information recorded thereon associated ~ith the standard letter. Accordingly, it will be appreciated that one standard letter appropriately addressed to the first addressee recorded on the variable record media has been completed.
~7hen the search operation initiated by the search code and recorded block address on the constant record media is successfully completed, the automatic writin~
system still in the automatic playback mode, will read the first character recorded on the constant record media. As will be seen by reference to Step 1 of the recording operation outlined for the constant record media, this first character is a recording stop code. The recordin~ stop code, as described above, will cause automatic playback and any attendant printing to immediately stop. As the first standard letter has been appropriately prepared and individually addressed, it will be appreciated that the purpose of this stop code is to allow the previously prepared and appropriately addressed standard le-tter to be removed - 306 _ ~5'~91~

and a new sheet of letterhead stationery to be loaded and appropriately positioned within the printer unit. Thus, the batching process may continue as follows:
8. Load an appropriately positioned sheet of letterhead stationery in the printer.
9. Depress the automatic action keys so that the automatic playback and printing of the system will again be initiated.
As will be appreciated by those of ordinary skill in the art, the automatic preparation of an appropriately addressed standard letter will take place in the same manner described above with the exception that as the variable record media has not been returned to its initial position, the second set of name and address information, in this case associated with the name John Doe, will be printed on the second standard letter prepared as switching between the read only record station and the read/write record station at which the variable record media is loaded will take place in the same manner outlined above except that the letter prepared during the second cycle of operation will be addressed to John Doe and Dear Mr. Doe will be inserted in such letter. This occurs, since the standard letter information is re-read from the constant record media in the same manner outlined above while switching with respect to the variable record media takes place for the address and name information associated with John Doe rather than for Norman E. Berson as occurred during the initiai cycle.

~ . . . . - ~ ..

MANDES OU BREVETS VOLUMINEUX
.

LA PRÉSENTE PARTIE DE CETTE DEMANDE OU CE BREVET
COMPREND PLUS D'UN TOME.

NOTE: Pour les tomes additionels, veuillez contac~er le Bureau canadien des brevets ......

JUMBO AF9PI ICATIONS/PATENTS :

THIS SECTION OF THE APPLICATION/PATENT CONTAINS MORE
THAN ONE VOLUME

THIS IS VOLUME ,~ OF ~

NOTE: For additional volumes please contact the Canadian Patent Office .

- . ... . . . ..
.. . - ,' . ` ~

, ~
: ~' '' '' .' ... '-

Claims (47)

THE EMBODIMENTS OF THE INVENTION IN WHICH AN EXCLUSIVE
PROPERTY OR PRIVILEGE IS CLAIMED ARE DEFINED AS FOLLOWS:

1. A word processing system having a plurality of different modes in which words may be processed, comprising:
a common data bus for conveying character information in a bit parallel format throughout the entire system;
a keyboard peripheral for providing character information to be further processed, the keyboard peripheral being connected to said common data bus and applying, when active, character information in a bit parallel format thereto;
a printer peripheral for receiving character informa-tion from said common data bus and being capable of printing alphanumeric character representations and achieving print position displacements and document indexing functions in response to the received character information, said printer peripheral being connected to said common data bus and receiving character information in a bit parallel format therefrom;
a record medium peripheral for receiving character information from said common data bus for storage by a record medium and for applying character information to said common data bus from storage by a record medium, said record medium peripheral being connected to said common data bus and being adapted to exchange character information in a bit parallel format therewith;
a buffer peripheral for accumulating character infor-mation in a bit parallel format, said buffer peripheral being connected to said common data bus and exchanging character information in a bit parallel format therewith;
a character register connected to said common data bus for accepting character information in a bit parallel format on one by one basis from said common data bus and supplying character information in a bit parallel format thereto; and means for transferring character information through said common data bus from one peripheral to another peripheral in accordance with a mode of word processing which has been selected, said transferring means including an arithmetic logic unit; and a common instruction word bus connected to each of said peripherals for transmitting instructions thereto from the character information transferring means;
each transfer of character information being achieved by entering each character of information from said one peripheral into said character register via said arithmetic logic unit, and said character register acting upon said entered character information whereby either to supply it to said common data bus for application to said another peripheral or to return it to said arithmetic logic unit for logical operation thereupon, the action of said character register being in response to instructions supplied thereto by the common instruction word bus.

2. A word processing system according to Claim 1, which additionally comprises a common status bus connected to each of said peripherals for providing, to the character information transferring means, signals representative of the status of the peripherals.

3. A word processing system according to Claim 2, wherein the character information transferring means includes a read only memory programmed to organize the transfer of character information throughout the system.

4. A word processing system according to claim 3, wherein means for addressing the read only memory is connected to the instruction word bus and the common status bus and addresses the read only memory in response to signals received from the common instruction word bus and the common status bus.

5. A word processing system according to Claim 4, wherein said arithmetic logic unit is capable of comparing constants read from said read only memory with character information derived from a peripheral.

6. A word processing system according to Claim 1, wherein said transfer means includes a read only memory, addressing means therefor, arithmetic logic unit and character register forming a central processor for the system.

7. A word processing system according to Claim 6, wherein said processor is a microprocessor.

8. A word processing system according to Claim 2, wherein the keyboard peripheral is connected to the common data bus, the common status bus, and the common instruction word bus through a keyboard interface, said interface (i) monitoring the status of a plurality of conditions at the keyboard and applying signals representative of such status conditions, on a command basis, to the common status bus, (ii) receiving information generated at the keyboard and applying signals representative thereof to the common data bus, and (iii) receiving signals representative of instruc-tions from the common instruction word bus and decoding the instruction signals to provide control signals for the keyboard.

9. A word processing system according to Claim 8, wherein the keyboard interface includes a bidirectional gating arrangement, connected between the keyboard and the common data bus, having a directivity controlled by instructions decoded from the common instruction word bus.

10. A word processing system according to Claim 2, wherein the printer peripheral is connected to the common data bus, the common status bus, and the common instruc-tion word bus through a printer interface, said printer interface (i) monitoring the status of a plurality of conditions at the printer and applying signals representative of such status conditions, on a command basis, to the common status bus, (ii) receiving signals representative of instructions from the common instruction word bus and decoding the instruction signals to provide control signals for the printer, and (iii) receiving signals representative of data from the common data bus and generating therefrom information, including alphanumeric character information, for application to the printer.

11. A word processing system according to Claim 2, wherein the buffer receives and transmits character infor-mation through the common data bus from and to the character register in response to instruction signals received on the common instruction word bus.

12. A word processing system according to Claim 11, wherein the buffer comprises shift register means to receive and store character information.

13. A word processing system according to Claim 12, wherein the shift register means is arranged in recirculating configuration and contains a sufficient number of stages at least to accomodate character information representative of the length of a typical line of word information to be processed.

14. A word processing system according to Claim 2, wherein said record medium peripheral includes a parallel/
serial converter for converting bit parallel format character information received from the common data bus into bit serial format for storage on a record medium in bit serial format, and a serial/parallel converter for converting bit serial format character information stored on a record medium into bit parallel format for transmission to the common data bus in bit parallel format.

15. A word processing system according to Claim 14, wherein the record medium peripheral is arranged to store character information on magnetic tape in said bit serial format.

16. A word processing system according to Claim 14, wherein, when it is desired to store character information on a record medium, character information is accumulated in said buffer until a line of such information is so accumulated, and the accumulated line of character information then transferred to the record medium peripheral for storage.

17. A word processing system according to Claim 16, wherein, when it is desired to read-out character information stored on a record medium, character information is read-out of the record medium on a per-line basis and is stored in the buffer, a line at a time, for subsequent processing by the system.

18. A word processing system according to Claim 1, wherein one of the modes of word processing is a record mode of operation in which, when activated, character information generated at the keyboard is transferred to the printer, where it is printed, and to the buffer, where it is accumulated on a per-line basis and subsequently transferred, a line at a time, to the record medium peripheral where it is stored on a record medium.

19. A word processing system according to Claim 1, wherein one of the modes of word processing is a print mode of operation in which, when activated, character information generated at the keyboard is transferred to the printer where it is printed and wherein no record medium storage of the gener-ated information is made.

20. A word processing system according to Claim 1, wherein one of the modes of word processing is a play mode of operation in which, when activated, character information stored on a record medium is transferred to the buffer where it is accumulated on a per-line basis and accumulated character information in the buffer is then transferred a character at a time to the printer where it is printed.

21. A word processing system according to Claim 1, wherein one of the modes of word processing is a revise mode of operation in which, when activated, character information stored on a record medium is transferred to the buffer where it is accumulated on a per-line basis, accumulated character information in the buffer is transferred a character at a time to the printer where it is printed and back to the buffer where it is again accumulated, provided that any character information requiring to be revised is not printed nor again accumulated but is substituted with revised character information which is generated at the keyboard and transferred to the buffer for accumulation and printer for printing whereby the revised character information is accumulated and printed in correct sequence with any character information which did not require revision, and the contents of the buffer (a line including revised character information) are transferred to the record medium peripheral where it is stored in place of the originally stored line of character information that needed revision.`

22. A word processing system according to Claim 21, wherein the line including revised character information is stored on the record medium at the location previously occupied by the originally stored line of character information that needed revision.

23. A word processing system according to Claim 1, wherein one of the modes of word processing is a search mode of operation in which, when activated, an address of a block of character information stored on a record medium is entered at the keyboard and the record medium is searched for the correct address so that the addressed block of information may be processed by the system.

24. A word processing system according to Claim 23, wherein said search is conducted by comparing said address entered at the keyboard with the address of a block of character information stored on the record medium currently in communica-tion with the system, indexing the block of character information in communication with the system and thereby indexing the address being compared with the address entered at the keyboard, and terminating the indexing when a favorable comparison of addresses is obtained.

25. A word processing system according to Claim 1, wherein the record medium peripheral is arranged to record character information on a magnetic record medium in bit serial format and wherein each line of character information is stored on the record medium in the bit serial format interspaced by an interline gap from adjacent lines of character information.

26. A word processing system according to Claim 25, wherein at least one preamble character is stored on the record medium following each interline gap and prior to the serially-recorded line of character information, the at least one preamble character being spaced from the serially-recorded line of charac-ter information by a preamble gap.

27. A word processing system according to Claim 25, wherein, when a line of character information is generated by the keyboard and is serially-recorded on the record medium in a record mode of operation, an interval is provided on the record medium subsequent to the serially-recorded information to provide a facility for expanding the amount of character information recorded, by revision thereof, without the revised, serially-recorded line of character information overlapping with other information recorded on the medium.

28. A word processing machine according to Claim 25, wherein lines of recorded character information on a record medium are grouped into blocks of information, each block of information being preceded by an interblock gap and by block address information, each interblock gap being distinguishable from any other gaps on the record medium between information by means of length, and the block address information including a first recorded character indicating to the system that it is a block address and a second recorded character representing the actual address of the block.

29. A system according to Claim 1, wherein the record medium peripheral is arranged in two sections: a first section being a read/write section which is capable of writing (storing) character information on a record medium associated with that section and which is capable of reading (transmitting to the system) character information stored on a record medium associated with that section, and a second section being a read only section which is capable of reading (transmitting to the system) character information stored on a record medium associated with that section.

30. A system according to Claim 29, wherein the buffer comprises a read only section which is arranged to accumulate character information transmitted thereto from the record medium peripheral, and a read/write section which is arranged to accumu-late information transmitted by the keyboard peripheral or by the read only section of the buffer.

31. A system according to Claim 29, wherein one of the modes of word processing is a transfer mode of operation in which, when activated, character information stored on a record medium is transferred from the read only section of the record medium peripheral to the buffer where it is accumulated on a per-line basis, and accumulated character information in the buffer is then transferred a character at a time to another position in the buffer where it is accumulated on a per-line basis, and character information in the said another position in the buffer is transferred, a line at a time, to the read/
write section of the record medium peripheral where it is stored by a different record medium.

32. A system according to Claim 31, wherein the option is provided for character information to be generated at the keyboard and stored in the said another position of the buffer, together with character information obtained from the the read only section of the record medium peripheral.

33. A system according to Claim 32, wherein the character information being accumulated in the said another position of the buffer is printed by the printer.

34. A word processing system according to Claim 1, wherein one of the modes of word processing is a margin control mode of operation in which, when activated, a right hand margin to be honored by the printer is defined at the keyboard, a margin zone of defined character width to be established adjacent to and to the left of the right hand margin defined is selected, the print position of the printer relative to the margin zone is monitored, and, if a carriage return, hyphen or other charac-ter information capable of being modified into a carriage return is detected to be printed in said margin zone, a carriage return is appropriately executed, but if no such carriage return, hyphen or other character information capable of being modified into a carriage return is detected by the system the operator is alerted to enable a manual selection of the carriage return position to be made.

35. A word processing system according to Claim 34, wherein, upon entry of the print position into the margin zone, said character information transferring means conducts a review of character information to be read from the buffer until a carriage return, hyphen, or other character information capable of being modified into a carriage return is detected, and if the number of characters detected in said review does not exceed the margin zone width the characters are transferred from the buffer to the printer for printing and a carriage return is appropriately executed in the margin zone, but if the number of characters detected in said review does not exceed the margin zone width the characters are maintained in the buffer and the operator alerted to enable a manual selection of the carriage return position relative to the remaining characters to be made.

36. A method of word processing in an automatic word processing system wherein alphanumeric character infor-mation is entered at a keyboard peripheral and applied to a destination peripheral via a common data bus under the control of a character information transfer means interconnecting said peripherals by means of a common instruction word bus in accordance with a one of a plurality of different word processing modes that may be performed comprising the steps of:
(a) generating character information in a parallel bit format at a keyboard peripheral for each depression of the key thereat, (b) applying the character information to a common data bus for transmission to and for insertion on a one by one basis into a character register via an arithmetic logic unit in parallel bit format, (c) inspecting, on a per-character basis, the character information inserted in the character register in response to instructions supplied from the common instruction word bus to ascertain whether it comprises alphanumeric character information for application to selected one of said designation peripherals or should be returned to the arithmetic logic unit for logical operation thereupon.

37. A method according to Claim 36, including the steps of:
(a) inspecting, on a per-character basis, the character information inserted in the character register to ascertain whether it comprises alphanumeric character information for printing at a printer peripheral or storing at a record medium peripheral, (b) applying the character information so inspected to said common data bus, and either:
(i) a) loading the character information so inspected into buffer means in parallel bit format and accumu-lating the same until a complete line of character information has been inserted therein, and (i) b) removing the character information in parallel bit format from said buffer means at a rate compatible with a selected record medium peripheral via said common data bus through the inspecting character register, or (ii) a) transmitting the character information via said common data bus to the printer peripheral for printout of said character information.

38. A method according to Claim 37, including the steps of:
a) energizing the record medium peripheral and bringing a record medium thereat to appropriate recording speed when complete line of character information has been loaded into said buffer means, b) reading character information in parallel bit form from said buffer means through said common data bus to said inspecting character register until a complete line of character information loaded into said buffer means has been read, c) applying each character loaded into said character register to said common data bus in parallel bit format for supplying to record medium peripheral and recording on said record medium, and d) de-energizing said record medium peripheral after a complete line of character information previously loaded into said buffer means has been so read.

39. A method according to Claim 38, wherein the lines of character information are recorded on said record medium interspaced by interrecord gaps having a length equal to at least an interval on the record medium corresponding to that necessary to de-energize the record medium peripheral subsequent to recording or necessary to bring a record medium loaded thereat to appropriate recording speed prior to recording.

40. A method according to Claim 38; wherein each line of character information recorded on the record medium is initiated and terminated by a short interrecord gap and each block of line information recorded is separated by an inter-record gap substantially longer than that separating lines of character information and that a digital code representing a block number is recorded at the end of each block interrecord gap and prior to the recording of any further character infor-mation.

41. A method according to Claim 39 or 40, wherein following each interrecord gap between recorded lines of character information, a preamble character code followed by a preamble gap is provided to respectively provide a logical reference indication when the record of character information commences and provide sufficient time a word processing function to be applied to the line of character information.

42. A method according to Claim 37, wherein the loading of each character in a line of character information onto said common data bus from said buffer is accomplished on a first-in first-out basis.

43. A method according to Claim 37, including the steps of:
a) assigning a multi-bit code having at least one bit present therein in a first condition for each alphanumeric character to be processed, the remaining ones of the bits in each multi-bit code assigned being in respective first and second conditions for defining the alphanumeric character associated therewith;

b) generating the assigned multi-bit code for each alphanumeric character to be processed;
c) generating an underscore character code whenever an alphanumeric character being processed is to be underscored;
and d) changing from a first to a second condition said one bit in the multi-bit code assigned to an alphanumeric character to be underscored whenever processing operations associated with said alphanumeric characters to be underscored require a recordation thereof on a record medium whereupon an underscored alphanumeric character code may be recorded.

44. A method according to Claim 43, including the steps of:
a) inspecting the condition of said one bit when reading multi-bit codes from said record medium, b) apply displacement code information to said printer peripheral to cause printer escapement subsequent to character printing if said inspected bit is in a first condition, and c) applying an underscore code followed by displace-ment code information to said printer peripheral if said inspected bit is in a second condition to cause an underscore character to be printed beneath the printed character and subsequent escapement of said printer peripheral whenever a multi-bit code representing an underscored character is read.

45. A method according to claim 37, wherein a sector comprising each line of character information recorded on and retrievable from the record medium at the record medium peripheral includes recording on the medium a preamble portion for identifying the location and beginning position of each line sector and providing a preamble gap before each line sector but after each preamble portion to facilitate the read and record operations of the record medium peripheral to begin to commence such operations at the same beginning position relative to said preamble portion.

46. A method according to claim 37, wherein each of said line sectors including its associated preamble portion are separated by an interline gap.

47. A method according to claim 37, wherein the storage of data in individually recorded and retrievable data blocks on a recording medium at the record medium peripheral includes recording an interblock gap for identifying a plurality of data sectors, recording after said interblock gap and in association therewith a plurality of uniform length data sectors each identifiable from said interblock gap and individually retrievable for read and record operations and providing a gap before and after each data sector to facilitate said read and record operations of a data sector to facilitate said read and record operations of a data sector without affecting adjacent data sectors.