CA1038068A - Semiconductor channel switch - Google Patents
Semiconductor channel switchInfo
- Publication number
- CA1038068A CA1038068A CA203,636A CA203636A CA1038068A CA 1038068 A CA1038068 A CA 1038068A CA 203636 A CA203636 A CA 203636A CA 1038068 A CA1038068 A CA 1038068A
- Authority
- CA
- Canada
- Prior art keywords
- gate
- switch
- circuit means
- circuit
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/52—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements
- H04Q3/521—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker using static devices in switching stages, e.g. electronic switching arrangements using semiconductors in the switching stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/72—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region
- H03K17/735—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Interface Circuits In Exchanges (AREA)
- Thyristor Switches And Gates (AREA)
Abstract
SEMICONDUCTOR CHANNEL SWITCH
ABSTRACT OF THE DISCLOSURE
A plurality of PNPN switches, each permitting current flow in either, i.e. positive or negative, direction, are arranged at the cross points between the rows and the columns of the speech paths so as to form a matrix. The gate trigger terminal of each PNPN
switch is connected with a gating current circuit having a high impedance, which circuit is adapted to control ON and OFF operations of the switch. A plurality of means are provided to selectively turn the gate current circuits on and off so that gate current is supplied continuously for the gate terminal of any desired PNPN
switch at least for the time during which the corres-ponding cross point of the matrix is to be electrically bridged.
ABSTRACT OF THE DISCLOSURE
A plurality of PNPN switches, each permitting current flow in either, i.e. positive or negative, direction, are arranged at the cross points between the rows and the columns of the speech paths so as to form a matrix. The gate trigger terminal of each PNPN
switch is connected with a gating current circuit having a high impedance, which circuit is adapted to control ON and OFF operations of the switch. A plurality of means are provided to selectively turn the gate current circuits on and off so that gate current is supplied continuously for the gate terminal of any desired PNPN
switch at least for the time during which the corres-ponding cross point of the matrix is to be electrically bridged.
Description
~.~3~Q68 1 The present invention relates especially to the transistorization of a channel switch for use in a telephone exchange. r Most of the attempts which have hitherto been made to transistorize the channel switch used in a telephone exchange9 resort to the use of PNPN
switches (referred to as thyristors or SCR). A PNPN
switch has a comparatively small impedance in its conducting state and a high insulating resistance in the cut-off state5 and moreover, once it is turned on even with a small gate signal~ it remains conductive until the load or main current is interrupted~ that is~
the swi~ch has a self-holding action. Hence~ such a PNPN swltch is very use~ul 1~ it is used as an elect-ronic device in the electronic speech path of atelephone exchange. With a telephone exchange, however, since the ringing (bell signal) is in the form of a high a.c. voltage, the speech path must permit current to flow in either9 positive or negative, direction, and moreover since the current is interrupted usually by dialing and hooking operationsg th~ channel switch must be closed even during the operations. Accordingly, the self-holding action of the PNPN switch cannot be fully utilized in this sort of applications and in the past~ dialing and ringing signals has been separately treated while only a speech signal (small sLgnal) super-posed upon a d-c- signal has been processed by the PNPN
switch.
It is thPrefore one object of the present invention to provide a semiconductor channel switch t ~3~
which can directly treat the speech signal~ dialing and hooking signals~ and a ringing signal together.
In accordance with the foregoing objects, there is provided a semiconductor channel switch for connecting two points between which a communication path is to be established comprising;
gate control type PNPN switch means comprising a pair of PNPN switches each having a gate terminal and a self-holding action and connected in anti-paraliel configuration, gate current circuit means for operatively providing a constant current to the gate terminals o~ said pair switches during its ON state and means for preventing reverse current flow in tne circuit of said gate term:inals, said gate current circuit means haviny high impedance and controlled to the ON
or OFF state;
memory circuit means connected to said gate current circuit means and controlled to a set or reset state for main-taining said gate current circuit means in the ON or OFF state in accordance with its set or reset state, respectively; and selecti~g circuit means for setting and resetting said memory circuit.
Other objects, features and advantages of the present invention will be apparent when one reads the following description of the preferred embodiments in conjunction with the accompanying drawings~ in which:
Fig. 1 shows the structure of a basic unit of a first embodiment Or the present invention;
Fig. 2 shows t~e structure of a basic unit Or a second embodiment o~ the present invention; and . ~ -2-~,~
~Q3~ 6~
Fig. 3 shows a structure of a 2 x 2 balanced type switch fabricated according to the present inven-- tion.
In Fig. 1 showing a basic structure Or a semiconductor channel switch as one embodiment of the present invention, a gate control type bidirectional PNPN switch 1 has its main terminals Tl and T2 connected respectively with speech paths Xi and Yj and is disposed at a cross point of a row and a column of a channel matrix as well as each of the other PNPN switches (not shown) is disposed at each cross point thereo~. The gate terminal G o~ the switch 1 is connected through a diode 2 for preventi~g reverse current ~'low with a gate current clrcuit 3 having a high impedance with ¦ respect to alternating current. The diode 2 may be omitted if the gate current circuit itself 3 is pro~ided with a means to block the reverse current. The gate current circuit 3 is controlled by a memory ~, which is set and reset by a cross-point selecting circuit 5.
In the embodiment shown in Fig. 1~ the memory 4 is :
-2a-~03~30~;~
l a flip-flop and the cross-point seIecting circuit 5 is a circuit which can set or reset the memory 4 in accordance with the logical product of the signals on select channels xi and y; or xi and yj~ When pulse signals appear simulta~eously on the select channels Xi and yj~ the memory 4 is set so that the gate current circuit 3 starts continuously delivering a gating current to turn on the switch l. If the memory ~ is reset according to the logical product of the signals on ; lO the select channels xi and y;~ the gate current circuit 3 stops supplying the gating currentO Howe~er~ the I switch l must be opened by another artl~ice ~ince it ha~ a self-holding action as descrlbed above. In most practical cases~ the speech current is interrupted by the hook switch of a telephone unit upon completion of conversation, and no special control is needed.
The unit structures as described above, one of which is shown in Fig. l, are combined in the form of an m ~ n matrix with each pa1r of incoming and outgoing speech paths wired in the form of a balanced circuit.
The respective elements of the structure shown in Flg. 1 will now be described in further detail.
m e gate controlled type bidirectional PNPN
¦ switch refers to one which has a control gate terminal ¦ 25 and permits the bidirectional flows of current and a switch called "triac" is a typical example thereof.
The same function can also be obtained by a pair of ordinary PNPN switches connected in antiparallel configuration. The exclusive use of the PNPN switch is due to the fact that it has an advantage of low ~38()6~3 1 conduction impedance and high insulating resistance as mentioned above 9 that it has a much better charac-teristic superior to a transistor or other elements since it has a high breakdown voltage against current 1 5 in either direction when it is used in the circuit of f the present invention in which alternating current as well-as direct current is treated~ and that its self- ;
holding action can be utilized~ as described later~
for a certain distribution of potentials on the speech 10 channels.
, ,' The reason why a memory means such as memory 1 4 is provided while the switch is provided wikh a self~
, hoIding action~ i9 that the gate current circult 3 , is to be aIways at operation so as to immediately , 15 supply current for speech paths without receiving pulses again from the select channel when the speech paths , are restored even in case where the switch 1 is turned off since the channel,current temporarily becomes zero ¦ due to hooking or dlaling or due to the instantaneous ~' 20 disappearance of current as in an alternating current.
The purpose of the.gate current circuit 3 ~ having a high impedance is to prevent the speech signal 3 from leaking out through the gate G or into another t circuit during conversation for which the circuit 3 l 25 is at a operation and the amplitude or variation of -,l the value of the gating current causes no problem if it is large enough to actuate the switch. In general~
~, a simply designed constant-current circuit will suffice for the purpose.
The cross-point selectlng circuit 5 may be _ L~ _ ~3~ 6~
1 so designed as to be set and reset by another selecting . circuit9 as in the embodiment shown in Fig. 1, or as to be automatically reset when any other cross-point is selected, depending upon the purposes of channel ~ r switchesO The gate current circuit 3 and the memory .4 are provided for each cross-point while a part of the cross point selecting circuit 5 may be commonly used for a matrix of the speech pathsO
In a circuit using the commercial a.c. supply~
1 10 a pulsating gating current in synchronism with the I alternating current may be usually suppl~ed for the A~ ~
bidirectional PNPN switch. Howe~er~ since the bell signal or the dialing and hooking signals are usually asynchronous with the alternating current or take place . 15 unexpectedly~ the control circuit which performs the pulse control by continuously supervising these signals must be necessarily provided in a complicated circuit configuration and therefore not effective.
When the memory 4 is set and the PNPN switch 1 becomes conductive, the potentials at the channels Xi and Yj sometimes exceed the upper limit voltage obtainable by the gate current circuit 3. This condi tion will occur if the terminals Xi and Yj are connected respectively with a high positive voltage source and.
a load resistance. In this case, the conduction between .I the terminals Xi and Yj is maintained onl~ through the self-holding action of the switch 1 and the gating current is substantially zero although the gate current circuit 3 is at operation and in a limiting case the reverse current would flow without the diode 2. However, it is ~ . .
~03130~B
1 possible for the gate current to flow i~ediately if the PNPN switch 1 is turned off for some cause or other.
Therefore~ in this specification, the meaning of "to cause the gating current to flow continuously" involves the state where the circuit 3 is operating ko supply the gating current though the gating current cannot flow actually.
. Fig. 2 shows the structure of a basic unit o~ a semiconductor channel switch as a second embodi-o ment of the present invention~ the basic unlt beingassociated ~ith a cross-point of the channel swltch, 1 as described with F~g. 1. In Fig. 2~ ordlnary PNPN
: switches 11 and 12, each ha~ing a gate control terminal~
are connected in antiparallel configuration w th each : 15 other to form a bidirectional PNPN switch. Diodes 21 and 22 are connected with the respective gate terminals of the PNPN switches 11 and 12 to pre~ent the reverse currentO A gate current circuit 3 shown here is the same as that shown in Fig~ 1 but the memory 4 and the cross point selecting circuit 5 are replaced by a set-preference flip-flop 6. With this structure, when pulse signals appear simultaneously on the select channels Xi and yj~ the set-preference flip-flop 6 is set so . that the gate current circuit 3 starts delivering continuous gating current to turn on the switches 11 and 12. When a pulse signal again appears on the select channel y~ for the selection of another cross-point, the set-preference flip-flop 6 is reset. This circuit configuration shown in Fig. 2 needs no select channel for reset tcorresponding to the channel xi in ~ .
~L~33~61~
1 Figo 1) and therefore has an advantage that the number of the select channels is comparatively small for its capacity9 so that the structure is very useful for use in a semiconductor channel switch of an electronic. ' telephone exchange. These unit structures, one of which is shown in Fig. 2~ are combined in the form of an m x n matrix with each pair of an incoming and an outgoing speech paths in the form of a balanced circuit~ ~
~` 10 Fig. 3 shows a case where the unit s-tructures , according to the present invention are wired in the I form o~ a balanced t~pe 2 x 2 matrix. In Fig. 3~ the cross-point selecting circuit etc. are omitted for the simplicity of the figureO As shown in Fig. 3~ the channel switch is usually constructed in the form of :
an m x n matrix ~ith each pair of an incoming and an outgoing paths (line A and line B) wired in a balanced circuitO In this case9 a memory M has to be provided ~or each cross-point but since the potentials at the lines A and B are different from each other, two separate gate current circuits must be provided respectively for the line~ A and B.
As described above9 the semiconductor channel switch according to the present invention can treat~
in the same manner as the conventional mechanical channel switch does~ the ringing~ dialing and hooking signals together with the speech signal.
Moreover, in the above embodiments, it ls assumed that the PNPN switch is turned on by feeding current into the gate, but if it is desired to turn on : ~Q3~(~6f3 1 the switch by drawing current from the gate, it is only necessary to invert the senses of the gate current circuit and the associated diodes. Further, each of such elements need not be in the form of an integraliy rabricated part but has only to be composed of dis crete parts connected with one another by wires.
.
,, , I
~; '' ', ' .... Il , . I . , !
. ' ' ,, . ~ . .
i . , , ' ' , ~ , .
switches (referred to as thyristors or SCR). A PNPN
switch has a comparatively small impedance in its conducting state and a high insulating resistance in the cut-off state5 and moreover, once it is turned on even with a small gate signal~ it remains conductive until the load or main current is interrupted~ that is~
the swi~ch has a self-holding action. Hence~ such a PNPN swltch is very use~ul 1~ it is used as an elect-ronic device in the electronic speech path of atelephone exchange. With a telephone exchange, however, since the ringing (bell signal) is in the form of a high a.c. voltage, the speech path must permit current to flow in either9 positive or negative, direction, and moreover since the current is interrupted usually by dialing and hooking operationsg th~ channel switch must be closed even during the operations. Accordingly, the self-holding action of the PNPN switch cannot be fully utilized in this sort of applications and in the past~ dialing and ringing signals has been separately treated while only a speech signal (small sLgnal) super-posed upon a d-c- signal has been processed by the PNPN
switch.
It is thPrefore one object of the present invention to provide a semiconductor channel switch t ~3~
which can directly treat the speech signal~ dialing and hooking signals~ and a ringing signal together.
In accordance with the foregoing objects, there is provided a semiconductor channel switch for connecting two points between which a communication path is to be established comprising;
gate control type PNPN switch means comprising a pair of PNPN switches each having a gate terminal and a self-holding action and connected in anti-paraliel configuration, gate current circuit means for operatively providing a constant current to the gate terminals o~ said pair switches during its ON state and means for preventing reverse current flow in tne circuit of said gate term:inals, said gate current circuit means haviny high impedance and controlled to the ON
or OFF state;
memory circuit means connected to said gate current circuit means and controlled to a set or reset state for main-taining said gate current circuit means in the ON or OFF state in accordance with its set or reset state, respectively; and selecti~g circuit means for setting and resetting said memory circuit.
Other objects, features and advantages of the present invention will be apparent when one reads the following description of the preferred embodiments in conjunction with the accompanying drawings~ in which:
Fig. 1 shows the structure of a basic unit of a first embodiment Or the present invention;
Fig. 2 shows t~e structure of a basic unit Or a second embodiment o~ the present invention; and . ~ -2-~,~
~Q3~ 6~
Fig. 3 shows a structure of a 2 x 2 balanced type switch fabricated according to the present inven-- tion.
In Fig. 1 showing a basic structure Or a semiconductor channel switch as one embodiment of the present invention, a gate control type bidirectional PNPN switch 1 has its main terminals Tl and T2 connected respectively with speech paths Xi and Yj and is disposed at a cross point of a row and a column of a channel matrix as well as each of the other PNPN switches (not shown) is disposed at each cross point thereo~. The gate terminal G o~ the switch 1 is connected through a diode 2 for preventi~g reverse current ~'low with a gate current clrcuit 3 having a high impedance with ¦ respect to alternating current. The diode 2 may be omitted if the gate current circuit itself 3 is pro~ided with a means to block the reverse current. The gate current circuit 3 is controlled by a memory ~, which is set and reset by a cross-point selecting circuit 5.
In the embodiment shown in Fig. 1~ the memory 4 is :
-2a-~03~30~;~
l a flip-flop and the cross-point seIecting circuit 5 is a circuit which can set or reset the memory 4 in accordance with the logical product of the signals on select channels xi and y; or xi and yj~ When pulse signals appear simulta~eously on the select channels Xi and yj~ the memory 4 is set so that the gate current circuit 3 starts continuously delivering a gating current to turn on the switch l. If the memory ~ is reset according to the logical product of the signals on ; lO the select channels xi and y;~ the gate current circuit 3 stops supplying the gating currentO Howe~er~ the I switch l must be opened by another artl~ice ~ince it ha~ a self-holding action as descrlbed above. In most practical cases~ the speech current is interrupted by the hook switch of a telephone unit upon completion of conversation, and no special control is needed.
The unit structures as described above, one of which is shown in Fig. l, are combined in the form of an m ~ n matrix with each pa1r of incoming and outgoing speech paths wired in the form of a balanced circuit.
The respective elements of the structure shown in Flg. 1 will now be described in further detail.
m e gate controlled type bidirectional PNPN
¦ switch refers to one which has a control gate terminal ¦ 25 and permits the bidirectional flows of current and a switch called "triac" is a typical example thereof.
The same function can also be obtained by a pair of ordinary PNPN switches connected in antiparallel configuration. The exclusive use of the PNPN switch is due to the fact that it has an advantage of low ~38()6~3 1 conduction impedance and high insulating resistance as mentioned above 9 that it has a much better charac-teristic superior to a transistor or other elements since it has a high breakdown voltage against current 1 5 in either direction when it is used in the circuit of f the present invention in which alternating current as well-as direct current is treated~ and that its self- ;
holding action can be utilized~ as described later~
for a certain distribution of potentials on the speech 10 channels.
, ,' The reason why a memory means such as memory 1 4 is provided while the switch is provided wikh a self~
, hoIding action~ i9 that the gate current circult 3 , is to be aIways at operation so as to immediately , 15 supply current for speech paths without receiving pulses again from the select channel when the speech paths , are restored even in case where the switch 1 is turned off since the channel,current temporarily becomes zero ¦ due to hooking or dlaling or due to the instantaneous ~' 20 disappearance of current as in an alternating current.
The purpose of the.gate current circuit 3 ~ having a high impedance is to prevent the speech signal 3 from leaking out through the gate G or into another t circuit during conversation for which the circuit 3 l 25 is at a operation and the amplitude or variation of -,l the value of the gating current causes no problem if it is large enough to actuate the switch. In general~
~, a simply designed constant-current circuit will suffice for the purpose.
The cross-point selectlng circuit 5 may be _ L~ _ ~3~ 6~
1 so designed as to be set and reset by another selecting . circuit9 as in the embodiment shown in Fig. 1, or as to be automatically reset when any other cross-point is selected, depending upon the purposes of channel ~ r switchesO The gate current circuit 3 and the memory .4 are provided for each cross-point while a part of the cross point selecting circuit 5 may be commonly used for a matrix of the speech pathsO
In a circuit using the commercial a.c. supply~
1 10 a pulsating gating current in synchronism with the I alternating current may be usually suppl~ed for the A~ ~
bidirectional PNPN switch. Howe~er~ since the bell signal or the dialing and hooking signals are usually asynchronous with the alternating current or take place . 15 unexpectedly~ the control circuit which performs the pulse control by continuously supervising these signals must be necessarily provided in a complicated circuit configuration and therefore not effective.
When the memory 4 is set and the PNPN switch 1 becomes conductive, the potentials at the channels Xi and Yj sometimes exceed the upper limit voltage obtainable by the gate current circuit 3. This condi tion will occur if the terminals Xi and Yj are connected respectively with a high positive voltage source and.
a load resistance. In this case, the conduction between .I the terminals Xi and Yj is maintained onl~ through the self-holding action of the switch 1 and the gating current is substantially zero although the gate current circuit 3 is at operation and in a limiting case the reverse current would flow without the diode 2. However, it is ~ . .
~03130~B
1 possible for the gate current to flow i~ediately if the PNPN switch 1 is turned off for some cause or other.
Therefore~ in this specification, the meaning of "to cause the gating current to flow continuously" involves the state where the circuit 3 is operating ko supply the gating current though the gating current cannot flow actually.
. Fig. 2 shows the structure of a basic unit o~ a semiconductor channel switch as a second embodi-o ment of the present invention~ the basic unlt beingassociated ~ith a cross-point of the channel swltch, 1 as described with F~g. 1. In Fig. 2~ ordlnary PNPN
: switches 11 and 12, each ha~ing a gate control terminal~
are connected in antiparallel configuration w th each : 15 other to form a bidirectional PNPN switch. Diodes 21 and 22 are connected with the respective gate terminals of the PNPN switches 11 and 12 to pre~ent the reverse currentO A gate current circuit 3 shown here is the same as that shown in Fig~ 1 but the memory 4 and the cross point selecting circuit 5 are replaced by a set-preference flip-flop 6. With this structure, when pulse signals appear simultaneously on the select channels Xi and yj~ the set-preference flip-flop 6 is set so . that the gate current circuit 3 starts delivering continuous gating current to turn on the switches 11 and 12. When a pulse signal again appears on the select channel y~ for the selection of another cross-point, the set-preference flip-flop 6 is reset. This circuit configuration shown in Fig. 2 needs no select channel for reset tcorresponding to the channel xi in ~ .
~L~33~61~
1 Figo 1) and therefore has an advantage that the number of the select channels is comparatively small for its capacity9 so that the structure is very useful for use in a semiconductor channel switch of an electronic. ' telephone exchange. These unit structures, one of which is shown in Fig. 2~ are combined in the form of an m x n matrix with each pair of an incoming and an outgoing speech paths in the form of a balanced circuit~ ~
~` 10 Fig. 3 shows a case where the unit s-tructures , according to the present invention are wired in the I form o~ a balanced t~pe 2 x 2 matrix. In Fig. 3~ the cross-point selecting circuit etc. are omitted for the simplicity of the figureO As shown in Fig. 3~ the channel switch is usually constructed in the form of :
an m x n matrix ~ith each pair of an incoming and an outgoing paths (line A and line B) wired in a balanced circuitO In this case9 a memory M has to be provided ~or each cross-point but since the potentials at the lines A and B are different from each other, two separate gate current circuits must be provided respectively for the line~ A and B.
As described above9 the semiconductor channel switch according to the present invention can treat~
in the same manner as the conventional mechanical channel switch does~ the ringing~ dialing and hooking signals together with the speech signal.
Moreover, in the above embodiments, it ls assumed that the PNPN switch is turned on by feeding current into the gate, but if it is desired to turn on : ~Q3~(~6f3 1 the switch by drawing current from the gate, it is only necessary to invert the senses of the gate current circuit and the associated diodes. Further, each of such elements need not be in the form of an integraliy rabricated part but has only to be composed of dis crete parts connected with one another by wires.
.
,, , I
~; '' ', ' .... Il , . I . , !
. ' ' ,, . ~ . .
i . , , ' ' , ~ , .
Claims (4)
OR PRIVILEGE IS CLAIMED, ARE DEFINED AS FOLLOWS:
1. A semiconductor channel switch for connecting two points between which a communication path is to be established comprising;
gate control type PNPN switch means comprising a pair of PNPN switches each having a gate terminal and a self-holding action and connected in anti-parallel configuration, gate current circuit means for operatively providing a constant current to the gate terminals of said pair switches during its ON state and means for preventing reverse current flow in the circuit of said gate terminals, said gate current circuit means having high impedance and controlled to the ON
or OFF state;
memory circuit means connected to said gate current circuit means and controlled to a set or reset state for main-taining said gate current circuit means in the ON or OFF state in accordance with its set or reset state, respectively; and selecting circuit means for setting and resetting said memory circuit.
gate control type PNPN switch means comprising a pair of PNPN switches each having a gate terminal and a self-holding action and connected in anti-parallel configuration, gate current circuit means for operatively providing a constant current to the gate terminals of said pair switches during its ON state and means for preventing reverse current flow in the circuit of said gate terminals, said gate current circuit means having high impedance and controlled to the ON
or OFF state;
memory circuit means connected to said gate current circuit means and controlled to a set or reset state for main-taining said gate current circuit means in the ON or OFF state in accordance with its set or reset state, respectively; and selecting circuit means for setting and resetting said memory circuit.
2. A semiconductor channel switch as claimed in claim 1, in which said gate current circuit means comprises a pair of diodes and a gate current circuit, two gate terminals of said pair of PNPN switches are connected with the terminal of one porality of the pair of diodes respectively, the terminals of the other porality of pair of diodes are connected with each other and connected with the gate current circuit means, and which circuit is in turn connected with said memory circuit means so as to be controlled to the ON or OFF state.
3. A semiconductor channel switch as claimed in claim 1, in which said memory circuit means is replaced by a set-preferance flip-flop circuit.
4. A semiconductor channel switch as claimed in claim 1, in which said memory circuit means is replaced by a flip-flop circuit.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP48072933A JPS5929036B2 (en) | 1973-06-29 | 1973-06-29 | semiconductor communication path switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CA1038068A true CA1038068A (en) | 1978-09-05 |
Family
ID=13503647
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CA203,636A Expired CA1038068A (en) | 1973-06-29 | 1974-06-28 | Semiconductor channel switch |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JPS5929036B2 (en) |
| CA (1) | CA1038068A (en) |
| DE (1) | DE2431164C3 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS51144115U (en) * | 1975-05-14 | 1976-11-19 | ||
| DE3676612D1 (en) * | 1985-09-23 | 1991-02-07 | Siemens Ag | BROADBAND SIGNAL COUPLING DEVICE. |
| JPH02110349U (en) * | 1989-02-21 | 1990-09-04 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1185907A (en) * | 1957-11-08 | 1959-08-10 | Cie Ind Des Telephones | Connection point device, in particular for electronic switching |
| NL253766A (en) * | 1959-07-13 | |||
| DE1122568B (en) * | 1959-09-15 | |||
| US3543051A (en) * | 1966-12-28 | 1970-11-24 | Stromberg Carlson Corp | Electrical switching arrangements including triggerable avalanche devices |
| DE1589681A1 (en) * | 1967-03-07 | 1970-04-30 | Philips Patentverwaltung | Electronic crosspoint |
| FR1555813A (en) * | 1967-12-12 | 1969-01-31 | ||
| NL6908332A (en) * | 1969-05-30 | 1970-12-02 | ||
| JPS4977566A (en) * | 1972-11-28 | 1974-07-26 |
-
1973
- 1973-06-29 JP JP48072933A patent/JPS5929036B2/en not_active Expired
-
1974
- 1974-06-28 CA CA203,636A patent/CA1038068A/en not_active Expired
- 1974-06-28 DE DE19742431164 patent/DE2431164C3/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2431164A1 (en) | 1975-01-23 |
| JPS5023511A (en) | 1975-03-13 |
| JPS5929036B2 (en) | 1984-07-17 |
| DE2431164B2 (en) | 1976-05-20 |
| DE2431164C3 (en) | 1983-01-13 |
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