CA1018677A - Metallization patterns using the lift-off method - Google Patents
Metallization patterns using the lift-off methodInfo
- Publication number
- CA1018677A CA1018677A CA215,317A CA215317A CA1018677A CA 1018677 A CA1018677 A CA 1018677A CA 215317 A CA215317 A CA 215317A CA 1018677 A CA1018677 A CA 1018677A
- Authority
- CA
- Canada
- Prior art keywords
- lift
- metallization patterns
- metallization
- patterns
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Physical Vapour Deposition (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL7316851A NL7316851A (en) | 1973-12-10 | 1973-12-10 | PROCESS OF MANUFACTURING A DEVICE, IN PARTICULAR A SEMICONDUCTOR DEVICE, WITH A CONDUCTOR PATTERN ON A SUPPORT BODY, AND DEVICE MANUFACTURED BY THE PROCESS. |
Publications (1)
Publication Number | Publication Date |
---|---|
CA1018677A true CA1018677A (en) | 1977-10-04 |
Family
ID=19820155
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CA215,317A Expired CA1018677A (en) | 1973-12-10 | 1974-12-05 | Metallization patterns using the lift-off method |
Country Status (12)
Country | Link |
---|---|
JP (1) | JPS5646263B2 (en) |
BE (1) | BE823138A (en) |
BR (1) | BR7410276A (en) |
CA (1) | CA1018677A (en) |
CH (1) | CH588164A5 (en) |
DE (1) | DE2455963A1 (en) |
ES (1) | ES432700A1 (en) |
FR (1) | FR2254105B1 (en) |
GB (1) | GB1490715A (en) |
IT (1) | IT1026859B (en) |
NL (1) | NL7316851A (en) |
SE (1) | SE405429B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111727490A (en) * | 2018-03-02 | 2020-09-29 | 东京毅力科创株式会社 | Method for transferring a pattern to a layer |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5370688A (en) * | 1976-12-06 | 1978-06-23 | Toshiba Corp | Production of semoconductor device |
CN108235597B (en) * | 2018-02-08 | 2024-02-23 | 惠州奔达电子有限公司 | PCB manufacturing method and PCB |
CN112259455B (en) * | 2020-10-19 | 2024-01-26 | 扬州扬杰电子科技股份有限公司 | Method for improving metal residue of Ag surface product with passivation layer structure |
-
1973
- 1973-12-10 NL NL7316851A patent/NL7316851A/en not_active Application Discontinuation
-
1974
- 1974-11-27 DE DE19742455963 patent/DE2455963A1/en not_active Withdrawn
- 1974-12-05 CA CA215,317A patent/CA1018677A/en not_active Expired
- 1974-12-06 IT IT30285/74A patent/IT1026859B/en active
- 1974-12-06 CH CH1625474A patent/CH588164A5/xx not_active IP Right Cessation
- 1974-12-06 GB GB52864/74A patent/GB1490715A/en not_active Expired
- 1974-12-07 ES ES432700A patent/ES432700A1/en not_active Expired
- 1974-12-07 JP JP14014074A patent/JPS5646263B2/ja not_active Expired
- 1974-12-09 BE BE151322A patent/BE823138A/en unknown
- 1974-12-09 SE SE7415380A patent/SE405429B/en unknown
- 1974-12-09 BR BR10276/74A patent/BR7410276A/en unknown
- 1974-12-10 FR FR7440442A patent/FR2254105B1/fr not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111727490A (en) * | 2018-03-02 | 2020-09-29 | 东京毅力科创株式会社 | Method for transferring a pattern to a layer |
Also Published As
Publication number | Publication date |
---|---|
BE823138A (en) | 1975-06-09 |
AU7621174A (en) | 1976-06-10 |
SE405429B (en) | 1978-12-04 |
JPS5092089A (en) | 1975-07-23 |
ES432700A1 (en) | 1977-03-01 |
GB1490715A (en) | 1977-11-02 |
BR7410276A (en) | 1976-06-29 |
SE7415380L (en) | 1975-06-11 |
CH588164A5 (en) | 1977-05-31 |
DE2455963A1 (en) | 1975-06-12 |
JPS5646263B2 (en) | 1981-10-31 |
FR2254105B1 (en) | 1978-06-23 |
FR2254105A1 (en) | 1975-07-04 |
IT1026859B (en) | 1978-10-20 |
NL7316851A (en) | 1975-06-12 |
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