CA1002663A - Dynamic address translation scheme using orthogonal squares - Google Patents

Dynamic address translation scheme using orthogonal squares

Info

Publication number
CA1002663A
CA1002663A CA184,628A CA184628A CA1002663A CA 1002663 A CA1002663 A CA 1002663A CA 184628 A CA184628 A CA 184628A CA 1002663 A CA1002663 A CA 1002663A
Authority
CA
Canada
Prior art keywords
address translation
dynamic address
translation scheme
squares
orthogonal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
CA184,628A
Other languages
English (en)
Other versions
CA184628S (en
Inventor
Mu-Yue Hsiao
Douglas C. Bossen
Connor F. Haugh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of CA1002663A publication Critical patent/CA1002663A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
CA184,628A 1972-12-18 1973-10-30 Dynamic address translation scheme using orthogonal squares Expired CA1002663A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00316163A US3812336A (en) 1972-12-18 1972-12-18 Dynamic address translation scheme using orthogonal squares

Publications (1)

Publication Number Publication Date
CA1002663A true CA1002663A (en) 1976-12-28

Family

ID=23227784

Family Applications (1)

Application Number Title Priority Date Filing Date
CA184,628A Expired CA1002663A (en) 1972-12-18 1973-10-30 Dynamic address translation scheme using orthogonal squares

Country Status (7)

Country Link
US (1) US3812336A (en, 2012)
JP (1) JPS5230336B2 (en, 2012)
CA (1) CA1002663A (en, 2012)
DE (1) DE2357233C2 (en, 2012)
FR (1) FR2210793B1 (en, 2012)
GB (1) GB1400650A (en, 2012)
IT (1) IT999371B (en, 2012)

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FR2316693A1 (fr) * 1975-07-01 1977-01-28 Cit Alcatel Memoire numerique d'image
JPS58139399A (ja) 1982-02-15 1983-08-18 Hitachi Ltd 半導体記憶装置
US4943967A (en) * 1982-02-15 1990-07-24 Hitachi, Ltd. Semiconductor memory with an improved dummy cell arrangement and with a built-in error correction code circuit
US5177743A (en) * 1982-02-15 1993-01-05 Hitachi, Ltd. Semiconductor memory
US4461001A (en) * 1982-03-29 1984-07-17 International Business Machines Corporation Deterministic permutation algorithm
US4489403A (en) * 1982-05-24 1984-12-18 International Business Machines Corporation Fault alignment control system and circuits
US4485471A (en) * 1982-06-01 1984-11-27 International Business Machines Corporation Method of memory reconfiguration for fault tolerant memory
US4488298A (en) * 1982-06-16 1984-12-11 International Business Machines Corporation Multi-bit error scattering arrangement to provide fault tolerant semiconductor static memories
US4483001A (en) * 1982-06-16 1984-11-13 International Business Machines Corporation Online realignment of memory faults
US4479214A (en) * 1982-06-16 1984-10-23 International Business Machines Corporation System for updating error map of fault tolerant memory
US4453248A (en) * 1982-06-16 1984-06-05 International Business Machines Corporation Fault alignment exclusion method to prevent realignment of previously paired memory defects
US4506364A (en) * 1982-09-30 1985-03-19 International Business Machines Corporation Memory address permutation apparatus
US4520453A (en) * 1982-11-01 1985-05-28 Ampex Corporation Address transformation system having an address shuffler
US4534029A (en) * 1983-03-24 1985-08-06 International Business Machines Corporation Fault alignment control system and circuits
US4584682A (en) * 1983-09-02 1986-04-22 International Business Machines Corporation Reconfigurable memory using both address permutation and spare memory elements
US4653050A (en) * 1984-12-03 1987-03-24 Trw Inc. Fault-tolerant memory system
JPH071640B2 (ja) * 1987-06-03 1995-01-11 三菱電機株式会社 半導体記憶装置の欠陥救済装置
DE3726570A1 (de) * 1987-08-10 1989-02-23 Siemens Ag Verfahren und schaltungsanordnung fuer halbleiterbausteine mit in hochintegrierter schaltkreistechnik zusammengefassten logischen verknuepfungsschaltungen
USH1176H (en) 1989-08-30 1993-04-06 Cray Research, Inc. Bit dispersement method for enhanced SEC-DED error detection and correction in multi-bit memory devices
US5265098A (en) * 1990-08-03 1993-11-23 International Business Machines Corporation Method and means for managing DASD array accesses when operating in degraded mode
US5485588A (en) * 1992-12-18 1996-01-16 International Business Machines Corporation Memory array based data reorganizer
TW312763B (en, 2012) * 1995-04-05 1997-08-11 Siemens Ag
US5873126A (en) * 1995-06-12 1999-02-16 International Business Machines Corporation Memory array based data reorganizer
US5867612A (en) * 1996-03-27 1999-02-02 Xerox Corporation Method and apparatus for the fast scaling of an image
US5889893A (en) * 1996-03-27 1999-03-30 Xerox Corporation Method and apparatus for the fast rotation of an image
KR101667097B1 (ko) * 2011-06-28 2016-10-17 휴렛 팩커드 엔터프라이즈 디벨롭먼트 엘피 시프트 가능 메모리
DE112011105774B4 (de) 2011-10-27 2019-02-28 Hewlett Packard Enterprise Development Lp Verschiebbarer Speicher, der In-Memory-Datenstrukturen unterstützt
US9576619B2 (en) 2011-10-27 2017-02-21 Hewlett Packard Enterprise Development Lp Shiftable memory supporting atomic operation
US9331700B2 (en) 2011-10-28 2016-05-03 Hewlett Packard Enterprise Development Lp Metal-insulator phase transition flip-flop
WO2013115779A1 (en) 2012-01-30 2013-08-08 Hewlett-Packard Development Company, L.P. Word shift static random access memory (ws-sram)
US9431074B2 (en) 2012-03-02 2016-08-30 Hewlett Packard Enterprise Development Lp Shiftable memory supporting bimodal storage
US9542307B2 (en) 2012-03-02 2017-01-10 Hewlett Packard Enterprise Development Lp Shiftable memory defragmentation

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3644902A (en) * 1970-05-18 1972-02-22 Ibm Memory with reconfiguration to avoid uncorrectable errors

Also Published As

Publication number Publication date
DE2357233C2 (de) 1983-02-24
GB1400650A (en) 1975-07-23
DE2357233A1 (de) 1974-06-20
FR2210793B1 (en, 2012) 1976-06-18
IT999371B (it) 1976-02-20
US3812336A (en) 1974-05-21
JPS4991131A (en, 2012) 1974-08-30
FR2210793A1 (en, 2012) 1974-07-12
JPS5230336B2 (en, 2012) 1977-08-08

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