BR9712154A - Disposição de circuito com um microprocessador e uma memória de pilha. - Google Patents

Disposição de circuito com um microprocessador e uma memória de pilha.

Info

Publication number
BR9712154A
BR9712154A BR9712154-1A BR9712154A BR9712154A BR 9712154 A BR9712154 A BR 9712154A BR 9712154 A BR9712154 A BR 9712154A BR 9712154 A BR9712154 A BR 9712154A
Authority
BR
Brazil
Prior art keywords
microprocessor
stack memory
circuit layout
address space
logical address
Prior art date
Application number
BR9712154-1A
Other languages
English (en)
Inventor
Klaus Oberlaender
Michael Baldischweiler
Stepan Pfab
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Publication of BR9712154A publication Critical patent/BR9712154A/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Microcomputers (AREA)

Abstract

Patente de Invenção: <B>"DISPOSIçãO DE CIRCUITO COM UM MICROPROCESSADOR E UMA MEMóRIA DE PILHA"<D>. O microprocessador tem um espaço de endereço (3) lógico, diretamente endereçável através de saídas de endereço (2). A memória de pilha (4) está disposta, pelo menos parcialmente, fora do espaço de endereço (3) lógico. Vantagem: a memória de trabalho (10) que sobra no espaço de endereço (3) lógico pode ser maximizada. Figura 1
BR9712154-1A 1996-09-30 1997-09-30 Disposição de circuito com um microprocessador e uma memória de pilha. BR9712154A (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19640316A DE19640316A1 (de) 1996-09-30 1996-09-30 Schaltungsanordnung mit einem Mikroprozessor und einem Stapelspeicher
PCT/DE1997/002253 WO1998014876A1 (de) 1996-09-30 1997-09-30 Schaltungsanordnung mit einem mikroprozessor und einem stapelspeicher

Publications (1)

Publication Number Publication Date
BR9712154A true BR9712154A (pt) 1999-08-31

Family

ID=7807457

Family Applications (1)

Application Number Title Priority Date Filing Date
BR9712154-1A BR9712154A (pt) 1996-09-30 1997-09-30 Disposição de circuito com um microprocessador e uma memória de pilha.

Country Status (7)

Country Link
EP (1) EP1010081A1 (pt)
JP (1) JP2000503792A (pt)
KR (1) KR20000048754A (pt)
CN (1) CN1232564A (pt)
BR (1) BR9712154A (pt)
DE (1) DE19640316A1 (pt)
WO (1) WO1998014876A1 (pt)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100353335C (zh) * 2003-03-28 2007-12-05 联发科技股份有限公司 增加处理器中存储器的方法
JP5391870B2 (ja) * 2009-06-26 2014-01-15 富士通株式会社 情報処理装置及びその方法
CN102193868B (zh) * 2010-03-10 2013-06-19 上海海尔集成电路有限公司 数据堆栈存储电路及微控制器

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3726192A1 (de) * 1987-08-06 1989-02-16 Otto Mueller Stacksteuerung
JPH0215345A (ja) * 1988-07-04 1990-01-19 Hitachi Ltd データ処理装置
US5107457A (en) * 1989-04-03 1992-04-21 The Johns Hopkins University Stack data cache having a stack management hardware with internal and external stack pointers and buffers for handling underflow and overflow stack
US5032981A (en) * 1989-04-10 1991-07-16 Cirrus Logic, Inc. Method for increasing effective addressable data processing system memory space
US5255382A (en) * 1990-09-24 1993-10-19 Pawloski Martin B Program memory expander for 8051-based microcontrolled system
GB2282470B (en) * 1993-09-23 1997-12-24 Motorola Israel Ltd A processor arrangement with memory management
DE4340551A1 (de) * 1993-11-29 1995-06-01 Philips Patentverwaltung Programmspeichererweiterung für einen Mikroprozessor
US5666556A (en) * 1993-12-30 1997-09-09 Intel Corporation Method and apparatus for redirecting register access requests wherein the register set is separate from a central processing unit
EP0663636B1 (en) * 1994-01-12 2001-10-31 Sun Microsystems, Inc. Logically addressable physical memory for a virtual memory computer system that supports multiple page sizes

Also Published As

Publication number Publication date
JP2000503792A (ja) 2000-03-28
CN1232564A (zh) 1999-10-20
DE19640316A1 (de) 1998-04-02
EP1010081A1 (de) 2000-06-21
KR20000048754A (ko) 2000-07-25
WO1998014876A1 (de) 1998-04-09

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Legal Events

Date Code Title Description
B08F Application fees: application dismissed [chapter 8.6 patent gazette]

Free format text: REFERENTE A 6A , 7A E 8A ANUIDADES.