BR7308396D0 - Aperfeicoamentos em um conjunto de circuito integrado - Google Patents

Aperfeicoamentos em um conjunto de circuito integrado

Info

Publication number
BR7308396D0
BR7308396D0 BR839673A BR839673A BR7308396D0 BR 7308396 D0 BR7308396 D0 BR 7308396D0 BR 839673 A BR839673 A BR 839673A BR 839673 A BR839673 A BR 839673A BR 7308396 D0 BR7308396 D0 BR 7308396D0
Authority
BR
Brazil
Prior art keywords
integrated circuit
circuit set
integrated
circuit
Prior art date
Application number
BR839673A
Other languages
English (en)
Inventor
P Beaulieu
J Zagursky
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US00310715A external-priority patent/US3815269A/en
Application filed by Ibm filed Critical Ibm
Publication of BR7308396D0 publication Critical patent/BR7308396D0/pt

Links

BR839673A 1972-11-30 1973-10-26 Aperfeicoamentos em um conjunto de circuito integrado BR7308396D0 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US00310715A US3815269A (en) 1971-12-01 1972-11-30 Slide calculator for determining selected periods of time

Publications (1)

Publication Number Publication Date
BR7308396D0 true BR7308396D0 (pt) 1974-08-22

Family

ID=23203796

Family Applications (1)

Application Number Title Priority Date Filing Date
BR839673A BR7308396D0 (pt) 1972-11-30 1973-10-26 Aperfeicoamentos em um conjunto de circuito integrado

Country Status (1)

Country Link
BR (1) BR7308396D0 (pt)

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