BR112020014668A2 - logar influxos de cache por solicitação a um cache de nível superior - Google Patents

logar influxos de cache por solicitação a um cache de nível superior Download PDF

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Publication number
BR112020014668A2
BR112020014668A2 BR112020014668-4A BR112020014668A BR112020014668A2 BR 112020014668 A2 BR112020014668 A2 BR 112020014668A2 BR 112020014668 A BR112020014668 A BR 112020014668A BR 112020014668 A2 BR112020014668 A2 BR 112020014668A2
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BR
Brazil
Prior art keywords
cache
logged
specific
line
log
Prior art date
Application number
BR112020014668-4A
Other languages
English (en)
Portuguese (pt)
Inventor
Jordi Mola
Henry Gabryjelski
Original Assignee
Microsoft Technology Licensing, Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US15/904,072 external-priority patent/US10496537B2/en
Application filed by Microsoft Technology Licensing, Llc filed Critical Microsoft Technology Licensing, Llc
Publication of BR112020014668A2 publication Critical patent/BR112020014668A2/pt

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Prevention of errors by analysis, debugging or testing of software
    • G06F11/362Debugging of software
    • G06F11/3636Debugging of software by tracing the execution of the program
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/3476Data logging
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0808Multiuser, multiprocessor or multiprocessing cache systems with cache invalidating means
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3003Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3024Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a central processing unit [CPU]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3065Monitoring arrangements determined by the means or processing involved in reporting the monitored data
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/885Monitoring specific for caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Debugging And Monitoring (AREA)
BR112020014668-4A 2018-02-23 2019-02-14 logar influxos de cache por solicitação a um cache de nível superior BR112020014668A2 (pt)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US15/904,072 US10496537B2 (en) 2018-02-23 2018-02-23 Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache
US15/904,072 2018-02-23
US15/947,699 US10642737B2 (en) 2018-02-23 2018-04-06 Logging cache influxes by request to a higher-level cache
US15/947,699 2018-04-06
PCT/US2019/017912 WO2019164730A1 (en) 2018-02-23 2019-02-14 Logging cache influxes by request to a higher-level cache

Publications (1)

Publication Number Publication Date
BR112020014668A2 true BR112020014668A2 (pt) 2020-12-01

Family

ID=65576730

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112020014668-4A BR112020014668A2 (pt) 2018-02-23 2019-02-14 logar influxos de cache por solicitação a um cache de nível superior

Country Status (17)

Country Link
US (1) US10642737B2 (https=)
EP (1) EP3756099B1 (https=)
JP (1) JP7334163B2 (https=)
KR (1) KR102661543B1 (https=)
CN (1) CN111742301B (https=)
AU (1) AU2019223807B2 (https=)
BR (1) BR112020014668A2 (https=)
CA (1) CA3088558A1 (https=)
ES (1) ES2943508T3 (https=)
IL (1) IL276650B2 (https=)
MX (1) MX2020008661A (https=)
MY (1) MY205837A (https=)
PH (1) PH12020551310A1 (https=)
RU (1) RU2764173C1 (https=)
SG (1) SG11202007566WA (https=)
WO (1) WO2019164730A1 (https=)
ZA (1) ZA202004082B (https=)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10031834B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US11042469B2 (en) 2017-08-28 2021-06-22 Microsoft Technology Licensing, Llc Logging trace data for program code execution at an instruction level
US10496537B2 (en) 2018-02-23 2019-12-03 Microsoft Technology Licensing, Llc Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache
WO2021061220A1 (en) * 2019-09-24 2021-04-01 Microsoft Technology Licensing, Llc Logging trace data for program code execution at an instruction level
KR102894139B1 (ko) * 2019-12-20 2025-12-03 에스케이하이닉스 주식회사 데이터 저장 장치 및 그 동작 방법
US12411774B2 (en) * 2021-02-22 2025-09-09 Microsoft Technology Licensing, Llc Treating main memory as a collection of tagged cache lines for trace logging
US11561896B2 (en) 2021-02-22 2023-01-24 Microsoft Technology Licensing, Llc Cache-based trace logging using tags in an upper-level cache
EP4295233A1 (en) * 2021-02-22 2023-12-27 Microsoft Technology Licensing, LLC Treating main memory as a collection of tagged cache lines for trace logging
US20220269615A1 (en) * 2021-02-22 2022-08-25 Microsoft Technology Licensing, Llc Cache-based trace logging using tags in system memory
WO2022177697A1 (en) * 2021-02-22 2022-08-25 Microsoft Technology Licensing, Llc Cache-based trace logging using tags in an upper-level cache
LU102709B1 (en) * 2021-03-26 2022-09-26 Microsoft Technology Licensing Llc Memory address compression within an execution trace
LU102708B1 (en) * 2021-03-26 2022-09-26 Microsoft Technology Licensing Llc Physical memory address omission or obfuscation within an execution trace
LU500061B1 (en) * 2021-04-20 2022-10-20 Microsoft Technology Licensing Llc Processor support for using cache way- locking to simultaneously record plural execution contexts into independent execution traces
LU500060B1 (en) * 2021-04-20 2022-10-20 Microsoft Technology Licensing Llc Processor support for using memory page markings as logging cues to simultaneously record plural execution contexts into independent execution traces
CN115269654B (zh) * 2022-07-29 2025-08-12 天翼云科技有限公司 一种数据缓存补充方法、装置、设备及介质
US12541455B2 (en) * 2024-06-07 2026-02-03 SanDisk Technologies, Inc. Data storage device and method for defining caching layers based on cache attributes

Family Cites Families (92)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4598364A (en) 1983-06-29 1986-07-01 International Business Machines Corporation Efficient trace method adaptable to multiprocessors
AU3776793A (en) 1992-02-27 1993-09-13 Intel Corporation Dynamic flow instruction cache memory
US5666514A (en) * 1994-07-01 1997-09-09 Board Of Trustees Of The Leland Stanford Junior University Cache memory containing extra status bits to indicate memory regions where logging of data should occur
US5905855A (en) 1997-02-28 1999-05-18 Transmeta Corporation Method and apparatus for correcting errors in computer systems
US6094729A (en) 1997-04-08 2000-07-25 Advanced Micro Devices, Inc. Debug interface including a compact trace record storage
US6009270A (en) 1997-04-08 1999-12-28 Advanced Micro Devices, Inc. Trace synchronization in a processor
US6167536A (en) 1997-04-08 2000-12-26 Advanced Micro Devices, Inc. Trace cache for a microprocessor-based device
US5944841A (en) 1997-04-15 1999-08-31 Advanced Micro Devices, Inc. Microprocessor with built-in instruction tracing capability
US6101524A (en) 1997-10-23 2000-08-08 International Business Machines Corporation Deterministic replay of multithreaded applications
US6513155B1 (en) 1997-12-12 2003-01-28 International Business Machines Corporation Method and system for merging event-based data and sampled data into postprocessed trace output
US6351844B1 (en) 1998-11-05 2002-02-26 Hewlett-Packard Company Method for selecting active code traces for translation in a caching dynamic translator
US6823473B2 (en) 2000-04-19 2004-11-23 Hewlett-Packard Development Company, L.P. Simultaneous and redundantly threaded processor uncached load address comparator and data value replication circuit
US6854108B1 (en) 2000-05-11 2005-02-08 International Business Machines Corporation Method and apparatus for deterministic replay of java multithreaded programs on multiprocessors
US7448025B2 (en) 2000-12-29 2008-11-04 Intel Corporation Qualification of event detection by thread ID and thread privilege level
JP2002207613A (ja) 2001-01-12 2002-07-26 Fujitsu Ltd 履歴採取装置及び履歴採取方法
US6634011B1 (en) 2001-02-15 2003-10-14 Silicon Graphics, Inc. Method and apparatus for recording program execution in a microprocessor based integrated circuit
US20020144101A1 (en) 2001-03-30 2002-10-03 Hong Wang Caching DAG traces
US7178133B1 (en) 2001-04-30 2007-02-13 Mips Technologies, Inc. Trace control based on a characteristic of a processor's operating state
US7185234B1 (en) 2001-04-30 2007-02-27 Mips Technologies, Inc. Trace control from hardware and software
US7181728B1 (en) 2001-04-30 2007-02-20 Mips Technologies, Inc. User controlled trace records
US20030079205A1 (en) 2001-10-22 2003-04-24 Takeshi Miyao System and method for managing operating systems
US7051239B2 (en) 2001-12-28 2006-05-23 Hewlett-Packard Development Company, L.P. Method and apparatus for efficiently implementing trace and/or logic analysis mechanisms on a processor chip
US7089400B1 (en) 2002-08-29 2006-08-08 Advanced Micro Devices, Inc. Data speculation based on stack-relative addressing patterns
US7073026B2 (en) * 2002-11-26 2006-07-04 Advanced Micro Devices, Inc. Microprocessor including cache memory supporting multiple accesses per cycle
US20040117690A1 (en) 2002-12-13 2004-06-17 Andersson Anders J. Method and apparatus for using a hardware disk controller for storing processor execution trace information on a storage device
US20040153635A1 (en) 2002-12-30 2004-08-05 Kaushik Shivnandan D. Privileged-based qualification of branch trace store data
US7526757B2 (en) 2004-01-14 2009-04-28 International Business Machines Corporation Method and apparatus for maintaining performance monitoring structures in a page table for use in monitoring performance of a computer program
US20050223364A1 (en) 2004-03-30 2005-10-06 Peri Ramesh V Method and apparatus to compact trace in a trace buffer
US8010337B2 (en) 2004-09-22 2011-08-30 Microsoft Corporation Predicting database system performance
US7447946B2 (en) 2004-11-05 2008-11-04 Arm Limited Storage of trace data within a data processing apparatus
JP4114879B2 (ja) 2005-01-21 2008-07-09 インターナショナル・ビジネス・マシーンズ・コーポレーション トレース情報収集システム、トレース情報収集方法、及びトレース情報収集プログラム
US7640539B2 (en) 2005-04-12 2009-12-29 International Business Machines Corporation Instruction profiling using multiple metrics
US8301868B2 (en) 2005-09-23 2012-10-30 Intel Corporation System to profile and optimize user software in a managed run-time environment
US7877630B1 (en) 2005-09-28 2011-01-25 Oracle America, Inc. Trace based rollback of a speculatively updated cache
US7984281B2 (en) 2005-10-18 2011-07-19 Qualcomm Incorporated Shared interrupt controller for a multi-threaded processor
US9268666B2 (en) 2005-10-21 2016-02-23 Undo Ltd. System and method for debugging of computer programs
US7620938B2 (en) 2005-10-31 2009-11-17 Microsoft Corporation Compressed program recording
US20070106827A1 (en) 2005-11-08 2007-05-10 Boatright Bryan D Centralized interrupt controller
US7461209B2 (en) 2005-12-06 2008-12-02 International Business Machines Corporation Transient cache storage with discard function for disposable data
US20070150881A1 (en) 2005-12-22 2007-06-28 Motorola, Inc. Method and system for run-time cache logging
US20070220361A1 (en) 2006-02-03 2007-09-20 International Business Machines Corporation Method and apparatus for guaranteeing memory bandwidth for trace data
US7958497B1 (en) 2006-06-07 2011-06-07 Replay Solutions, Inc. State synchronization in recording and replaying computer programs
US7676632B2 (en) 2006-07-18 2010-03-09 Via Technologies, Inc. Partial cache way locking
US7472218B2 (en) 2006-09-08 2008-12-30 International Business Machines Corporation Assisted trace facility to improve CPU cache performance
US20080114964A1 (en) 2006-11-14 2008-05-15 Davis Gordon T Apparatus and Method for Cache Maintenance
US20080250207A1 (en) 2006-11-14 2008-10-09 Davis Gordon T Design structure for cache maintenance
US8370806B2 (en) 2006-11-15 2013-02-05 Qualcomm Incorporated Non-intrusive, thread-selective, debugging method and system for a multi-thread digital signal processor
JP4851958B2 (ja) 2007-02-19 2012-01-11 エヌイーシーコンピュータテクノ株式会社 バスインタフェースアダプタ、データ転送方法、データ転送システム及び情報処理装置
US7685409B2 (en) * 2007-02-21 2010-03-23 Qualcomm Incorporated On-demand multi-thread multimedia processor
US8261130B2 (en) 2007-03-02 2012-09-04 Infineon Technologies Ag Program code trace signature
US8484516B2 (en) 2007-04-11 2013-07-09 Qualcomm Incorporated Inter-thread trace alignment method and system for a multi-threaded processor
US20090037886A1 (en) 2007-07-30 2009-02-05 Mips Technologies, Inc. Apparatus and method for evaluating a free-running trace stream
CN101446909B (zh) 2007-11-30 2011-12-28 国际商业机器公司 用于管理任务事件的方法和系统
US8078807B2 (en) 2007-12-27 2011-12-13 Intel Corporation Accelerating software lookups by using buffered or ephemeral stores
US8413122B2 (en) 2009-02-12 2013-04-02 International Business Machines Corporation System and method for demonstrating the correctness of an execution trace in concurrent processing environments
US8402318B2 (en) 2009-03-24 2013-03-19 The Trustees Of Columbia University In The City Of New York Systems and methods for recording and replaying application execution
US8589629B2 (en) 2009-03-27 2013-11-19 Advanced Micro Devices, Inc. Method for way allocation and way locking in a cache
US8140903B2 (en) 2009-04-16 2012-03-20 International Business Machines Corporation Hardware process trace facility
US8423965B2 (en) 2009-06-23 2013-04-16 Microsoft Corporation Tracing of data flow
JP2011013867A (ja) 2009-06-30 2011-01-20 Panasonic Corp データ処理装置、性能評価解析システム
US8719796B2 (en) 2010-01-26 2014-05-06 The Board Of Trustees Of The University Of Illinois Parametric trace slicing
US8468501B2 (en) 2010-04-21 2013-06-18 International Business Machines Corporation Partial recording of a computer program execution for replay
US9015441B2 (en) 2010-04-30 2015-04-21 Microsoft Technology Licensing, Llc Memory usage scanning
US8499200B2 (en) 2010-05-24 2013-07-30 Ncr Corporation Managing code-tracing data
US20120042212A1 (en) 2010-08-10 2012-02-16 Gilbert Laurenti Mixed Mode Processor Tracing
US9645913B2 (en) 2011-08-03 2017-05-09 Daniel Geist Method and apparatus for debugging programs
US20130055033A1 (en) 2011-08-22 2013-02-28 International Business Machines Corporation Hardware-assisted program trace collection with selectable call-signature capture
US8584110B2 (en) 2011-09-30 2013-11-12 International Business Machines Corporation Execution trace truncation
EP3382556A1 (en) * 2011-09-30 2018-10-03 INTEL Corporation Memory channel that supports near memory and far memory access
US8612650B1 (en) 2012-03-13 2013-12-17 Western Digital Technologies, Inc. Virtual extension of buffer to reduce buffer overflow during tracing
US9058415B1 (en) 2013-03-15 2015-06-16 Google Inc. Counting events using hardware performance counters and annotated instructions
US9304863B2 (en) 2013-03-15 2016-04-05 International Business Machines Corporation Transactions for checkpointing and reverse execution
JP2014191622A (ja) 2013-03-27 2014-10-06 Fujitsu Ltd 処理装置
US9619404B2 (en) * 2013-04-16 2017-04-11 International Business Machines Corporation Backup cache with immediate availability
US9189360B2 (en) 2013-06-15 2015-11-17 Intel Corporation Processor that records tracing data in non contiguous system memory slices
US9734080B2 (en) * 2013-08-08 2017-08-15 Nxp Usa, Inc. Cache organization and method
US9086974B2 (en) 2013-09-26 2015-07-21 International Business Machines Corporation Centralized management of high-contention cache lines in multi-processor computing environments
US9965320B2 (en) * 2013-12-27 2018-05-08 Intel Corporation Processor with transactional capability and logging circuitry to report transactional operations
US9785568B2 (en) 2014-05-19 2017-10-10 Empire Technology Development Llc Cache lookup bypass in multi-level cache systems
US9535815B2 (en) 2014-06-04 2017-01-03 Nvidia Corporation System, method, and computer program product for collecting execution statistics for graphics processing unit workloads
US9300320B2 (en) 2014-06-27 2016-03-29 Qualcomm Incorporated System and method for dictionary-based cache-line level code compression for on-chip memories using gradual bit removal
US9875173B2 (en) 2014-06-30 2018-01-23 Microsoft Technology Licensing, Llc Time travel debugging in managed runtime
US9361228B2 (en) 2014-08-05 2016-06-07 Qualcomm Incorporated Cache line compaction of compressed data segments
US10210168B2 (en) * 2015-02-23 2019-02-19 International Business Machines Corporation Managing data in storage according to a log structure
US9588870B2 (en) 2015-04-06 2017-03-07 Microsoft Technology Licensing, Llc Time travel debugging for browser components
US10509713B2 (en) 2015-08-18 2019-12-17 Telefonaktiebolaget Lm Ericsson (Publ) Observation by a debug host with memory model and timing offset calculation between instruction and data traces of software execution carried on in a debug target having a main memory and a cache arrangement
US9767237B2 (en) 2015-11-13 2017-09-19 Mentor Graphics Corporation Target capture and replay in emulation
US9569338B1 (en) 2015-12-02 2017-02-14 International Business Machines Corporation Fingerprint-initiated trace extraction
US10031834B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
US10031833B2 (en) 2016-08-31 2018-07-24 Microsoft Technology Licensing, Llc Cache-based tracing for time travel debugging and analysis
WO2018071450A1 (en) 2016-10-11 2018-04-19 Green Hills Software, Inc. Systems, methods, and devices for vertically integrated instrumentation and trace reconstruction
US10496537B2 (en) 2018-02-23 2019-12-03 Microsoft Technology Licensing, Llc Trace recording by logging influxes to a lower-layer cache based on entries in an upper-layer cache

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Publication number Publication date
IL276650A (en) 2020-09-30
CN111742301A (zh) 2020-10-02
ES2943508T3 (es) 2023-06-13
KR20200123188A (ko) 2020-10-28
EP3756099B1 (en) 2023-03-29
IL276650B1 (en) 2023-05-01
RU2764173C1 (ru) 2022-01-13
IL276650B2 (en) 2023-09-01
MY205837A (en) 2024-11-15
PH12020551310A1 (en) 2021-09-06
MX2020008661A (es) 2020-09-22
AU2019223807A1 (en) 2020-07-23
AU2019223807B2 (en) 2024-02-15
SG11202007566WA (en) 2020-09-29
US20190266086A1 (en) 2019-08-29
US10642737B2 (en) 2020-05-05
JP2021515287A (ja) 2021-06-17
EP3756099A1 (en) 2020-12-30
CN111742301B (zh) 2024-11-08
JP7334163B2 (ja) 2023-08-28
KR102661543B1 (ko) 2024-04-26
CA3088558A1 (en) 2019-08-29
ZA202004082B (en) 2021-09-29
WO2019164730A1 (en) 2019-08-29

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