BR112016025511A2 - técnicas para execução serializada em sistema de processamento simd - Google Patents

técnicas para execução serializada em sistema de processamento simd

Info

Publication number
BR112016025511A2
BR112016025511A2 BR112016025511A BR112016025511A BR112016025511A2 BR 112016025511 A2 BR112016025511 A2 BR 112016025511A2 BR 112016025511 A BR112016025511 A BR 112016025511A BR 112016025511 A BR112016025511 A BR 112016025511A BR 112016025511 A2 BR112016025511 A2 BR 112016025511A2
Authority
BR
Brazil
Prior art keywords
techniques
processing system
execution
simd processing
serialized execution
Prior art date
Application number
BR112016025511A
Other languages
English (en)
Inventor
Vladimirovich Bourd Alexei
evan gruber Andrew
Chen Lin
Du Yun
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of BR112016025511A2 publication Critical patent/BR112016025511A2/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/3009—Thread control instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
  • Hardware Redundancy (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

um processador simd pode ser configurado para determinar um ou mais fluxos de execução ativos de uma série de fluxos de execução, selecionar um fluxo de execução ativo do fluxo ou fluxos de execução ativos e executar uma operação divergente do fluxo de execução ativo selecionado. a operação divergente pode ser uma operação serial.
BR112016025511A 2014-05-02 2015-04-10 técnicas para execução serializada em sistema de processamento simd BR112016025511A2 (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/268,215 US10133572B2 (en) 2014-05-02 2014-05-02 Techniques for serialized execution in a SIMD processing system
PCT/US2015/025362 WO2015167777A1 (en) 2014-05-02 2015-04-10 Techniques for serialized execution in a simd processing system

Publications (1)

Publication Number Publication Date
BR112016025511A2 true BR112016025511A2 (pt) 2017-08-15

Family

ID=53039617

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016025511A BR112016025511A2 (pt) 2014-05-02 2015-04-10 técnicas para execução serializada em sistema de processamento simd

Country Status (8)

Country Link
US (1) US10133572B2 (pt)
EP (1) EP3137988B1 (pt)
JP (1) JP2017515228A (pt)
KR (1) KR20160148673A (pt)
CN (1) CN106233248B (pt)
BR (1) BR112016025511A2 (pt)
ES (1) ES2834573T3 (pt)
WO (1) WO2015167777A1 (pt)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9898348B2 (en) 2014-10-22 2018-02-20 International Business Machines Corporation Resource mapping in multi-threaded central processor units
US9921838B2 (en) * 2015-10-02 2018-03-20 Mediatek Inc. System and method for managing static divergence in a SIMD computing architecture
EP3726732B1 (en) 2016-04-19 2024-07-31 Huawei Technologies Co., Ltd. Vector processing for segmentation hash values calculation
US10091904B2 (en) 2016-07-22 2018-10-02 Intel Corporation Storage sled for data center
US10565017B2 (en) * 2016-09-23 2020-02-18 Samsung Electronics Co., Ltd. Multi-thread processor and controlling method thereof
US10990409B2 (en) * 2017-04-21 2021-04-27 Intel Corporation Control flow mechanism for execution of graphics processor instructions using active channel packing
CN108549583B (zh) * 2018-04-17 2021-05-07 致云科技有限公司 大数据处理方法、装置、服务器及可读存储介质
US12004257B2 (en) * 2018-10-08 2024-06-04 Interdigital Patent Holdings, Inc. Device discovery and connectivity in a cellular network
US20230097115A1 (en) * 2021-09-27 2023-03-30 Advanced Micro Devices, Inc. Garbage collecting wavefront

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6947047B1 (en) 2001-09-20 2005-09-20 Nvidia Corporation Method and system for programmable pipelined graphics processing with branching instructions
US7895328B2 (en) 2002-12-13 2011-02-22 International Business Machines Corporation System and method for context-based serialization of messages in a parallel execution environment
WO2005072307A2 (en) 2004-01-22 2005-08-11 University Of Washington Wavescalar architecture having a wave order memory
US7590830B2 (en) * 2004-05-28 2009-09-15 Sun Microsystems, Inc. Method and structure for concurrent branch prediction in a processor
GB2437837A (en) 2005-02-25 2007-11-07 Clearspeed Technology Plc Microprocessor architecture
US7761697B1 (en) * 2005-07-13 2010-07-20 Nvidia Corporation Processing an indirect branch instruction in a SIMD architecture
US7634637B1 (en) 2005-12-16 2009-12-15 Nvidia Corporation Execution of parallel groups of threads with per-instruction serialization
US8176265B2 (en) 2006-10-30 2012-05-08 Nvidia Corporation Shared single-access memory with management of multiple parallel requests
US8312254B2 (en) * 2008-03-24 2012-11-13 Nvidia Corporation Indirect function call instructions in a synchronous parallel thread processor
US8850436B2 (en) 2009-09-28 2014-09-30 Nvidia Corporation Opcode-specified predicatable warp post-synchronization
US8782645B2 (en) * 2011-05-11 2014-07-15 Advanced Micro Devices, Inc. Automatic load balancing for heterogeneous cores
US8683468B2 (en) * 2011-05-16 2014-03-25 Advanced Micro Devices, Inc. Automatic kernel migration for heterogeneous cores
US10152329B2 (en) 2012-02-09 2018-12-11 Nvidia Corporation Pre-scheduled replays of divergent operations
US9256429B2 (en) 2012-08-08 2016-02-09 Qualcomm Incorporated Selectively activating a resume check operation in a multi-threaded processing system
US9229721B2 (en) 2012-09-10 2016-01-05 Qualcomm Incorporated Executing subroutines in a multi-threaded processing system
US10013290B2 (en) 2012-09-10 2018-07-03 Nvidia Corporation System and method for synchronizing threads in a divergent region of code
KR101603752B1 (ko) * 2013-01-28 2016-03-28 삼성전자주식회사 멀티 모드 지원 프로세서 및 그 프로세서에서 멀티 모드를 지원하는 방법
KR20150019349A (ko) * 2013-08-13 2015-02-25 삼성전자주식회사 다중 쓰레드 실행 프로세서 및 이의 동작 방법
US9652284B2 (en) * 2013-10-01 2017-05-16 Qualcomm Incorporated GPU divergence barrier

Also Published As

Publication number Publication date
KR20160148673A (ko) 2016-12-26
EP3137988A1 (en) 2017-03-08
US20150317157A1 (en) 2015-11-05
EP3137988B1 (en) 2020-09-02
ES2834573T3 (es) 2021-06-17
US10133572B2 (en) 2018-11-20
JP2017515228A (ja) 2017-06-08
CN106233248A (zh) 2016-12-14
CN106233248B (zh) 2018-11-13
WO2015167777A1 (en) 2015-11-05

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Legal Events

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B08F Application dismissed because of non-payment of annual fees [chapter 8.6 patent gazette]

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B08K Patent lapsed as no evidence of payment of the annual fee has been furnished to inpi [chapter 8.11 patent gazette]

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B350 Update of information on the portal [chapter 15.35 patent gazette]