BR112016011691A2 - - Google Patents

Info

Publication number
BR112016011691A2
BR112016011691A2 BR112016011691A BR112016011691A BR112016011691A2 BR 112016011691 A2 BR112016011691 A2 BR 112016011691A2 BR 112016011691 A BR112016011691 A BR 112016011691A BR 112016011691 A BR112016011691 A BR 112016011691A BR 112016011691 A2 BR112016011691 A2 BR 112016011691A2
Authority
BR
Brazil
Application number
BR112016011691A
Other languages
Portuguese (pt)
Other versions
BR112016011691B1 (pt
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BR112016011691A2 publication Critical patent/BR112016011691A2/pt
Publication of BR112016011691B1 publication Critical patent/BR112016011691B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
    • G06F13/1663—Access to shared memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1052—Security improvement
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
BR112016011691-7A 2013-12-26 2013-12-26 Aparelho, método e sistema para suportar acesso a memória de computador. BR112016011691B1 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US2013/077785 WO2015099730A1 (en) 2013-12-26 2013-12-26 Sharing memory and i/o services between nodes

Publications (2)

Publication Number Publication Date
BR112016011691A2 true BR112016011691A2 (enExample) 2017-08-08
BR112016011691B1 BR112016011691B1 (pt) 2022-02-22

Family

ID=53479394

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112016011691-7A BR112016011691B1 (pt) 2013-12-26 2013-12-26 Aparelho, método e sistema para suportar acesso a memória de computador.

Country Status (8)

Country Link
US (4) US10915468B2 (enExample)
EP (1) EP3087493B1 (enExample)
JP (1) JP6311174B2 (enExample)
KR (1) KR101895763B1 (enExample)
CN (1) CN105793830B (enExample)
BR (1) BR112016011691B1 (enExample)
DE (1) DE112013007724B4 (enExample)
WO (1) WO2015099730A1 (enExample)

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105793830B (zh) 2013-12-26 2019-12-24 英特尔公司 一种在节点之间共享存储器和i/o服务的装置、方法、系统
US11157200B2 (en) * 2014-10-29 2021-10-26 Hewlett-Packard Development Company, L.P. Communicating over portions of a communication medium
CN104360982B (zh) * 2014-11-21 2017-11-10 浪潮(北京)电子信息产业有限公司 一种基于可重构芯片技术的主机系统目录结构实现方法和系统
US9817787B2 (en) * 2015-03-26 2017-11-14 Intel Corporation Method, apparatus and system for encapsulating information in a communication
US9940287B2 (en) 2015-03-27 2018-04-10 Intel Corporation Pooled memory address translation
JP6503945B2 (ja) * 2015-07-13 2019-04-24 富士通株式会社 情報処理装置、並列計算機システム、ファイルサーバ通信プログラム及びファイルサーバ通信方法
US10390114B2 (en) * 2016-07-22 2019-08-20 Intel Corporation Memory sharing for physical accelerator resources in a data center
US10277677B2 (en) * 2016-09-12 2019-04-30 Intel Corporation Mechanism for disaggregated storage class memory over fabric
CN116755778A (zh) * 2016-12-31 2023-09-15 英特尔公司 用于异构计算的系统、方法和装置
US10394604B2 (en) * 2017-03-15 2019-08-27 Samsung Electronics Co., Ltd. Method for using local BMC to allocate shared GPU resources inside NVMe over fabrics system
US11157422B2 (en) * 2017-03-31 2021-10-26 Intel Corporation Shared memory for intelligent network interface cards
CN108733311B (zh) * 2017-04-17 2021-09-10 伊姆西Ip控股有限责任公司 用于管理存储系统的方法和设备
EP3637272A4 (en) 2017-06-26 2020-09-02 Shanghai Cambricon Information Technology Co., Ltd DATA-SHARING SYSTEM AND RELATED DATA-SHARING PROCESS
CN110413551B (zh) 2018-04-28 2021-12-10 上海寒武纪信息科技有限公司 信息处理装置、方法及设备
CN109214616B (zh) 2017-06-29 2023-04-07 上海寒武纪信息科技有限公司 一种信息处理装置、系统和方法
CN110502330A (zh) 2018-05-16 2019-11-26 上海寒武纪信息科技有限公司 处理器及处理方法
CN109426553A (zh) 2017-08-21 2019-03-05 上海寒武纪信息科技有限公司 任务切分装置及方法、任务处理装置及方法、多核处理器
CN109117415B (zh) * 2017-06-26 2024-05-14 上海寒武纪信息科技有限公司 数据共享系统及其数据共享方法
US10582636B2 (en) * 2017-08-07 2020-03-03 Lenovo Enterprise Solutions (Singapore) Pte. Ltd. Server having a dual-mode serial bus port enabling selective access to a baseboard management controller
US11263143B2 (en) * 2017-09-29 2022-03-01 Intel Corporation Coherent accelerator fabric controller
CN107886692B (zh) * 2017-10-30 2020-08-25 皖西学院 一种生物工程用传感器LoRa无线网络通讯系统
CN107797945A (zh) * 2017-10-31 2018-03-13 郑州云海信息技术有限公司 一种存储系统及其数据存储方法、装置、系统及设备
US10866753B2 (en) 2018-04-03 2020-12-15 Xilinx, Inc. Data processing engine arrangement in a device
US10747690B2 (en) * 2018-04-03 2020-08-18 Xilinx, Inc. Device with data processing engine array
US10606790B2 (en) * 2018-04-16 2020-03-31 Intel Corporation Precoding mechanism in PCI-express
US10452593B1 (en) * 2018-05-03 2019-10-22 Arm Limited High-performance streaming of ordered write stashes to enable optimized data sharing between I/O masters and CPUs
KR101912872B1 (ko) * 2018-06-04 2018-10-30 주식회사 위더스플래닛 고밀집 네트워크 환경을 위한 WiFi 네트워크 시스템
CN112306409B (zh) * 2018-06-27 2022-09-09 华为技术有限公司 一种存储系统及盘片
CN109002352B (zh) * 2018-07-04 2019-12-03 北京捷旅易行科技有限公司 流量控制器系统
US11477049B2 (en) * 2018-08-02 2022-10-18 Xilinx, Inc. Logical transport over a fixed PCIE physical transport network
CN109309711B (zh) * 2018-08-30 2020-06-16 中国科学院声学研究所 一种虚拟缓存共享方法和系统
US11138135B2 (en) * 2018-09-20 2021-10-05 Samsung Electronics Co., Ltd. Scale-out high bandwidth memory system
US11157437B2 (en) * 2018-09-26 2021-10-26 Micron Technology, Inc. Memory pooling between selected memory resources via a base station
US10536156B1 (en) * 2018-10-16 2020-01-14 Microchip Technology Incorporated Analog-to-digital converter controllers including configurable contexts
US10771189B2 (en) * 2018-12-18 2020-09-08 Intel Corporation Forward error correction mechanism for data transmission across multi-lane links
JP6579255B1 (ja) * 2018-12-28 2019-09-25 富士通クライアントコンピューティング株式会社 情報処理システム、および中継装置
EP3881191B1 (en) 2018-12-28 2024-10-30 Huawei Technologies Co., Ltd. Apparatus and method for locking pcie network having non-transparent bridging
US11637657B2 (en) 2019-02-15 2023-04-25 Intel Corporation Low-latency forward error correction for high-speed serial links
US11249837B2 (en) 2019-03-01 2022-02-15 Intel Corporation Flit-based parallel-forward error correction and parity
US10817462B1 (en) 2019-04-26 2020-10-27 Xilinx, Inc. Machine learning model updates to ML accelerators
US11296994B2 (en) 2019-05-13 2022-04-05 Intel Corporation Ordered sets for high-speed interconnects
US11074208B1 (en) 2019-07-24 2021-07-27 Xilinx, Inc. Routing network using global address map with adaptive main memory expansion for a plurality of home agents
US11409671B2 (en) * 2019-09-19 2022-08-09 Facebook Technologies, Llc Artificial reality system having multi-bank, multi-port distributed shared memory
US11474871B1 (en) 2019-09-25 2022-10-18 Xilinx, Inc. Cache coherent acceleration function virtualization
US11740958B2 (en) 2019-11-27 2023-08-29 Intel Corporation Multi-protocol support on common physical layer
US12189470B2 (en) 2020-09-18 2025-01-07 Intel Corporation Forward error correction and cyclic redundancy check mechanisms for latency-critical coherency and memory interconnects
US11914903B2 (en) 2020-10-12 2024-02-27 Samsung Electronics Co., Ltd. Systems, methods, and devices for accelerators with virtualization and tiered memory
CN112395220B (zh) * 2020-11-18 2023-02-28 海光信息技术股份有限公司 共享存储控制器的处理方法、装置、系统及存储控制器
US12332826B2 (en) 2021-12-30 2025-06-17 Intel Corporation Die-to-die interconnect
US12481614B2 (en) * 2021-12-30 2025-11-25 Intel Corporation Standard interfaces for die to die (D2D) interconnect stacks
US12360934B2 (en) 2021-12-30 2025-07-15 Intel Corporation Parameter exchange for a die-to-die interconnect
US12499019B2 (en) 2022-01-27 2025-12-16 Intel Corporation Retimers to extend a die-to-die interconnect
US12271627B2 (en) * 2022-09-30 2025-04-08 Advanced Micro Devices, Inc. Off-chip memory shared by multiple processing nodes
CN118132499A (zh) * 2022-12-01 2024-06-04 华为技术有限公司 一种数据处理系统、方法及连接设备
CN116074397B (zh) * 2022-12-29 2025-05-16 上海新时达机器人有限公司 一种数据共享系统
US12585609B2 (en) * 2023-10-13 2026-03-24 Cornelis Networks, Inc Autonomous integrated translator for local bus operations
CN119363585B (zh) * 2024-12-26 2025-06-27 永联科技(常熟)有限公司 一种交互配置装置、电子设备及分布式系统

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3137970B2 (ja) * 1990-07-26 2001-02-26 富士通株式会社 共用記憶制御システム
JPH1078941A (ja) * 1996-09-04 1998-03-24 Fujitsu Ltd 並列計算機
US6401174B1 (en) * 1997-09-05 2002-06-04 Sun Microsystems, Inc. Multiprocessing computer system employing a cluster communication error reporting mechanism
US6226771B1 (en) * 1998-12-14 2001-05-01 Cisco Technology, Inc. Method and apparatus for generating error detection data for encapsulated frames
JP3959914B2 (ja) 1999-12-24 2007-08-15 株式会社日立製作所 主記憶共有型並列計算機及びそれに用いるノード制御装置
US7058750B1 (en) 2000-05-10 2006-06-06 Intel Corporation Scalable distributed memory and I/O multiprocessor system
US6738868B2 (en) * 2000-06-10 2004-05-18 Hewlett-Packard Development Company, L.P. System for minimizing directory information in scalable multiprocessor systems with logically independent input/output nodes
US6944719B2 (en) * 2002-05-15 2005-09-13 Broadcom Corp. Scalable cache coherent distributed shared memory processing system
US7136400B2 (en) 2002-06-21 2006-11-14 International Business Machines Corporation Method and apparatus for multiplexing multiple protocol handlers on a shared memory bus
US7873700B2 (en) * 2002-08-09 2011-01-18 Netapp, Inc. Multi-protocol storage appliance that provides integrated support for file and block access protocols
GB2400265A (en) * 2003-03-31 2004-10-06 Sony Uk Ltd Routing data
US20060190552A1 (en) 2005-02-24 2006-08-24 Henze Richard H Data retention system with a plurality of access protocols
US7653682B2 (en) * 2005-07-22 2010-01-26 Netapp, Inc. Client failure fencing mechanism for fencing network file system data in a host-cluster environment
US7782873B2 (en) * 2005-08-23 2010-08-24 Slt Logic, Llc Omni-protocol engine for reconfigurable bit-stream processing in high-speed networks
US20070220059A1 (en) * 2006-03-20 2007-09-20 Manyi Lu Data processing node
JP2008020977A (ja) 2006-07-11 2008-01-31 Sony Computer Entertainment Inc ネットワークプロセッサシステムおよびネットワークプロトコル処理方法
US7715433B2 (en) * 2006-07-14 2010-05-11 Boren Gary W Universal controller and signal monitor
JP2008046969A (ja) * 2006-08-18 2008-02-28 Fujitsu Ltd 共有メモリのアクセス監視方法及び装置
US20080307146A1 (en) 2006-08-22 2008-12-11 Freking Ronald E Structure for dynamically scalable queues for performance driven pci express memory traffic
GB2442984B (en) * 2006-10-17 2011-04-06 Advanced Risc Mach Ltd Handling of write access requests to shared memory in a data processing apparatus
US7949794B2 (en) 2006-11-02 2011-05-24 Intel Corporation PCI express enhancements and extensions
US7941613B2 (en) 2007-05-31 2011-05-10 Broadcom Corporation Shared memory architecture
US8438578B2 (en) * 2008-06-09 2013-05-07 International Business Machines Corporation Network on chip with an I/O accelerator
WO2009154797A2 (en) 2008-06-20 2009-12-23 Rambus, Inc. Frequency responsive bus coding
US8108631B2 (en) 2008-07-18 2012-01-31 Oracle America, Inc. Transactional memory support for non-coherent shared memory systems using selective write through caches
JP5138525B2 (ja) 2008-09-26 2013-02-06 富士フイルム株式会社 像振れ補正装置及び像振れ補正方法
US8751714B2 (en) * 2010-09-24 2014-06-10 Intel Corporation Implementing quickpath interconnect protocol over a PCIe interface
US8405529B2 (en) 2011-03-11 2013-03-26 Taiwan Semiconductor Manufacturing Company, Ltd. Using bus inversion to reduce simultaneous signal switching
WO2013081580A1 (en) * 2011-11-29 2013-06-06 Intel Corporation Raw memory transaction support
US9442879B2 (en) * 2011-12-07 2016-09-13 Intel Corporation Multiple transaction data flow control unit for high-speed interconnect
US9565132B2 (en) 2011-12-27 2017-02-07 Intel Corporation Multi-protocol I/O interconnect including a switching fabric
US8856420B2 (en) * 2011-12-27 2014-10-07 Intel Corporation Multi-protocol I/O interconnect flow control
US8825910B2 (en) 2012-04-06 2014-09-02 International Business Machines Corporation Pass-through converged network adaptor (CNA) using existing ethernet switching device
CN103180817B (zh) * 2012-07-02 2015-09-30 杭州华为数字技术有限公司 存储扩展装置及服务器
WO2014075255A1 (zh) 2012-11-15 2014-05-22 华为技术有限公司 一种基于PCIE Switch通信的方法、装置及系统
CN105793830B (zh) 2013-12-26 2019-12-24 英特尔公司 一种在节点之间共享存储器和i/o服务的装置、方法、系统
US9383932B2 (en) * 2013-12-27 2016-07-05 Intel Corporation Data coherency model and protocol at cluster level

Also Published As

Publication number Publication date
CN105793830B (zh) 2019-12-24
EP3087493A4 (en) 2017-08-23
KR20160075730A (ko) 2016-06-29
US20210303482A1 (en) 2021-09-30
EP3087493A1 (en) 2016-11-02
US20220012189A1 (en) 2022-01-13
BR112016011691B1 (pt) 2022-02-22
JP2017504089A (ja) 2017-02-02
US20170004098A1 (en) 2017-01-05
JP6311174B2 (ja) 2018-04-18
KR101895763B1 (ko) 2018-09-07
US12405904B2 (en) 2025-09-02
DE112013007724T5 (de) 2016-09-15
US12517846B2 (en) 2026-01-06
DE112013007724B4 (de) 2024-01-11
CN105793830A (zh) 2016-07-20
US10915468B2 (en) 2021-02-09
US20240160585A1 (en) 2024-05-16
EP3087493B1 (en) 2020-09-02
WO2015099730A1 (en) 2015-07-02

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B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 26/12/2013, OBSERVADAS AS CONDICOES LEGAIS.