BR112016002637A8 - Sincronização de barreira com cálculo dinâmico de largura - Google Patents
Sincronização de barreira com cálculo dinâmico de larguraInfo
- Publication number
- BR112016002637A8 BR112016002637A8 BR112016002637A BR112016002637A BR112016002637A8 BR 112016002637 A8 BR112016002637 A8 BR 112016002637A8 BR 112016002637 A BR112016002637 A BR 112016002637A BR 112016002637 A BR112016002637 A BR 112016002637A BR 112016002637 A8 BR112016002637 A8 BR 112016002637A8
- Authority
- BR
- Brazil
- Prior art keywords
- barrier
- group
- subgroup
- string
- width
- Prior art date
Links
- 230000004888 barrier function Effects 0.000 title abstract 9
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
- G06F9/522—Barrier synchronisation
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30087—Synchronisation or serialisation instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
Abstract
SINCRONIZAÇÃO DE BARREIRA COM CÁLCULO DINÂMICO DE LARGURA. Um sequenciador de uma unidade de processamento determina, durante a execução, uma largura de barreira de uma operação de barreira para um grupo de cadeias, sendo que a largura da barreira é menor do que um número total de cadeias no grupo de cadeias, e sendo que as cadeias no grupo de cadeias executam o código de dados paralelos um uma ou mais unidades de computação. Em resposta à cada cadeia em um subgrupo do grupo de cadeias que executou a operação de barreira, o subgrupo incluindo um mesmo número de cadeias que a largura da barreira, o sequenciador pode permitir que o subgrupo do grupo de cadeias execute nos um ou mais processadores depois da operação de barreira sem esperar por outras cadeias no grupo de cadeias executarem a operação de barreira, sendo que o subgrupo do grupo de cadeias é menor que o número total de cadeias no grupo de cadeias.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/965,818 US9218223B2 (en) | 2013-08-13 | 2013-08-13 | Barrier synchronization with dynamic width calculation |
US13/965,818 | 2013-08-13 | ||
PCT/US2014/050143 WO2015023509A1 (en) | 2013-08-13 | 2014-08-07 | Barrier synchronization with dynamic width calculation |
Publications (3)
Publication Number | Publication Date |
---|---|
BR112016002637A2 BR112016002637A2 (pt) | 2017-08-01 |
BR112016002637A8 true BR112016002637A8 (pt) | 2022-08-23 |
BR112016002637B1 BR112016002637B1 (pt) | 2023-03-14 |
Family
ID=51422147
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BR112016002637-3A BR112016002637B1 (pt) | 2013-08-13 | 2014-08-07 | Método e sistema de computação para sincronizar threads em um grupo de threads, e memória legível por computador |
Country Status (8)
Country | Link |
---|---|
US (1) | US9218223B2 (pt) |
EP (2) | EP3964951A1 (pt) |
JP (1) | JP6130065B2 (pt) |
KR (1) | KR101724247B1 (pt) |
CN (1) | CN105453045B (pt) |
BR (1) | BR112016002637B1 (pt) |
CA (1) | CA2917609C (pt) |
WO (1) | WO2015023509A1 (pt) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9916162B2 (en) * | 2013-12-26 | 2018-03-13 | Intel Corporation | Using a global barrier to synchronize across local thread groups in general purpose programming on GPU |
DE102016203965A1 (de) * | 2016-03-10 | 2017-09-14 | Robert Bosch Gmbh | Überwachung eines Rechensystems |
US10324730B2 (en) * | 2016-03-24 | 2019-06-18 | Mediatek, Inc. | Memory shuffle engine for efficient work execution in a parallel computing system |
US10223436B2 (en) * | 2016-04-27 | 2019-03-05 | Qualcomm Incorporated | Inter-subgroup data sharing |
US20170357705A1 (en) * | 2016-06-08 | 2017-12-14 | Knuedge Incorporated | Performing a synchronization operation on an electronic device |
US10318355B2 (en) * | 2017-01-24 | 2019-06-11 | Oracle International Corporation | Distributed graph processing system featuring interactive remote control mechanism including task cancellation |
US11353868B2 (en) * | 2017-04-24 | 2022-06-07 | Intel Corporation | Barriers and synchronization for machine learning at autonomous machines |
US10990453B2 (en) * | 2018-04-12 | 2021-04-27 | Advanced Micro Devices, Inc. | Improving latency by performing early synchronization operations in between sets of program operations of a thread |
GB2574817B (en) * | 2018-06-18 | 2021-01-06 | Advanced Risc Mach Ltd | Data processing systems |
JP7159696B2 (ja) * | 2018-08-28 | 2022-10-25 | 富士通株式会社 | 情報処理装置,並列計算機システムおよび制御方法 |
US11449339B2 (en) * | 2019-09-27 | 2022-09-20 | Red Hat, Inc. | Memory barrier elision for multi-threaded workloads |
US11409579B2 (en) * | 2020-02-24 | 2022-08-09 | Intel Corporation | Multiple independent synchonization named barrier within a thread group |
KR102501187B1 (ko) * | 2020-04-03 | 2023-02-17 | 서울대학교산학협력단 | 배리어 구현 방법 및 시스템 |
US11461130B2 (en) | 2020-05-26 | 2022-10-04 | Oracle International Corporation | Methodology for fast and seamless task cancelation and error handling in distributed processing of large graph data |
US11204774B1 (en) * | 2020-08-31 | 2021-12-21 | Apple Inc. | Thread-group-scoped gate instruction |
GB2604150B (en) * | 2021-02-26 | 2023-06-14 | Advanced Risc Mach Ltd | Data processing systems |
US20220342721A1 (en) * | 2021-04-22 | 2022-10-27 | EMC IP Holding Company, LLC | System and Method for Efficient Snapshots Barrier Mechanism for System With Presorted Container-Based Log |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6574725B1 (en) | 1999-11-01 | 2003-06-03 | Advanced Micro Devices, Inc. | Method and mechanism for speculatively executing threads of instructions |
JP3571976B2 (ja) | 1999-11-08 | 2004-09-29 | 富士通株式会社 | デバッグ装置及び方法並びにプログラム記録媒体 |
US7512950B1 (en) | 2003-08-14 | 2009-03-31 | Sun Microsystems, Inc. | Barrier synchronization object for multi-threaded applications |
JP4276028B2 (ja) * | 2003-08-25 | 2009-06-10 | 株式会社日立製作所 | マルチプロセッサシステムの同期方法 |
US7937709B2 (en) * | 2004-12-29 | 2011-05-03 | Intel Corporation | Synchronizing multiple threads efficiently |
US7865911B2 (en) * | 2005-11-08 | 2011-01-04 | Microsoft Corporation | Hybrid programming |
US7555607B2 (en) | 2005-11-10 | 2009-06-30 | Hewlett-Packard Development Company, L.P. | Program thread syncronization for instruction cachelines |
US8484516B2 (en) * | 2007-04-11 | 2013-07-09 | Qualcomm Incorporated | Inter-thread trace alignment method and system for a multi-threaded processor |
US8966488B2 (en) | 2007-07-06 | 2015-02-24 | XMOS Ltd. | Synchronising groups of threads with dedicated hardware logic |
US8866827B2 (en) * | 2008-06-26 | 2014-10-21 | Microsoft Corporation | Bulk-synchronous graphics processing unit programming |
JP5239751B2 (ja) * | 2008-10-31 | 2013-07-17 | 富士通株式会社 | ノード間同期装置、ノード間同期方法およびノード間同期プログラム |
JP5447807B2 (ja) * | 2009-08-07 | 2014-03-19 | 株式会社日立製作所 | バリア同期方法及び計算機 |
US8539204B2 (en) | 2009-09-25 | 2013-09-17 | Nvidia Corporation | Cooperative thread array reduction and scan operations |
-
2013
- 2013-08-13 US US13/965,818 patent/US9218223B2/en active Active
-
2014
- 2014-08-07 WO PCT/US2014/050143 patent/WO2015023509A1/en active Application Filing
- 2014-08-07 BR BR112016002637-3A patent/BR112016002637B1/pt active IP Right Grant
- 2014-08-07 CA CA2917609A patent/CA2917609C/en not_active Expired - Fee Related
- 2014-08-07 EP EP21192792.6A patent/EP3964951A1/en active Pending
- 2014-08-07 CN CN201480043435.2A patent/CN105453045B/zh active Active
- 2014-08-07 JP JP2016524424A patent/JP6130065B2/ja active Active
- 2014-08-07 EP EP14756161.7A patent/EP3033679A1/en not_active Ceased
- 2014-08-07 KR KR1020167006600A patent/KR101724247B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
CA2917609C (en) | 2017-10-24 |
EP3033679A1 (en) | 2016-06-22 |
CN105453045B (zh) | 2017-04-12 |
BR112016002637B1 (pt) | 2023-03-14 |
US20150052537A1 (en) | 2015-02-19 |
WO2015023509A1 (en) | 2015-02-19 |
CN105453045A (zh) | 2016-03-30 |
US9218223B2 (en) | 2015-12-22 |
KR20160036067A (ko) | 2016-04-01 |
EP3964951A1 (en) | 2022-03-09 |
CA2917609A1 (en) | 2015-02-19 |
JP2016525746A (ja) | 2016-08-25 |
BR112016002637A2 (pt) | 2017-08-01 |
JP6130065B2 (ja) | 2017-05-17 |
KR101724247B1 (ko) | 2017-04-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
BR112016002637A8 (pt) | Sincronização de barreira com cálculo dinâmico de largura | |
BR112018004933A2 (pt) | agendamento eficaz de tarefas multiversionadas | |
BR112017026917A2 (pt) | ?método e dispositivo para processamento de rede neural convolucional cnn e mídia de armazenamento não volátil? | |
BR112018002040A2 (pt) | controle de uma nuvem de dispositivo | |
BR112017010388A2 (pt) | escala dos agentes de assistente pessoal digital por meio de dispositivos | |
BR112015015230A8 (pt) | Sistema e processo para abordar generalização em uma rede neural | |
BR112018007430A2 (pt) | aceleração de subgráficos de tarefa pela sincronização de remapeamento | |
BR112015025695A2 (pt) | pré-geração de objeto de exibição | |
BR112016021216A2 (pt) | instrução de fim de transação condicional | |
BR112017021986A2 (pt) | sistema e método para extrair e compartilhar dados de usuário relacionados com aplicativo | |
BR112017024351A2 (pt) | arquitetura baseada em bloco com execução paralela de blocos sucessivos | |
BR112014019336A2 (pt) | ambiente e método para o desenvolvimento multi-plataforma de aplicações de software | |
BR112015030066A2 (pt) | processadores, métodos e sistemas para acessar um conjunto de registradores como uma pluralidade de registradores menores ou como um registrador maior combinado | |
BR112017002636A2 (pt) | compartilhamento equitativo de recursos de sistema em execução de fluxo de trabalho | |
BR112013030585A2 (pt) | monitoramento de saída de área demarcada | |
BR112012007445A2 (pt) | dados de treinamento de face compartilhados | |
BR112016007119A2 (pt) | domínios de falha em hardware moderno | |
BR112014021507A2 (pt) | Método e aparelho para compartilhar informação, e dispositivo de computador | |
BR112017004028A2 (pt) | sistema criptográfico, primeiro dispositivo de rede configurado para determinar uma chave compartilhada com qualquer um dentre múltiplos dispositivos de rede, método de compartilhamento para determinar uma chave compartilhada com qualquer um dentre múltiplos dispositivos de rede, e programa de computador | |
BR112015020394A2 (pt) | método para segurança de um primeiro programa, e, produto de software de computador | |
BR112014026626A8 (pt) | criação de grupos de rede social | |
BR112016007137A8 (pt) | sistema, meio de armazenamento e método para otimizar transferência de dados em plataformas de computação em nuvem | |
BR112015013917A2 (pt) | método, unidade de computação, e sistema | |
BR112018001970A2 (pt) | mecanismo de regras para dispositivos conectados | |
BR112018074025A2 (pt) | otimizador de consulta para utilização de cpu e reformador de código |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
B06U | Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette] | ||
B15K | Others concerning applications: alteration of classification |
Free format text: A CLASSIFICACAO ANTERIOR ERA: G06F 9/52 Ipc: G06F 9/52 (2006.01), G06F 9/38 (2006.01), G06F 9/3 |
|
B06A | Patent application procedure suspended [chapter 6.1 patent gazette] | ||
B09A | Decision: intention to grant [chapter 9.1 patent gazette] | ||
B16A | Patent or certificate of addition of invention granted [chapter 16.1 patent gazette] |
Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 07/08/2014, OBSERVADAS AS CONDICOES LEGAIS |