BR112012021121A2 - aparelho de processamento de dados, e, método de processamento de dados - Google Patents

aparelho de processamento de dados, e, método de processamento de dados

Info

Publication number
BR112012021121A2
BR112012021121A2 BR112012021121A BR112012021121A BR112012021121A2 BR 112012021121 A2 BR112012021121 A2 BR 112012021121A2 BR 112012021121 A BR112012021121 A BR 112012021121A BR 112012021121 A BR112012021121 A BR 112012021121A BR 112012021121 A2 BR112012021121 A2 BR 112012021121A2
Authority
BR
Brazil
Prior art keywords
processing circuitry
data processing
source
cache
transfer
Prior art date
Application number
BR112012021121A
Other languages
English (en)
Other versions
BR112012021121B1 (pt
Inventor
Richard Greenhalgh Peter
Original Assignee
Advanced Risc Mach Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Risc Mach Ltd filed Critical Advanced Risc Mach Ltd
Publication of BR112012021121A2 publication Critical patent/BR112012021121A2/pt
Publication of BR112012021121B1 publication Critical patent/BR112012021121B1/pt

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5094—Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Power Sources (AREA)

Abstract

aparelho de processamento de dados, e, método de processamento de dados. em resposta a um estímulo de transferência, o desempenho de uma carga de trabalho de processamento é transferido de um conjunto de circuitos de processamento de origem para um conjunto de circuitos de processamento de destino, em preparação para que o conjunto de circuito de processamento de origem seja colocado em uma condição de economia de energia seguindo à transferência. para reduzir o número de buscas na memória exigido pelo conjunto de circuitos de processamento de destino seguinte à transferência, um cache do conjunto de circuitos de processamento de origem é mantido em um estado energizado por um período de farejamento. durante o período de farejamento, o conjunto de circuitos de farejamento de cache fareja valores de dados no cache de origem e recupera os valores de dados de farejamento para o conjunto de circuitos de processamento de destino.
BR112012021121-8A 2010-03-01 2011-02-17 aparelho de processamento de dados, e, método de processamento de dados BR112012021121B1 (pt)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/659,230 US8533505B2 (en) 2010-03-01 2010-03-01 Data processing apparatus and method for transferring workload between source and destination processing circuitry
US12/659,230 2010-03-01
PCT/GB2011/050315 WO2011107775A1 (en) 2010-03-01 2011-02-17 Data processing apparatus and method for transferring workload between source and destination processing circuitry

Publications (2)

Publication Number Publication Date
BR112012021121A2 true BR112012021121A2 (pt) 2017-07-18
BR112012021121B1 BR112012021121B1 (pt) 2020-12-01

Family

ID=44209944

Family Applications (1)

Application Number Title Priority Date Filing Date
BR112012021121-8A BR112012021121B1 (pt) 2010-03-01 2011-02-17 aparelho de processamento de dados, e, método de processamento de dados

Country Status (10)

Country Link
US (2) US8533505B2 (pt)
JP (1) JP5702407B2 (pt)
KR (1) KR101740225B1 (pt)
CN (1) CN102804103B (pt)
BR (1) BR112012021121B1 (pt)
DE (1) DE112011100743B4 (pt)
GB (1) GB2490825B (pt)
IL (1) IL221269A (pt)
RU (2) RU2711336C2 (pt)
WO (1) WO2011107775A1 (pt)

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Also Published As

Publication number Publication date
US8533505B2 (en) 2013-09-10
RU2015107993A (ru) 2015-06-27
US9286222B2 (en) 2016-03-15
US20130311725A1 (en) 2013-11-21
CN102804103B (zh) 2015-08-12
RU2015107993A3 (pt) 2018-09-27
BR112012021121B1 (pt) 2020-12-01
WO2011107775A1 (en) 2011-09-09
IL221269A (en) 2017-02-28
RU2550535C2 (ru) 2015-05-10
DE112011100743B4 (de) 2014-07-10
IL221269A0 (en) 2012-10-31
JP2013521556A (ja) 2013-06-10
JP5702407B2 (ja) 2015-04-15
KR20130012120A (ko) 2013-02-01
US20110213993A1 (en) 2011-09-01
RU2711336C2 (ru) 2020-01-16
GB201214397D0 (en) 2012-09-26
CN102804103A (zh) 2012-11-28
DE112011100743T5 (de) 2013-06-06
GB2490825A (en) 2012-11-14
KR101740225B1 (ko) 2017-05-26
RU2012141563A (ru) 2014-04-10
GB2490825B (en) 2016-06-08

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B06F Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]
B06U Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]
B09A Decision: intention to grant [chapter 9.1 patent gazette]
B16A Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]

Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 17/02/2011, OBSERVADAS AS CONDICOES LEGAIS.