BR102013021930A2 - Método para sincronizar um número de instruções realizadas por uma pluralidade de processadores e sistema para sincronizar processadores - Google Patents

Método para sincronizar um número de instruções realizadas por uma pluralidade de processadores e sistema para sincronizar processadores Download PDF

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Publication number
BR102013021930A2
BR102013021930A2 BRBR102013021930-4A BR102013021930A BR102013021930A2 BR 102013021930 A2 BR102013021930 A2 BR 102013021930A2 BR 102013021930 A BR102013021930 A BR 102013021930A BR 102013021930 A2 BR102013021930 A2 BR 102013021930A2
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BR
Brazil
Prior art keywords
instructions
processor
total number
time
iteration
Prior art date
Application number
BRBR102013021930-4A
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English (en)
Portuguese (pt)
Inventor
Willian David Ii Smithi
Jon Marc Diekema
Safayet Nizam Uddin Ahmed
Original Assignee
Gen Electric
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Gen Electric filed Critical Gen Electric
Publication of BR102013021930A2 publication Critical patent/BR102013021930A2/pt

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G06F9/4887—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues involving deadlines, e.g. rate based, periodic
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1691—Temporal synchronisation or re-synchronisation of redundant processing components using a quantum
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/182—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits based on mutual exchange of the output between redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/815—Virtual

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
  • Devices For Executing Special Programs (AREA)
BRBR102013021930-4A 2012-09-14 2013-08-28 Método para sincronizar um número de instruções realizadas por uma pluralidade de processadores e sistema para sincronizar processadores BR102013021930A2 (pt)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/620,047 US9342358B2 (en) 2012-09-14 2012-09-14 System and method for synchronizing processor instruction execution

Publications (1)

Publication Number Publication Date
BR102013021930A2 true BR102013021930A2 (pt) 2015-01-27

Family

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BRBR102013021930-4A BR102013021930A2 (pt) 2012-09-14 2013-08-28 Método para sincronizar um número de instruções realizadas por uma pluralidade de processadores e sistema para sincronizar processadores

Country Status (6)

Country Link
US (1) US9342358B2 (enExample)
EP (1) EP2709010B1 (enExample)
JP (1) JP6196855B2 (enExample)
CN (1) CN103677756B (enExample)
BR (1) BR102013021930A2 (enExample)
CA (1) CA2826572A1 (enExample)

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CN106445852B (zh) * 2016-08-12 2019-05-14 中国航空工业集团公司西安飞行自动控制研究所 一种基于自监控架构的任务间通讯装置与方法
US10452446B1 (en) * 2017-06-07 2019-10-22 Rockwell Collins, Inc. High integrity multi-core processing
CN111767078B (zh) * 2019-04-02 2024-08-06 上海寒武纪信息科技有限公司 数据运行方法、装置和相关产品
FR3108993A1 (fr) * 2020-04-07 2021-10-08 Airbus Operations Procédé et système de synchronisation d’unités de calcul d’un aéronef.

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Also Published As

Publication number Publication date
JP2014059870A (ja) 2014-04-03
CN103677756A (zh) 2014-03-26
CN103677756B (zh) 2018-08-10
US9342358B2 (en) 2016-05-17
EP2709010B1 (en) 2016-11-09
CA2826572A1 (en) 2014-03-14
US20140082331A1 (en) 2014-03-20
JP6196855B2 (ja) 2017-09-13
EP2709010A1 (en) 2014-03-19

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