BG108866A - Method for developing a security document with integrated circuit - Google Patents

Method for developing a security document with integrated circuit

Info

Publication number
BG108866A
BG108866A BG108866A BG10886604A BG108866A BG 108866 A BG108866 A BG 108866A BG 108866 A BG108866 A BG 108866A BG 10886604 A BG10886604 A BG 10886604A BG 108866 A BG108866 A BG 108866A
Authority
BG
Bulgaria
Prior art keywords
integrated circuit
developing
security document
chip
document
Prior art date
Application number
BG108866A
Other languages
Bulgarian (bg)
Other versions
BG66267B1 (en
Inventor
Thierry Dumery
Original Assignee
Banque De France
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Banque De France filed Critical Banque De France
Publication of BG108866A publication Critical patent/BG108866A/en
Publication of BG66267B1 publication Critical patent/BG66267B1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K19/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic element specially adapted for rectifying, amplifying, oscillating or switching, covered by group H10K10/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/10—Deposition of organic active material
    • H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
    • H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
    • H10K71/135—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing using ink-jet printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40—Organic transistors
    • H10K10/46—Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10—Organic polymers or oligomers
    • H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
    • H10K85/113—Heteroaromatic compounds comprising sulfur or selene, e.g. polythiophene
    • H10K85/1135—Polyethylene dioxythiophene [PEDOT]; Derivatives thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10—Organic polymers or oligomers
    • H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
    • H10K85/115—Polyfluorene; Derivatives thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Storage Device Security (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

The invention relates to a method for developing documents protected with a chip (integrated circuit). By the method the chip is built-in directly into part of the document.
BG108866A 2002-02-19 2004-09-02 Method for developing a security document with integrated circuit BG66267B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0202070A FR2836263B1 (en) 2002-02-19 2002-02-19 INTEGRATED CIRCUIT SAFETY DOCUMENT
PCT/FR2003/000548 WO2003077326A2 (en) 2002-02-19 2003-02-19 Security document with integrated circuit

Publications (2)

Publication Number Publication Date
BG108866A true BG108866A (en) 2005-10-31
BG66267B1 BG66267B1 (en) 2012-10-31

Family

ID=27636299

Family Applications (1)

Application Number Title Priority Date Filing Date
BG108866A BG66267B1 (en) 2002-02-19 2004-09-02 Method for developing a security document with integrated circuit

Country Status (8)

Country Link
EP (1) EP1502312A2 (en)
AU (1) AU2003238141A1 (en)
BG (1) BG66267B1 (en)
FR (1) FR2836263B1 (en)
MA (1) MA27179A1 (en)
MD (1) MD20040204A (en)
OA (1) OA12775A (en)
WO (1) WO2003077326A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CZ2005209A3 (en) * 2002-09-10 2005-12-14 Ivi Smart Technologies, Inc. Safe biometric verification of identity
DE102009053955A1 (en) * 2009-11-19 2011-05-26 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Process for the preparation of structured organic light-emitting diodes and their use

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1027723B1 (en) * 1997-10-14 2009-06-17 Patterning Technologies Limited Method of forming an electric capacitor
WO2001047043A1 (en) * 1999-12-21 2001-06-28 Plastic Logic Limited Solution processed devices

Also Published As

Publication number Publication date
EP1502312A2 (en) 2005-02-02
FR2836263B1 (en) 2005-02-04
MD20040204A (en) 2004-12-31
FR2836263A1 (en) 2003-08-22
OA12775A (en) 2006-07-06
BG66267B1 (en) 2012-10-31
WO2003077326A2 (en) 2003-09-18
AU2003238141A1 (en) 2003-09-22
WO2003077326A3 (en) 2004-03-04
MA27179A1 (en) 2005-01-03
AU2003238141A8 (en) 2003-09-22

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