BE887906A - RESPONDING COMPUTER SYSTEM - Google Patents

RESPONDING COMPUTER SYSTEM

Info

Publication number
BE887906A
BE887906A BE2/59049A BE2059049A BE887906A BE 887906 A BE887906 A BE 887906A BE 2/59049 A BE2/59049 A BE 2/59049A BE 2059049 A BE2059049 A BE 2059049A BE 887906 A BE887906 A BE 887906A
Authority
BE
Belgium
Prior art keywords
computer system
responding computer
responding
computer
Prior art date
Application number
BE2/59049A
Other languages
French (fr)
Inventor
H Ubel
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Publication of BE887906A publication Critical patent/BE887906A/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1633Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/18Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
    • G06F11/187Voting techniques
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/83Indexing scheme relating to error detection, to error correction, and to monitoring the solution involving signatures

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
BE2/59049A 1980-03-12 1981-03-12 RESPONDING COMPUTER SYSTEM BE887906A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19803009355 DE3009355C2 (en) 1980-03-12 1980-03-12 Redundant computing system

Publications (1)

Publication Number Publication Date
BE887906A true BE887906A (en) 1981-09-14

Family

ID=6096896

Family Applications (1)

Application Number Title Priority Date Filing Date
BE2/59049A BE887906A (en) 1980-03-12 1981-03-12 RESPONDING COMPUTER SYSTEM

Country Status (5)

Country Link
BE (1) BE887906A (en)
CH (1) CH652838A5 (en)
DE (1) DE3009355C2 (en)
ES (1) ES500296A0 (en)
YU (1) YU41455B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3324313A1 (en) * 1983-07-06 1985-01-17 Standard Elektrik Lorenz Ag, 7000 Stuttgart Device for the failsafe representation of information on a data display device
BG48904A1 (en) * 1985-04-30 1991-06-14 Werk Signal Sicherungstech Veb Device for connecting of computers
DE102009054637A1 (en) * 2009-12-15 2011-06-16 Robert Bosch Gmbh Method for operating a computing unit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2108496C3 (en) * 1971-02-23 1978-12-14 Standard Elektrik Lorenz Ag, 7000 Stuttgart Circuit arrangement for the continuous functional control of the information processing and the output of data telegrams, in particular for process computer-controlled railway signal systems
DE2303828A1 (en) * 1973-01-26 1974-08-01 Standard Elektrik Lorenz Ag CONTROL PROCEDURE WITH THREE COMPUTERS OPERATING IN PARALLEL

Also Published As

Publication number Publication date
ES8201330A1 (en) 1981-12-16
YU64281A (en) 1983-06-30
CH652838A5 (en) 1985-11-29
ES500296A0 (en) 1981-12-16
DE3009355C2 (en) 1984-08-30
DE3009355A1 (en) 1981-09-17
YU41455B (en) 1987-06-30

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: ALCATEL N.V.

Effective date: 19990331