BE876628A - PROCESS AND CIRCUIT FOR PERFORMING ERROR CHECKS IN MEMORY SYSTEMS OF DIGITAL COMPUTERS - Google Patents

PROCESS AND CIRCUIT FOR PERFORMING ERROR CHECKS IN MEMORY SYSTEMS OF DIGITAL COMPUTERS

Info

Publication number
BE876628A
BE876628A BE2/57829A BE2057829A BE876628A BE 876628 A BE876628 A BE 876628A BE 2/57829 A BE2/57829 A BE 2/57829A BE 2057829 A BE2057829 A BE 2057829A BE 876628 A BE876628 A BE 876628A
Authority
BE
Belgium
Prior art keywords
circuit
memory systems
performing error
digital computers
error checks
Prior art date
Application number
BE2/57829A
Other languages
French (fr)
Inventor
P Gabler
D Hornburger
Original Assignee
Int Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Int Standard Electric Corp filed Critical Int Standard Electric Corp
Publication of BE876628A publication Critical patent/BE876628A/en

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1044Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
BE2/57829A 1978-05-30 1979-05-30 PROCESS AND CIRCUIT FOR PERFORMING ERROR CHECKS IN MEMORY SYSTEMS OF DIGITAL COMPUTERS BE876628A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782823457 DE2823457C2 (en) 1978-05-30 1978-05-30 Circuit arrangement for error monitoring of a memory of a digital computer system

Publications (1)

Publication Number Publication Date
BE876628A true BE876628A (en) 1979-11-30

Family

ID=6040486

Family Applications (1)

Application Number Title Priority Date Filing Date
BE2/57829A BE876628A (en) 1978-05-30 1979-05-30 PROCESS AND CIRCUIT FOR PERFORMING ERROR CHECKS IN MEMORY SYSTEMS OF DIGITAL COMPUTERS

Country Status (4)

Country Link
BE (1) BE876628A (en)
BR (1) BR7902981A (en)
DE (1) DE2823457C2 (en)
FR (1) FR2427647A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5177743A (en) * 1982-02-15 1993-01-05 Hitachi, Ltd. Semiconductor memory
JPS58139399A (en) * 1982-02-15 1983-08-18 Hitachi Ltd Semiconductor storage device
US4943967A (en) * 1982-02-15 1990-07-24 Hitachi, Ltd. Semiconductor memory with an improved dummy cell arrangement and with a built-in error correction code circuit
DE3470242D1 (en) * 1983-10-05 1988-05-05 Nippon Musical Instruments Mfg Data processing circuit for digital audio system
DE3612730A1 (en) * 1986-04-16 1987-10-22 Ant Nachrichtentech Processor system
JP2617026B2 (en) * 1989-12-22 1997-06-04 インターナショナル・ビジネス・マシーンズ・コーポレーション Fault Tolerant Memory System
US5177744A (en) * 1990-09-04 1993-01-05 International Business Machines Corporation Method and apparatus for error recovery in arrays

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3037697A (en) * 1959-06-17 1962-06-05 Honeywell Regulator Co Information handling apparatus
NL149927B (en) * 1968-02-19 1976-06-15 Philips Nv WORD ORGANIZED MEMORY.
US3685015A (en) * 1970-10-06 1972-08-15 Xerox Corp Character bit error detection and correction
US3737870A (en) * 1972-04-24 1973-06-05 Ibm Status switching arrangement
US3794819A (en) * 1972-07-03 1974-02-26 Advanced Memory Syst Inc Error correction method and apparatus
GB1472885A (en) * 1974-05-01 1977-05-11 Int Computers Ltd Digital code conversion arrangements
FR2319953A1 (en) * 1975-07-28 1977-02-25 Labo Cent Telecommunicat MEMORY RECONFIGURATION DEVICE

Also Published As

Publication number Publication date
DE2823457A1 (en) 1979-12-13
FR2427647A1 (en) 1979-12-28
BR7902981A (en) 1979-11-27
DE2823457C2 (en) 1982-12-30

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Legal Events

Date Code Title Description
RE Patent lapsed

Owner name: INTERNATIONAL STANDARD ELECTRIC CORP.

Effective date: 19840530