BE712656A - - Google Patents
Info
- Publication number
- BE712656A BE712656A BE712656DA BE712656A BE 712656 A BE712656 A BE 712656A BE 712656D A BE712656D A BE 712656DA BE 712656 A BE712656 A BE 712656A
- Authority
- BE
- Belgium
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
- H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
- H10D84/0119—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs
- H10D84/0121—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs the components including complementary BJTs the complementary BJTs being vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
- H10D84/673—Vertical complementary BJTs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Integrated Circuits (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US65050267A | 1967-06-30 | 1967-06-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
BE712656A true BE712656A (en:Method) | 1968-07-31 |
Family
ID=24609190
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BE712656D BE712656A (en:Method) | 1967-06-30 | 1968-03-22 |
Country Status (5)
Country | Link |
---|---|
US (1) | US3473090A (en:Method) |
BE (1) | BE712656A (en:Method) |
ES (2) | ES352147A1 (en:Method) |
FR (1) | FR1560063A (en:Method) |
NL (1) | NL6804352A (en:Method) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3611067A (en) * | 1970-04-20 | 1971-10-05 | Fairchild Camera Instr Co | Complementary npn/pnp structure for monolithic integrated circuits |
IT946150B (it) * | 1971-12-15 | 1973-05-21 | Ates Componenti Elettron | Perfezionamento al processo plana re epistssiale per la produzione di circuiti integrati lineari di potenza |
DE3361832D1 (en) * | 1982-04-19 | 1986-02-27 | Matsushita Electric Ind Co Ltd | Semiconductor ic and method of making the same |
IT1298516B1 (it) * | 1998-01-30 | 2000-01-12 | Sgs Thomson Microelectronics | Dispositivo elettronico di potenza integrato su un materiale semiconduttore e relativo processo di fabricazione |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3327182A (en) * | 1965-06-14 | 1967-06-20 | Westinghouse Electric Corp | Semiconductor integrated circuit structure and method of making the same |
US3370995A (en) * | 1965-08-02 | 1968-02-27 | Texas Instruments Inc | Method for fabricating electrically isolated semiconductor devices in integrated circuits |
US3380153A (en) * | 1965-09-30 | 1968-04-30 | Westinghouse Electric Corp | Method of forming a semiconductor integrated circuit that includes a fast switching transistor |
-
1967
- 1967-06-30 US US650502A patent/US3473090A/en not_active Expired - Lifetime
-
1968
- 1968-03-22 BE BE712656D patent/BE712656A/xx unknown
- 1968-03-28 NL NL6804352A patent/NL6804352A/xx unknown
- 1968-03-29 FR FR1560063D patent/FR1560063A/fr not_active Expired
- 1968-03-29 ES ES352147A patent/ES352147A1/es not_active Expired
-
1969
- 1969-04-22 ES ES366326A patent/ES366326A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US3473090A (en) | 1969-10-14 |
NL6804352A (en:Method) | 1968-12-31 |
FR1560063A (en:Method) | 1969-03-14 |
ES366326A1 (es) | 1971-03-16 |
ES352147A1 (es) | 1969-07-16 |