BE690509A - - Google Patents

Info

Publication number
BE690509A
BE690509A BE690509DA BE690509A BE 690509 A BE690509 A BE 690509A BE 690509D A BE690509D A BE 690509DA BE 690509 A BE690509 A BE 690509A
Authority
BE
Belgium
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of BE690509A publication Critical patent/BE690509A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
BE690509D 1965-12-02 1966-12-01 BE690509A (US07118763-20061010-C00002.png)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US51115965A 1965-12-02 1965-12-02

Publications (1)

Publication Number Publication Date
BE690509A true BE690509A (US07118763-20061010-C00002.png) 1967-05-16

Family

ID=24033689

Family Applications (1)

Application Number Title Priority Date Filing Date
BE690509D BE690509A (US07118763-20061010-C00002.png) 1965-12-02 1966-12-01

Country Status (6)

Country Link
US (1) US3469239A (US07118763-20061010-C00002.png)
BE (1) BE690509A (US07118763-20061010-C00002.png)
CH (1) CH456993A (US07118763-20061010-C00002.png)
DE (1) DE1524134B1 (US07118763-20061010-C00002.png)
FR (1) FR1502271A (US07118763-20061010-C00002.png)
NL (1) NL161599C (US07118763-20061010-C00002.png)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3533073A (en) * 1967-09-12 1970-10-06 Automatic Elect Lab Digital control and memory arrangement,particularly for a communication switching system
US3670309A (en) * 1969-12-23 1972-06-13 Ibm Storage control system
US3683418A (en) * 1970-04-16 1972-08-08 Bell Telephone Labor Inc Method of protecting data in a multiprocessor computer system
US3654617A (en) * 1970-10-01 1972-04-04 Ibm Microprogrammable i/o controller
US3676860A (en) * 1970-12-28 1972-07-11 Ibm Interactive tie-breaking system
US3725872A (en) * 1971-03-03 1973-04-03 Burroughs Corp Data processing system having status indicating and storage means
US3812471A (en) * 1972-08-30 1974-05-21 Sperry Rand Corp I/o device reserve system for a data processor
US4135240A (en) * 1973-07-09 1979-01-16 Bell Telephone Laboratories, Incorporated Protection of data file contents
US4162529A (en) * 1975-12-04 1979-07-24 Tokyo Shibaura Electric Co., Ltd. Interruption control system in a multiprocessing system
US4212057A (en) * 1976-04-22 1980-07-08 General Electric Company Shared memory multi-microprocessor computer system
US4224664A (en) * 1976-05-07 1980-09-23 Honeywell Information Systems Inc. Apparatus for detecting when the activity of one process in relation to a common piece of information interferes with any other process in a multiprogramming/multiprocessing computer system
US4065809A (en) * 1976-05-27 1977-12-27 Tokyo Shibaura Electric Co., Ltd. Multi-processing system for controlling microcomputers and memories
US4169289A (en) * 1977-07-08 1979-09-25 Bell Telephone Laboratories, Incorporated Data processor with improved cyclic data buffer apparatus
US4136386A (en) * 1977-10-06 1979-01-23 International Business Machines Corporation Backing store access coordination in a multi-processor system
JPS588018B2 (ja) * 1978-09-14 1983-02-14 日本電気株式会社 多重プロセッサシステム
US4488217A (en) * 1979-03-12 1984-12-11 Digital Equipment Corporation Data processing system with lock-unlock instruction facility
US4354227A (en) * 1979-11-19 1982-10-12 International Business Machines Corp. Fixed resource allocation method and apparatus for multiprocessor systems having complementarily phased cycles
US4399504A (en) * 1980-10-06 1983-08-16 International Business Machines Corporation Method and means for the sharing of data resources in a multiprocessing, multiprogramming environment
US4597084A (en) * 1981-10-01 1986-06-24 Stratus Computer, Inc. Computer memory apparatus
US4866604A (en) * 1981-10-01 1989-09-12 Stratus Computer, Inc. Digital data processing apparatus with pipelined memory cycles
JPH0812621B2 (ja) * 1981-10-01 1996-02-07 ストレイタス・コンピュータ・インコーポレイテッド 情報転送方法及び装置
US4453215A (en) * 1981-10-01 1984-06-05 Stratus Computer, Inc. Central processing apparatus for fault-tolerant computing
US4891749A (en) * 1983-03-28 1990-01-02 International Business Machines Corporation Multiprocessor storage serialization apparatus
US4567562A (en) * 1983-07-21 1986-01-28 Burroughs Corporation Controller for controlling access to a plurality of records that can be accessed and changed by several independent processors
JPH0760422B2 (ja) * 1983-12-30 1995-06-28 株式会社日立製作所 記憶ロツク方式
US4561051A (en) * 1984-02-10 1985-12-24 Prime Computer, Inc. Memory access method and apparatus in multiple processor systems
US4616315A (en) * 1985-01-11 1986-10-07 Burroughs Corporation System memory for a reduction processor evaluating programs stored as binary directed graphs employing variable-free applicative language codes
US4816990A (en) * 1986-11-05 1989-03-28 Stratus Computer, Inc. Method and apparatus for fault-tolerant computer system having expandable processor section
US5327564A (en) * 1988-03-04 1994-07-05 Dallas Semiconductor Corporation Timed access system for protecting data in a central processing unit
US5666515A (en) * 1993-02-18 1997-09-09 Unisys Corporation Information processing system having multiple modules and a memory on a bus, where any module can lock an addressable portion of the memory by sending retry signals to other modules that try to read at the locked address
US6802022B1 (en) 2000-04-14 2004-10-05 Stratus Technologies Bermuda Ltd. Maintenance of consistent, redundant mass storage images
US6862689B2 (en) 2001-04-12 2005-03-01 Stratus Technologies Bermuda Ltd. Method and apparatus for managing session information
US6948010B2 (en) * 2000-12-20 2005-09-20 Stratus Technologies Bermuda Ltd. Method and apparatus for efficiently moving portions of a memory block
US6766413B2 (en) 2001-03-01 2004-07-20 Stratus Technologies Bermuda Ltd. Systems and methods for caching with file-level granularity
US6874102B2 (en) * 2001-03-05 2005-03-29 Stratus Technologies Bermuda Ltd. Coordinated recalibration of high bandwidth memories in a multiprocessor computer
FI20020210A (fi) * 2002-02-04 2003-08-05 Nokia Corp Moniprosessoriympäristöön tarkoitettu laitteistopohjainen opastin

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3346851A (en) * 1964-07-08 1967-10-10 Control Data Corp Simultaneous multiprocessing computer system
US3348210A (en) * 1964-12-07 1967-10-17 Bell Telephone Labor Inc Digital computer employing plural processors

Also Published As

Publication number Publication date
NL161599C (nl) 1980-02-15
DE1524134B1 (de) 1972-03-09
NL6616890A (US07118763-20061010-C00002.png) 1967-06-05
US3469239A (en) 1969-09-23
FR1502271A (fr) 1967-11-18
NL161599B (nl) 1979-09-17
CH456993A (de) 1968-05-31

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Legal Events

Date Code Title Description
RE20 Patent expired

Owner name: HUGHES AIRCRAFT CY

Effective date: 19861201