BE668330A - - Google Patents

Info

Publication number
BE668330A
BE668330A BE668330DA BE668330A BE 668330 A BE668330 A BE 668330A BE 668330D A BE668330D A BE 668330DA BE 668330 A BE668330 A BE 668330A
Authority
BE
Belgium
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Publication of BE668330A publication Critical patent/BE668330A/xx

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06GANALOGUE COMPUTERS
    • G06G7/00Devices in which the computing operation is performed by varying electric or magnetic quantities
    • G06G7/06Programming arrangements, e.g. plugboard for interconnecting functional units of the computer; Digital programming

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Control Of Eletrric Generators (AREA)
  • Feedback Control In General (AREA)
BE668330D 1965-07-06 BE668330A (en:Method)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2860465A GB1113124A (en) 1965-07-06 1965-07-06 Convergence error reduction apparatus for use with repetitive analogue computers

Publications (1)

Publication Number Publication Date
BE668330A true BE668330A (en:Method)

Family

ID=10278242

Family Applications (1)

Application Number Title Priority Date Filing Date
BE668330D BE668330A (en:Method) 1965-07-06

Country Status (2)

Country Link
BE (1) BE668330A (en:Method)
GB (1) GB1113124A (en:Method)

Also Published As

Publication number Publication date
GB1113124A (en) 1968-05-08

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