GB1113124A - Convergence error reduction apparatus for use with repetitive analogue computers - Google Patents

Abstract

1,113,124. Iterative analogue computers. ESSO RESEARCH & ENGINEERING CO. 6 July, 1965, No. 28604/65. Heading G4G. In analogue computer for solving, e.g. the expression dy/dx = - ky, where k is a known constant and y = yf for x = xf, it is required to determine y = y 0 for x = x 0 . An integrator 10 receives analogue dy signal - to produce an output and dx potentiometer 11 is set to constant K to feed back an analogue of Ky to the integrator input, so that Ky = -dy/dx and the output represents the calculated value thereof. Amplifier 12 reverses the sign of y and applies the - analogue to sununation bus-bar 13 together with an analogue from potentiometer 14 representing yf, the known value of y for x = xf. Integrator 15 receives the analogue of -dx/dt postulated = (-1) from potentiometer 28 where t is computer time, and the output representing X is applied to polarity sensitive comparator 16 together with the analogue of - x f from potentiometer 17. The comparator generates a square-wave pulse which is non-symmetrical as x - x j changes polarity, applied to amplifier 18 also receiving preset voltage from potentiometer 20, to render the square-wave symmetrical about zero at the amplifier output, which is applied to the summation bus-bar 13 and over amplifier 19 and the anode-cathode circuit of crystal diode 21 to the input of convergence integrator 26A. This also receives the combined signal on bus-bar 13 over the cathode-anode circuit of crystal diode 25, and the integrated output of 26A is fed back to integrator 10. It is shown that while O < x < x # the convergence integrator 26A is inoperative due to non-conductivity of diodes 21, 25, and when x#x#, diodes 21, 25 conduct and the voltage at the input of 26A represents the error difference between the known and computed values of y at x = x f (Fig. 1, not shown), which is integrated for a short time interval immediately preceding reset of integrators 10, 15, which are externally and alternately triggered. As the computer resets and the input value of x is restored to zero, x f > x and diodes 21, 25 cease to conduct; interrupting the input to convergence integrator 26A whose capacitance 26 stores the error voltage between the known and calculated values of y# at x = x#. This voltage is fed back to integrator 10 to reduce the error between the known and computed values of y o , and the calculation is repeated iteratively with successive corrections until y - y# = 0 for x = x# and the output of integrator 26A equals the initially unknown value y 0 at x = x 0 and remains constant for subsequent operations; the input -dy/dx and output y of integrator 10 being connected in common with all points in an analogue computer receiving the same values. In a modification (Fig. 5, not shown), the initial condition of integrator 10 is set by a further potentiometer representing y 0 and the output of the convergence integrator 26A operates a servo multiplier replacing potentiometer 11 across integrator 10 and set to constant k by repetitive convergent adjustments to produce a signal representing Ky. The apparatus is applicable to generalized analogue computers.