BE504436A - - Google Patents
Info
- Publication number
- BE504436A BE504436A BE504436DA BE504436A BE 504436 A BE504436 A BE 504436A BE 504436D A BE504436D A BE 504436DA BE 504436 A BE504436 A BE 504436A
- Authority
- BE
- Belgium
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/504—Adding; Subtracting in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other
- G06F7/5045—Adding; Subtracting in bit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other for multiple operands
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Analysis (AREA)
- Computational Mathematics (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Dram (AREA)
- Measurement Of Current Or Voltage (AREA)
- Pulse Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR1030471T | 1951-01-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| BE504436A true BE504436A (en:Method) |
Family
ID=9346069
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| BE504436D BE504436A (en:Method) | 1951-01-04 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US2812903A (en:Method) |
| BE (1) | BE504436A (en:Method) |
| DE (1) | DE868226C (en:Method) |
| FR (1) | FR1030471A (en:Method) |
| GB (1) | GB732902A (en:Method) |
| NL (1) | NL158533C (en:Method) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1042827A (fr) * | 1951-03-29 | 1953-11-04 | Electronique & Automatisme Sa | Dispositifs pour l'addition et la soustraction de deux grandeurs |
| NL91975C (en:Method) * | 1951-09-25 | |||
| US2888202A (en) * | 1953-11-25 | 1959-05-26 | Hughes Aircraft Co | Multiple input binary adder-subtracters |
| NL197255A (en:Method) * | 1954-05-14 | |||
| US2982472A (en) * | 1955-05-02 | 1961-05-02 | Harry D Huskey | Binary digital computer with magnetic drum storage |
| US2936957A (en) * | 1956-01-30 | 1960-05-17 | Smith Corona Marchant Inc | Calculating machines |
| US2881979A (en) * | 1956-06-07 | 1959-04-14 | Burroughs Corp | Binary adder |
| GB857949A (en) * | 1958-06-05 | 1961-01-04 | Roe A V & Co Ltd | Improvements relating to digital computing engines |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2590950A (en) * | 1950-11-16 | 1952-04-01 | Eckert Mauchly Comp Corp | Signal responsive circuit |
-
0
- NL NL158533D patent/NL158533C/xx active
- BE BE504436D patent/BE504436A/xx unknown
-
1951
- 1951-01-04 FR FR1030471D patent/FR1030471A/fr not_active Expired
- 1951-04-19 US US221775A patent/US2812903A/en not_active Expired - Lifetime
- 1951-06-28 DE DEC4378A patent/DE868226C/de not_active Expired
- 1951-08-23 GB GB19945/51A patent/GB732902A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FR1030471A (fr) | 1953-06-15 |
| GB732902A (en) | 1955-06-29 |
| US2812903A (en) | 1957-11-12 |
| NL158533C (en:Method) | |
| DE868226C (de) | 1953-02-23 |