AU8428082A - Cross-talk/echo compensation - Google Patents

Cross-talk/echo compensation

Info

Publication number
AU8428082A
AU8428082A AU84280/82A AU8428082A AU8428082A AU 8428082 A AU8428082 A AU 8428082A AU 84280/82 A AU84280/82 A AU 84280/82A AU 8428082 A AU8428082 A AU 8428082A AU 8428082 A AU8428082 A AU 8428082A
Authority
AU
Australia
Prior art keywords
signal
compensation
wire line
input
arm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
AU84280/82A
Other versions
AU554002B2 (en
Inventor
Winfrid Birth
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of AU8428082A publication Critical patent/AU8428082A/en
Application granted granted Critical
Publication of AU554002B2 publication Critical patent/AU554002B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/231—Echo cancellers using readout of a memory to provide the echo replica
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/238—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using initial training sequence

Landscapes

  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Engineering & Computer Science (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Piezo-Electric Transducers For Audible Bands (AREA)
  • Interface Circuits In Exchanges (AREA)
  • Transducers For Ultrasonic Waves (AREA)
  • Dc Digital Transmission (AREA)
  • Paper (AREA)
  • Stereophonic System (AREA)
  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Bidirectional Digital Transmission (AREA)

Abstract

1. A digital telecommunications system comprising a crosstalk- and/or echo compensation circuit which is arranged between a four-wire line transmitting arm (VS), in particular the four-wire line arm incoming into a hybrid circuit (G), and a four-wire line receiving arm (VE), in particular the four-wire line arm outgoing from the hybrid circuit (G), and comprising a compensation signal store (KS) which can be operated in accordance with transmitted signal pulses occurring in the incoming four-wire line arm, where the crosstalk- and/or echo signal which occurs in the outgoing four-wire line arm as a result of a transmitted signal pulse occurring in the incoming four-line arm is input into the compensation signal store (KS) and, during a signal transmission, in response to each transmitted signal pulse, is read out therefrom as compensation signal, characterised in that the compensation signal store (KS) comprises a plurality (r) of circulating shift registers (UR), each of which has a circulation time equal to n-times (where n = 1, 2, 3 ...) a transmission signal bit time interval (tau 0 ) and a corresponding number n of outputs which follow one another at intervals corresponding to a transmission signal bit time interval (tau 0 ) and which are combined by a following evaluation- and addition circuit (ADD), into which circulating shift registers partial-compensation signals, obtained in the course of a series of isolated transmitted signal pulses, are input, where the echo- and/or crosstalk signal which directly corresponds to a transmitted signal pulse is input, in quantised and coded form, into the first circulating shift register (UR1) as partial-compensation signal and into the following circulating shift registers (..., URr) is input successively the respective echo and/or crosstalk signal, which has been sub-compensated by the partial-compensation signal(s) already input into a circulating shift register (UR1, ...), as further partial-compensation signal.
AU84280/82A 1981-05-29 1982-05-28 Cross-talk/echo compensation Ceased AU554002B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE31215459 1981-05-29
DE3121545A DE3121545C2 (en) 1981-05-29 1981-05-29 Crosstalk and / or Echo cancellation circuit

Publications (2)

Publication Number Publication Date
AU8428082A true AU8428082A (en) 1982-12-02
AU554002B2 AU554002B2 (en) 1986-08-07

Family

ID=6133568

Family Applications (1)

Application Number Title Priority Date Filing Date
AU84280/82A Ceased AU554002B2 (en) 1981-05-29 1982-05-28 Cross-talk/echo compensation

Country Status (9)

Country Link
EP (1) EP0066006B1 (en)
JP (1) JPS57203354A (en)
AT (1) ATE22635T1 (en)
AU (1) AU554002B2 (en)
BR (1) BR8203166A (en)
DE (1) DE3121545C2 (en)
LU (1) LU83692A1 (en)
SU (1) SU1605937A3 (en)
ZA (1) ZA823769B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU567957B2 (en) * 1983-07-29 1987-12-10 Siemens Aktiengesellschaft Digital echo cancellation
AU570380B2 (en) * 1983-08-10 1988-03-10 N.V. Philips Gloeilampenfabrieken Data transmission system

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1186029A (en) * 1982-06-11 1985-04-23 Gordon F. Mein Automatic correction circuit for received digitally encoded signals
JPH0886241A (en) * 1994-09-16 1996-04-02 Hitachi Ltd Drive device for sensor and actuator

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH423875A (en) * 1964-07-23 1966-11-15 Gretag Ag Method and device for the transmission of messages over channels of limited bandwidth
US3426281A (en) * 1966-02-28 1969-02-04 Us Army Reception of time dispersed signals utilizing impulse response storage in recirculating delay lines
JPS5128413A (en) * 1974-09-03 1976-03-10 Nippon Electric Co TEKIOGATAHANKYOSHOKYOSOCHI
US4024358A (en) * 1975-10-31 1977-05-17 Communications Satellite Corporation (Comsat) Adaptive echo canceller using differential pulse code modulation encoding
NO140648C (en) * 1977-10-24 1983-03-29 Elektrisk Bureau As DIRECTIVE CONNECTOR.
JPS5829023B2 (en) * 1978-07-10 1983-06-20 富士通株式会社 data communication equipment
DE2853167C2 (en) * 1978-12-08 1980-10-30 Siemens Ag, 1000 Berlin Und 8000 Muenchen Subscriber circuit
JPS55123243A (en) * 1979-03-16 1980-09-22 Fujitsu Ltd Echo canceler
DE2920575C2 (en) * 1979-05-21 1981-09-17 Siemens AG, 1000 Berlin und 8000 München Digital telecommunications system with at least one four-wire line section
DE3116863C2 (en) * 1981-04-28 1985-08-08 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for digital signal echo cancellation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU567957B2 (en) * 1983-07-29 1987-12-10 Siemens Aktiengesellschaft Digital echo cancellation
AU570380B2 (en) * 1983-08-10 1988-03-10 N.V. Philips Gloeilampenfabrieken Data transmission system

Also Published As

Publication number Publication date
SU1605937A3 (en) 1990-11-07
DE3121545C2 (en) 1986-12-04
EP0066006A3 (en) 1984-01-11
JPS57203354A (en) 1982-12-13
AU554002B2 (en) 1986-08-07
ZA823769B (en) 1983-03-30
EP0066006B1 (en) 1986-10-01
LU83692A1 (en) 1982-02-18
BR8203166A (en) 1983-05-17
EP0066006A2 (en) 1982-12-08
ATE22635T1 (en) 1986-10-15
DE3121545A1 (en) 1982-12-23

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