AU7604494A - Flip chip in metal electronic packages - Google Patents
Flip chip in metal electronic packagesInfo
- Publication number
- AU7604494A AU7604494A AU76044/94A AU7604494A AU7604494A AU 7604494 A AU7604494 A AU 7604494A AU 76044/94 A AU76044/94 A AU 76044/94A AU 7604494 A AU7604494 A AU 7604494A AU 7604494 A AU7604494 A AU 7604494A
- Authority
- AU
- Australia
- Prior art keywords
- flip chip
- electronic packages
- metal electronic
- metal
- packages
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/06—Containers; Seals characterised by the material of the container or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/22—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device liquid at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01025—Manganese [Mn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12060993A | 1993-09-13 | 1993-09-13 | |
US120609 | 1993-09-13 | ||
PCT/US1994/009612 WO1995008188A1 (en) | 1993-09-13 | 1994-08-29 | Flip chip in metal electronic packages |
Publications (1)
Publication Number | Publication Date |
---|---|
AU7604494A true AU7604494A (en) | 1995-04-03 |
Family
ID=22391431
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU76044/94A Abandoned AU7604494A (en) | 1993-09-13 | 1994-08-29 | Flip chip in metal electronic packages |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0719453A4 (en) |
JP (1) | JPH09502837A (en) |
KR (1) | KR960705359A (en) |
AU (1) | AU7604494A (en) |
WO (1) | WO1995008188A1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI325617B (en) | 2006-12-18 | 2010-06-01 | Chipmos Technologies Inc | Chip package and method of manufacturing the same |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3723176A (en) * | 1969-06-19 | 1973-03-27 | American Lava Corp | Alumina palladium composite |
JPS5753951A (en) * | 1980-09-17 | 1982-03-31 | Hitachi Ltd | Assembling method of semiconductor device |
US4628406A (en) * | 1985-05-20 | 1986-12-09 | Tektronix, Inc. | Method of packaging integrated circuit chips, and integrated circuit package |
JPS61274333A (en) * | 1985-05-29 | 1986-12-04 | Toshiba Corp | Semiconductor device |
US4803546A (en) * | 1986-09-17 | 1989-02-07 | Fujitsu Limited | Heatsink package for flip-chip IC |
EP0355965B1 (en) * | 1988-08-16 | 1995-02-15 | DELCO ELECTRONICS CORPORATION (a Delaware corp.) | A method of achieving selective inhibition and control of adhesion in thick-film conductors |
US4939316A (en) * | 1988-10-05 | 1990-07-03 | Olin Corporation | Aluminum alloy semiconductor packages |
US5234536A (en) * | 1991-04-26 | 1993-08-10 | Olin Corporation | Process for the manufacture of an interconnect circuit |
US5237203A (en) * | 1991-05-03 | 1993-08-17 | Trw Inc. | Multilayer overlay interconnect for high-density packaging of circuit elements |
US5311402A (en) * | 1992-02-14 | 1994-05-10 | Nec Corporation | Semiconductor device package having locating mechanism for properly positioning semiconductor device within package |
-
1994
- 1994-08-29 WO PCT/US1994/009612 patent/WO1995008188A1/en not_active Application Discontinuation
- 1994-08-29 KR KR1019960701241A patent/KR960705359A/en not_active Application Discontinuation
- 1994-08-29 AU AU76044/94A patent/AU7604494A/en not_active Abandoned
- 1994-08-29 JP JP7509197A patent/JPH09502837A/en active Pending
- 1994-08-29 EP EP94926028A patent/EP0719453A4/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
EP0719453A4 (en) | 1998-08-19 |
WO1995008188A1 (en) | 1995-03-23 |
JPH09502837A (en) | 1997-03-18 |
EP0719453A1 (en) | 1996-07-03 |
KR960705359A (en) | 1996-10-09 |
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