AU7429898A - Substrate with a circuit-board conductor network and method for producing said substrate - Google Patents

Substrate with a circuit-board conductor network and method for producing said substrate

Info

Publication number
AU7429898A
AU7429898A AU74298/98A AU7429898A AU7429898A AU 7429898 A AU7429898 A AU 7429898A AU 74298/98 A AU74298/98 A AU 74298/98A AU 7429898 A AU7429898 A AU 7429898A AU 7429898 A AU7429898 A AU 7429898A
Authority
AU
Australia
Prior art keywords
substrate
producing
circuit
conductor network
board conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU74298/98A
Other languages
English (en)
Inventor
Michael Polus
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Publication of AU7429898A publication Critical patent/AU7429898A/en
Abandoned legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/105Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
AU74298/98A 1997-04-16 1998-04-08 Substrate with a circuit-board conductor network and method for producing said substrate Abandoned AU7429898A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE1997115898 DE19715898A1 (de) 1997-04-16 1997-04-16 Substrat mit Leiterbahnvernetzung und Verfahren zu dessen Herstellung
DE19715898 1997-04-16
PCT/EP1998/002025 WO1998047327A1 (de) 1997-04-16 1998-04-08 Substrat mit leiterbahnvernetzung und verfahren zu dessen herstellung

Publications (1)

Publication Number Publication Date
AU7429898A true AU7429898A (en) 1998-11-11

Family

ID=7826702

Family Applications (1)

Application Number Title Priority Date Filing Date
AU74298/98A Abandoned AU7429898A (en) 1997-04-16 1998-04-08 Substrate with a circuit-board conductor network and method for producing said substrate

Country Status (3)

Country Link
AU (1) AU7429898A (de)
DE (1) DE19715898A1 (de)
WO (1) WO1998047327A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10320090A1 (de) * 2003-05-05 2004-08-26 Infineon Technologies Ag Elektrisches Bauteil mit Leitungen aus karbonisiertem Kunststoff, sowie Verfahren und Vorrichtung zu seiner Herstellung
DE10329143B4 (de) 2003-06-27 2005-09-01 Infineon Technologies Ag Elektronisches Modul und Verfahren zur Herstellung desselben
DE102004020497B8 (de) * 2004-04-26 2006-06-14 Infineon Technologies Ag Verfahren zur Herstellung von Durchkontaktierungen und Halbleiterbauteil mit derartigen Durchkontaktierungen
DE102004052301A1 (de) * 2004-10-27 2006-05-11 Jens Freye Verfahren zur Herstellung von Leiterbahnstrukturen
DE102004052300A1 (de) * 2004-10-27 2006-05-11 Jens Freye Verfahren zur Herstellung von Leiterbahnstrukturen
DE102004052303A1 (de) * 2004-10-27 2006-05-11 Jens Freye Verfahren zur Herstellung von Funktionselementstrukturen
DE102007062166A1 (de) * 2007-12-21 2009-06-25 Robert Bosch Gmbh Verfahren zur elektrischen Kontaktierung sowie elektronischer Schaltungsträger

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4691091A (en) * 1985-12-31 1987-09-01 At&T Technologies Direct writing of conductive patterns
DD301547A7 (de) * 1987-04-09 1993-03-04 Leipzig Tech Hochschule Verfahren zur herstellung leitfaehiger strukturen in poly(organylheteroacetylenen)
US4929489A (en) * 1987-07-20 1990-05-29 Dreschhoff Gisela A M Method of making and using selective conductive regions in diamond layers
GB2221353A (en) * 1988-07-25 1990-01-31 Gen Hybrid Limited Manufacturing electrical circuits
FR2659171A1 (fr) * 1990-03-02 1991-09-06 Thomson Csf Circuit electrique pour hyperfrequence comprenant une couche de polymere.
GB9122483D0 (en) * 1991-10-23 1991-12-04 Hitachi Europ Ltd Phonon controlled conductivity device
US5334306A (en) * 1991-12-11 1994-08-02 At&T Bell Laboratories Metallized paths on diamond surfaces
JP3060875B2 (ja) * 1994-04-08 2000-07-10 日本電気株式会社 オプトエレクトロニクス装置および回路パターン形成方法と光回折格子の形成方法

Also Published As

Publication number Publication date
WO1998047327A1 (de) 1998-10-22
DE19715898A1 (de) 1998-10-22

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase