AU729687B2 - Power supply - Google Patents

Description

P/00/011 Regulation 3.2

AUSTRALIA

Patents Act 1990 COMPLETE SPECIFICATION FOR A STANDARD PATENT Name of Applicant: Actual Inventor(s): Address for Service: Invention Title: Details of Associated Provisional Application(s) No(s): IAN VICTOR HEGGLUN lan Victor Hegglun

INTELLPRO

Patent Trade Mark Attorneys Level 7, Reserve Bank Building 102 Adelaide Street BRISBANE, QLD, 4000 (GPO Box 1339, BRISBANE, 4001) POWER SUPPLY Australian Patent Application No. P07839 filed 10 July 1997.

The following statement is a full description of this invention, including the best method of performing it known to me: 2 THIS INVENTION relates to a DC power supply and in particular but not limited to a switch-mode power supply (SMP) having a voltage conversion means with at least one voltage conversion stage for supplying power(s) to an apparatus or components in the apparatus.

The power supply of the present invention can be employed in any apparatus that requires power. Typically it can be employed for supplying power to communications equipment including computers, facsimile machines, telephones, video monitors, televisions, etc; power supply equipment including battery chargers, power packs, uninterruptible power supplies, etc; lighting :10 ballasts; electrical machines including motors and generators, etc; toys and games, and the like.

**Modern equipment such as those mentioned in the previous paragraph are progressively getting more compact and lighter and at the same time their demand for power is getting greater. In addition many of them require a power supply with different power outputs for certain circuit boards and/or components.

Present switch-mode power supplies have active switching devices connected a transformer for supplying a stepped up or stepped down output.

These power supplies are generally bulky and generate a high magnetic noise.

They are therefore not acceptable in applications which require a compact design or are sensitive to magnetic noise.

The transformer type converters can be replaced with capacitive type converters which typically use pulse duration control or burst control for voltage regulation. Pulse width modulation (PWM) is an example of the control arrangement for the voltage regulation.

Whilst capacitive type converters for voltage multiplication or division can be made relatively compact and relatively cost effective than transformer type converters, they suffer from high resistive losses and are therefore inefficient. They also require heat sink or fan for cooling purposes in certain applications.

An object of the present inventions is to alleviate or to reduce to a certain degree one or more of the prior art disadvantages.

In one aspect therefore, the present invention resides in a power supply comprising input terminals for connection to an input voltage at a first voltage level and output terminals for supplying output voltage at a second voltage level, voltage conversion means connected to the input terminals and the output terminals for converting the first voltage level at said input terminals to said second voltage level at said output terminals, said conversion means including at least one voltage conversion stage having a series connection of at least one first switching element, at least one second switching element and a coil element, and a capacitor element connected with at least one of said first and second switching elements, wherein the at least one first switching element is adapted to energise the coil element and to charge the capacitor element when in the ON state, and when the at least one first switching element is in the OFF state the coil element releases its energy to the output terminals and thereby supplementing energy discharges from the capacitor element.

Preferably the at least one first switching element is a controllable semiconductor switching device and the at least one second switching element is a diode.

More preferably both the first and second switching elements are controllable semi-conductor switching devices. The switching devices may include silicon-controlled rectifiers, transistors, MOSFETs and the like.

Desirably the conversion means has a pair of first switching elements. The coil element is connected between the switching elements in the pair, and a third switching element is connected to the coil element for providing a path for release of the energy stored in the coil element.

The power supply may have a second capacitor element connected across .*the output terminals for filtering noise in the output voltage.

It is preferred that the power supply of the present invention has a control oo.* circuit for controlling the switching of the first and/or second and/or third switching elements and thereby regulating output level at the output terminals.

The mode of regulation may be pulse duration control, burst control or PWM.

Typically the control circuit includes a first comparator for comparing the output voltage or a representative proportion thereof with the input voltage or a representative proportion thereof. The first comparator controls the ON periods of the first and/or second and/or third switching elements when the difference between the input voltage and the output voltage is within a predetermined range of voltage.

The control circuit may be arranged so that there is no overlap between the ON periods of two or more of the first and/or second and/or third switching elements. If desired a small amount of overlap may be arranged for reducing AC ripple components at the output voltage. A time delay circuit is conveniently employed for controlling the overlap.

The voltage conversion means may be a single stage or multi-stage converter device for AC-AC or DC-DC conversion and the control circuit typically tuses PWM for regulation. The device can be arranged for voltage division or voltage multiplication.

In a second aspect therefore, the present invention resides in a distributed power supply system. The power supply system has a plurality of power supply modules for supplying power to different circuit boards and/or components in an apparatus. Each of the modules include at least one power supply as described above.

In order that the present invention can be readily understood and put into practical effect, reference will now be made to the following drawings which illustrate non-limiting embodiments of the present invention, and wherein:- Figures la and lb are respective known voltage multiplier and voltage divider; Figures 2a and 2b are respective single stage voltage multiplier and single stage voltage divider according to the present invention; Figures 3a and 3b are respective alternate arrangements of the single stage multiplier and single stage divider according to the present invention; Figure 4 shows output voltage and input current waveforms of the voltage divider of Figure 3b; Figures 5a and 5b are controllable voltage dividers of the present invention incorporating respective alternatevoltage control arrangements; Figures 6a to 6f are synchronous switch type voltage conversion circuits according to the present invention; Figure 7 is an AC to AC voltage divider according to the present invention; Figure 8 is a block diagram of a voltage conversion circuit using 10 exponential cascading according to the present invention; ooi• Figures 9a and 9b are two forms of the cascade voltage dividers according to the present invention; Figures 10a to lOd show power supplies incorporating cascaded Cockroft- Walton voltage conversion circuits according to the present invention; Figures 11 a and 11 b show respective voltage and current diagrams for the voltage divider shown in Figure 2b; and Figures 12a and 12b show respective voltage and current diagrams for the voltage divider shown in Figure 3b.

Figure la and Figure l b respectively show the single stage voltage multiplier 10 and voltage divider 100 known in the art. The multiplier 10 and the divider 100 each have a series connection of a pair of first controllable switching elements, in this case MOSFETs Trl and Tr2, and a pair of second switching elements, in this case diodes D1 and D2, a capacitor Cl connected to Trl as shown for receiving charges when Trl is ON and Tr2 is OFF, and a capacitor C2 for filtering output voltages. The circuit elements of the multiplier 10 and the divider 100 are connected to the input terminals Vin and output terminals Vout as shown in Figures la and lb respectively.

The description hereinbelow will only refer to operations of voltage divider circuits. The described operations can be readily adapted for voltage multiplier by person skilled in the art and the multiplier operations are therefore not specifically described.

In Figure lb MOSFETs Trl and Tr2 are controllably switched to generate a ooo o pulsed dc voltage from the dc input voltage Vin. Trl when switched ON allows "current to pass through Trl to charge C while Tr2 is off and Tr2 when switched ON allows voltage stored on Cl to discharge into C2 and the load while Trl is off.

When Cl discharges into C2 the output voltage reaches an equilibrium at half the input voltage.

Figure 2a and Figure 2b show the voltage multiplier 20 and voltage divider 200 according to the present invention. Control signals CK1, and CK2 are applied to MOSFETs Tr2 and Trl respectively so as to allow the output voltage to be varied or regulated using pulse duration control. An inductor L1 is added in the dc path shown in this case in series with D1 to allow the pulsed voltage generated by Trl and Tr2 to be smoothed without incurring high power losses.

For the divider 200 shown in Figure 2b the inductor L1 is placed in series with D1. In this way D1 functions as a free-wheeling diode. L1 as well as supplementing discharges from C1 forms a low-loss low-pass filter to smooth the pulsed voltage generated by Trl and Tr2.

In the Figure 2b example the inductor L1 can be placed on either side of the series connected diode D1. When MOSFET Trl turns on, the current through the inductor L1 rises from zero in a triangular fashion until Trl turns off. The time Trl conducts determines the average input current and input power. When Trl turns off, inductor current flows through D1 and D2 supplying the load until the inductor completely releases its energy after which C1 and C2 continue to supply the load current. The output voltage is controllable by varying the conduction time of Trl.

Equations derived in similar fashion to those for the well known Buck converter can be employed for calculating the required inductance for the inductor :°oo L1 for a desired output voltage if the operating frequency, input voltage, output voltage, output current and peak inductor current are known. As will be seen in the description with reference to Figures 11 and 12 the amount of energy stored by the inductor L1 can be shown to be around 15% of a Buck converter with the usual Buck inductor ripple current of 30% and a voltage ratio of 4:1. Although higher ratios can be achieved using a single stage such as Figure 2b, it is preferred to add more stages for ratios higher than 4:1.

The advantage gained by adding the inductor L1 in a divider such as 200 in Figure 2b is illustrated by the following example. With the inductor L1 included the divider 200 achieves about 78% efficiency in a conversion from 60V to 15V, a ratio of 4:1. But the efficiency falls to about 50% when the prior art divider 20 is used for the same ratio.

Figures 3a and Figure 3b show respective alternative voltage multiplier and voltage divider 300 according to the present invention. As with the embodiments of Figure 2a and Figure 2b their output voltages can be varied using pulse duration control.

The voltage divider 300 has the inductor L1 connected between Trl and .Tr2. The inductor L1 is again added in the dc path for storing and releasing energy and also acts as a low-loss low-pass filter to smooth the pulsed voltage generated by Trl and Tr2. In this version an additional diode D3 is needed. Diode D3 functions as a free-wheeling diode in that it provides a current path for the inductor current after Trl turns off.

The alternative forms shown in Figures 3a and 3b offer greater flexibility and they allow a number of operational modes over those in Figure 2a and 2b. In the first mode described above, called mode 1 here, there is no conduction overlap between Trl and Tr2. In a second mode, called mode 2, overlap is used to advantage where both Trl and Tr2 can conduct simultaneously during part of the cycle.

In mode 1 the conversion ratio can be varied from 2:1 to 4:1 or more. In mode 2 the ratio can be varied from 1:1 to 2:1 or more. Preferably both modes are utilised for a wider range of ratios without requiring a larger inductance.

Operation of the divider 300 in mode 2 is now explained. Trl and Tr2 are turned on alternately with some overlap. When Trl turns on, Tr2 is still conducting so the inductor current rises quickly from zero in a triangular fashion until Tr2 turns off. The rise is more rapid than that in the mode 1 operation. The inductor current continues to rise until Trl turns off.

The input current waveform can be seen in Figure 4. The time Trl conducts determines the average input current and hence the input power. When Trl turns off, the inductor current flows through the free-wheel diode D3, through Cl and D1 to the load during the dead time (if present) until Tr2 is turned on. When Tr2 conducts inductor current flows via D3 through L1 and Tr2 to the load until the inductor energy is completely released after which Cl and C2 continue to supply S"the load current. The description with reference to Figures 11 and 12 shows how the inductor energy is derived.

The output voltage waveform can also be seen in Figure 4. The output voltage is controllable by varying the time Trl conducts. Equations derived in similar fashion to the Buck converter to allow the inductor value to be calculated given the operating frequency, input voltage, output voltage, output current and peak inductor current. Energy stored by the inductor can be shown to be around 8% of a Buck converter with the usual inductors ripple current of 30% and voltage ratio of 4:1 and when the peak inductor peak current in Figure 3b is chosen to be twice the output current.

The output voltage from the divider 300 is controllable from 1:1 to 4:1 or 11 more whereas in the divider 200 it is controllable from 1:2 to 4:1 or more. In both cases the same size inductor is used. To ensure that the divider 300 achieves optimum efficiency over a desired range of ratios it is preferable to hold Trl on and vary the duty cycle of Tr2 for ratios from 1:1 to 1:2 and then operate Trl and Tr2 in complementary fashion under PWM control for higher ratios than 2:1.

Possible component values for a divider circuit delivering 3 amps with 60V input are L1 of 201.H, C1 of 331iF low esr type (preferably less than 0.1 ohms), C2 of 101iF, power diodes BYW96D (preferably 45V/1 OA Schottky type), and MOSFETS BUK455-60A or similar with an ON resistance of 0.15 ohms or less. A suitable 10 level shifter being the IR2151. Typical wave forms for Vout and lin can be seen in Figure 4 for the mode 1 operation. Using these components the divider 300 C* achieves 87% efficiency when converting 60 volts to 15 volts. With the same components the divider 200 achieves an efficiency of 78% when converting volts to the same 15 volt output. Higher efficiencies are possible using lower loss transistors and capacitors, and synchronous rectifiers.

The divider 300 can be operated in a 3rd mode which offers higher efficiency for step down ratios between 1:1 and 1:2 (or more if required) by operating as a Buck converter without the voltage divider and extra losses associated with current flowing through C1. In this mode Tr2 is held on continuously while Trl is pulse controlled in the normal manner of the Buck converter.

Smooth transition from this 3rd mode to either mode 1 or 2 is possible because C1 is held charged to Vout and the change over can take place at any desired ratio although change over should occur before or around 2:1 to minimise the inductor size.

Figure 5a shows an example of a regulated converter 500 using the voltage divider 300 for conversion. Figure 5b shows the converter 500 with an alternative control circuit to that of Figure The converter 500 shown in Figure 5a is capable of operating with either no overlap (mode 1) or with a fixed overlap (mode PWM is achieved using a control circuit 510 having a comparator 512 connected to receive signals from a

S

triangle wave generator 514, and an operational amplifier 516 for comparing the

S.

sampled output voltage with a reference voltage Vref. The resultant error voltage Vc controls the PWM duty cycle for Trl and Tr2 for regulating the output voltage.

s S The control voltage varies the duty cycle when Vc is between 1/3 and 2/3 of the

S.

supply voltage Vcc. A time delay circuit 518 having a variable adjuster VR1 too* allows the conduction overlap of Trl and Tr2 to be set by VR1 to a fixed value.

Preferably a small amount of overlap is set to minimise the AC ripple component present at the output.

Figure 5b is an example of the converter 500 with an alternate control circuit 520 which can move smoothly from mode 1 to mode 2 by varying the control voltage Vc. The control circuit 520 has a first comparator 512 and a second comparator 513, a triangle wave generator 514 providing a ramp voltage signal to the comparators 512 and 513, and an operational amplifier 516 for comparing the 13 sampled output voltage with a reference voltage. The comparator 512 generates a PWM signal for Trl and Tr2. The comparators 512 and 513 used here are open collector type allowing the outputs to be OR'ed. With diode D4 in place the comparator 512 couples to an inverter and Tr2 resulting in Tr2 acting in complementary fashion when comparator 513 is not conducting and Vc is within the range of 1/3 and 2/3 of Vcc. This provides mode 1 operation when the comparator 513 is non conducting, when comparator 513 plus input is higher than the minus input.

However, when Vc is more than 2/3 of Vcc comparator 513 switches allowing only Tr2 to be PWM controlled while Trl is held on continuously by comparator 512 for step down ratios approaching 1:1. Conduction overlap is eeee provided for small values of Vc above 1/3 Vcc with the attenuator network R1, R2, R3. This allows mode 2 control with the overlap increasing with Vc for precise control of the output over the entire range of ratios from 1:1 to 4:1 or more. The 0 .0 15 preferred resistor network has resistor in typical ratios in the range of R2 being to 2 times R1 and the typical range for R3 being 0.2 to 0.5 times R1, where the eeee choice of R1 is not critical and values of 10K or 100K ohms being equally effective. The series resistor R4 associated with diode D5 is used to offset the turn S" on delay of 1.5 ps introduced by the level shifters and this resistor provides around 2 I s of fall time for the ramp voltage. For fast level shifters the value of resistor R4 can be zero.

Figure 6a f show converters in the form of multipliers 60 and dividers 600 14 according to the present invention. These converters use synchronous switches instead of diodes as used in the converters shown in Figures 2 to 5. The synchronous switches have relatively low switching power losses allowing a comparatively high efficiency at low voltages.

Also power in synchronous switches can flow in either forward or reverse directions by controlling the transformation ratio. To illustrate this the multiplier in Figure 6c is reversed giving the divider 600 shown as Figure 6f. Similarly divider 600 of Figure 6d is reversed giving multiplier 60 of Figure 6e. Both reversed converters in Figure 6e,f are different to the previous forms such as in Figure 2 and Figure 3.

Figure 6d is a step down converter 600 that can be operated in mode 3 "i similar to that described for Figure 3b. This 3rd mode offers higher efficiency for ratios between 1:1 and 1:2 for step down by operating as a Buck converter without the voltage divider and extra losses associated with current flow through Cl. In the 15 synchronous rectifier version of Figure 6d in mode 3, Tr2 and Tr4 are held ON to allow Cl to be connected in parallel with C2 to reduce ripple in the output voltage.

Figure 7 shows an example of a converter capable of converting AC input o:o oi S°to a controlled AC output suitable as an electronic discharge lamp ballast.

Figure 7 shows a converter 700 of a similar arrangement to that of Figure 6f but modified for AC input. Various operating modes allows the output voltage to be either stepped up or stepped down while also providing AC output. This converter can be used as an electronic ballast for a fluorescent lamp. Alternating current output is needed in these lamps for long life and the output current must be controlled to overcome the lamps negative dynamic resistance. These lamps also require a comparatively high current to heat the starter filaments followed by a comparatively high starting voltage until normal operation is achieved. When running the mains input current is preferably controlled to follow the mains voltage to give a high power factor. These requirements can all be met with the converter in Figure 7 with small inductive components.

The operational modes are now briefly described. Converter 700 normally operates as a divider once the lamp is ignited, but for starting it can generate at oleast twice the peak mains voltage in the following way. First C1 is charged to the instantaneous value of Vin by turning on S1 and S4 with the other switches left off.

With S1 and S4 open, closing S2 and S3 causes current to build up in L1. S3 is next turned off with S2 remaining on and S5 turned on. This causes the voltage on 15 Cl plus the inductor voltage to appear across the lamp and charges C2 via the filaments. Although voltage across C2 can be raised to sufficient voltage to cause ooo o the lamp to begin conduction it is preferable that the filaments are heated first to vaporise the mercury for long tube life. Heating of the filaments typically requires .o.ooi at least the normal operating current at a low voltage of around 5 volts per filament. This can be achieved as in the present electronic ballasts by placing a capacitor across the tube and applying high frequency voltage across the tube causing current flow through this capacitor and filaments.

High frequency current for starting can be generated by allowing S4 to conduct in the previously mentioned phase where S2 and S3 are on, so the inductor current can build up. When S3 and S4 are on, the voltage on C2 is greater than Cl causing C2 to partly discharge to around Vin and causing high frequency AC current to flow through C2 with Vin across the tube. Under normal starting circumstances the lamp will begin conducting. If conduction fails to begin, the lamp voltage can be raised further by not turning on S4 in the above cycling process, forcing the lamp to start.

Once the lamp is ignited, the voltage required to sustain conduction in a 220 to 240V mains system and 2.2m tubes is around 100V, or half the peak mains voltage. In the preferred form the mains input current is controlled to follow the mains voltage by varying the converter ratio to give a high power factor and requires a range of ratios from around 3:1 to 1:1 which can be achieved using the multi-mode control technique as explained for Figure 3b and Figure 4b. Further, the step up mode previously mentioned can be used to continue mains input current when the instantaneous mains voltage is less than the tube voltage, thereby ooo0 further improving power factor.

Figure 8 is one example of a power supply 800 using exponential cascading of converters to achieve a voltage reduction from rectified mains to low voltage dc such as a computer power supply.

The power supply 800 of Figure 8 demonstrates the use of a number of the above circuits in a mains power supply 800 using exponential cascading of 17 converters. In traditional SMP's a transformer is used for voltage isolation for safety as well as voltage reduction. Since isolation is not provided by the mentioned divider circuits it is advantageous or mandatory for safety reasons, in some equipment using this type of power supply, to add a 'flying capacitor' stage for level shifting to allow the power supply output to be earthed. The first divider cascade (following the optional level shifter) acts as pre-regulation for voltage supplied to the reservoir capacitor CBUS. Preferably power factor correction is incorporated at this stage before the reservoir capacitor. This can be achieved by varying the step down ratio in relation to the instantaneous mains voltage to preserve the sine wave purity if the incoming mains as used in the present art.

Preferably, the low voltage converters supplied with V3 and V4 would make use of synchronous conversions to achieve high efficiency. At least one of the low voltage converters would be made continuously variable to provide regulation of the output voltage via a feedback loop.

15 Figure 9a and 9b show cascaded voltage dividers 900 giving a step down ratio of eight and can be varied in steps from 1 to 8 if required. They are suitable oooo as alternatives to using an exponential divider cascade such as for the first converter after the flying capacitor circuit for pre-regulation of the voltage to the 00o°0 reservoir capacitor. Two transistors Trl and Tr2 are used to generate a pulsed dc voltage from the dc input voltage. When Trl conducts and all other transistors are off the capacitors C1 through C8 are charged to one eighth of the input voltage.

When Trl is turned off all other transistors can be turned on to allow the 18 capacitors to be discharged in parallel to the load. Lower ratios are achieved by holding transistors Tr2 through Tr8 on continuously. For example holding Tr8 on will give a ratio of seven.

With the 8 stages shown the ratio continuously variable from 1 to 8 or more. The inclusion of the inductor L1 makes the circuit continuously variable between steps allowing precise regulation of the output. If MOSFETs Tr3 to Tr8 are replaced with diodes, the ratio of the converter is fixed and the position of the inductor can be placed at any position in the diode string at D2,4,6,8,10,12,14 that supplies output current.

Figure 10a and Figure 10ob show respective cascaded Cockcroft-Walton voltage multiplier and divider. These examples are for ratio is 3:1. Higher ratios can be obtained by adding further stages.

In this case diodes are replaced with synchronous switches seen as Tr5-7 in V Figure 10a and Tr4-7 in Figure 9b.

The position of the inductor L1 is not limited to the positions shown provided the inductor L1 is in series with the circuit that supplies output current and where the inductors current is unidirectional.

Although description of only voltage divider operation has been given the o techniques described can also apply to voltage multipliers to allow the step up ratio to be made continuously variable. For example when an inductor is included, as in Figure 2a, the step up ratio can be varied from nominally 1:1 to 2:1 and in Figure 3a the ratio can be varied from 1:1 to more than 2:1 with mode 2 19 operation.

Referring to Figures 11 and 12 there are shown respective voltage and current of the inductor L1 and the capacitors C1 and C2 in the divider circuits of Figures 2b and 2c respectively during charging and discharging.

As shown the inductor charges to a peak current during the ON period of Trl. The inductor current averaged over the time ton is defined as k x the output current, hence the peak inductor current is 2k x The following equations show how the energy stored in the inductor L1 is derived.

Ei Vi li ton where n Vi k= D= to Vo Io T E, n V o kloD DT

E

o =Vo loT For the lossless case E i

E

o nVokloDT= VoloT 1 giving D= nk di using

V

L 2klo gives (n-2)Vo L D L=(n- 2 Vo DT 2k 10 L RLT(n- 2 1 n 2k RL Vo 1 R= and D= hence lo nk The peak inductor current is 2k x 10 so the energy stored in the inductor is 12 2 EDMDER= 2 LI k= RT This shows the amount of energy stored by the inductor is independent of k provided the inductor current drops to zero each cycle. Choosing k 1 gives low losses and reasonably low current ratings for transistors and diodes.

In comparison with a Buck converter which has an inductor ripple current of Alo the value of inductance is: 1 L

R

)T where duty cycle D= -t2= V L/ T Vi n and assuming continuous mode where AlL 210.

The peak inductor current ILpk I1 1/2DIL and the inductor energy for the Buck converter is: 1 1 RLT 1 2 2 EBUCK= 2 LI Lpk I2 0 Hence ratio of inductor sizes can be found by the following formula: E DIVIDER (Ao (n 2) EBUCK 2 (n-1) 15 The highest ratio envisaged for a divider is n 4 which gives an inductor size ratio of 0.15 or 15% of the Buck assuming the usual inductor ripple current ratio of 30% for the Buck.

For Fig. 3b the same equations apply above for Fig. 2b, ie irrespective of the point where Tr2 is turned on after Trl is turned off. This is because input :20 energy and output energy are the same.

When Trl is deliberately turned on slightly before Tr2 is turned off the °o output ripple voltage can be reduced by allowing the inductor current to rapidly rise from zero to IO when Trl turns on again.

The overlap time tl required for the inductor current to reach o1 can be 25 calculated by noting Vi Vo appears across the inductor when Trl and Tr2 are both conducting.

Using VL L d for the two cases: L dt From t 0 to t 1 where V

L

(n 1) V and ti to t2 VL (n 2) VO (n-I1) V 0 L -L ti so tj L 10 so t 1 -I)V vI and (n-2)V 0 L (2kbo 1o) t 2 and L (n V 0 (2k- 1)10 substituting ti (n-2 1) I) The energy equations are: Vi -1-10, tj E 1=n,-I 1 DOT 2 (n (2k-I1)

E

2 V (2k~o lo) t 2 where n= V

VO

k Pk (since slopes arealmost the same)

T

E2 nVL(2k D 2

T

E nV O D2 T(2k 1 (n 2) 1 i 2 (n (2k -1)

E

0

V

0 10 T Equating Ei Eo (lossless case) 'VO 10T nVO L'D 2 T(2k 1i (n 2 (n 1) (2k giig D 1 1 givingk 02 nk 2k(2k using E LLd gives (n V 0 L2k10-1 L= D2 (2k 10 substitute D02 gives n (2k-i) 1 1 '2k (n-I1) 2k(2k Using the peak inductor current 2k x 10 relative inductor size is E DIVIDER E BUCK 1 lL2 (n 1 1 (n-i1) k(2 k-1) 1 2k (n-i1) 2k(2k 1)' The highest step down ratio envisaged for this divider is 4:1 (n 4) so the inductor size ratio is typically 1/12th or 8% of the Buck (assuming the usual Buck inductor ripple current ratio of 30% and k 1).

Whilst the above have been given by way of illustrative examples of the present invention many variations and modifications thereto will be apparent to those skilled in the art without departing from the broad ambit and scope of the invention as herein set forth.

o* «o o o o

Claims (14)

1. A power supply comprising input terminals for connection to an input voltage at a first voltage level and output terminals for supplying output voltage at a second voltage level, voltage conversion means connected to the input terminals and the output terminals for converting the first voltage level at said input terminals to said second voltage level at said output terminals, said conversion means including at least one voltage conversion stage having a series connection of at least one first switching element, at least one second switching element and a coil element, and a capacitor element connected with at least one of said first and second switching elements in said series connection, wherein the at least one first switching element is adapted to energise the coil element and to charge the capacitor element when in the ON state, and when the at least one first switching element is in the OFF state the coil element releases its energy to the output terminals and thereby supplementing energy discharges from the capacitor 15 element.

2. The power supply according to claim 1 wherein the at least one first switching element is a controllable semi-conductor switching device and the at least one second switching element is a diode. oooo@ S*

3. The power supply according to claim 1 wherein both the first and second switching elements are controllable semi-conductor switching devices

4. The power supply according to claim 1 wherein the conversion means includes a pair of first switching elements with the coil element connected between the switching elements in the pair, and a third switching element connected to the coil element for providing a path for release of the energy stored in the coil element.

The power supply according to any one of claims 1 to 4 wherein the power supply further comprising a second capacitor element which is connected across the output terminals for filtering noise in the output voltage.

6. The power supply according to any one of claims 1 to 5 wherein the power supply further comprising a control circuit for controlling the switching of the first and/or second switching elements and thereby regulating output level at the output terminals.

7. The power supply according to claim 6 wherein the mode of regulation is in the form of one of or a combination of two or more of pulse duration control, burst control or PWM.

8. The power supply according to any one of claims 6 to 7 wherein the r 15 control circuit including a first comparator for comparing the output voltage or a S.representative proportion thereof with the input voltage or a representative proportion thereof, and the first comparator is arranged to control the ON periods of the first and/or second and/or third switching elements when the difference between the input voltage and the output voltage is within a predetermined range 20 of voltage.

9. The power supply according to any one of claims 6 to 8 wherein the control circuit is arranged so that there is no overlap between the ON periods of two or more of the first and/or second and/or third switching elements.

The power supply according to any one of claims 6 to 8 wherein the control circuit is arranged so that there is a small amount of overlap between the ON periods of two or more of the first and/or second and/or third switching elements for reducing AC ripple components at the output voltage.

11. The power supply according to any one of the preceding claims wherein the voltage conversion means is a single stage or multi-stage converter device for AC-AC or DC-DC conversion and the converter device is arranged as a multiplier or a divider.

12. A distributed power supply system having a plurality of power supply modules for supplying power to different circuit boards and/or components in an apparatus, each of the modules include at least one power supply according to any one of the preceding claims. oooo

13. A power supply as described with reference to any one or a combination of two or more of Figures 2 to 12.

14. A distributed power supply system having a power supply as described with reference to any one or a combination of two or more of Figures 2 to 12. DATED this 1 Oth day of July, 1998. IAN VICTOR HEGGLUN by his Patent Attorneys INTELLPRO ooo