AU705614B2 - Timing apparatus and method - Google Patents

Description

WO 97/34262 PCT/AU97/001 5 6 TIMING APPARATUS AND METHOD The present invention relates to a timing apparatus for determining the time at which each of a number of moving bodies passes over a timing line. The timing apparatus is of the kind wherein contestants in a race each carry a transmitter which emits a signal received by an antenna located in the vicinity of the finish line to time the contestants.' In particular, although not exclusively, the invention relates to an apparatus for indicating the elapsed time for each of a number of horses on a race track from a starting gate to a finish line. The invention may also be implemented in determining split times around the race track. However, the invention is not restricted in its application to race meetings and may have application in other types of events such as car racing, athletic track events and other animal racing. The invention also relates to a method of determining the time at which each of a number of moving bodies pass over a timing line.

In accordance with a first aspect of the present invention there is provided a timing apparatus for determining the time at which each of a plurality of moving bodies passes over a timing line, said apparatus including: a transmitter for mounting to each moving body, each transmitter adapted for transmitting a signal at a unique characterizing frequency; a signal receiving means associated with the timing line, the signal receiving means for receiving a composite signal comprised of signal components having frequencies corresponding to the unique characterizing frequencies of the signals transmitted from the transmitters within a predetermined range of the timing line; and a signal processing means including a signal resolving means to resolve the composite signal into each of the signal components to determine the times at which each of the moving bodies associated with each signal component crosses the timing line.

WO 97/34262 PCTAU97/00156 Thus, each signal component being at one of the unique characterizing frequencies may be associated with the transmitter transmitting at that unique characterizing frequency and with the moving body carrying that transmitter.

The resolving means may comprise a means for conducting a fourier analysis of the composite signal to resolve it into each of the signal components. Specifically, this fourier analysis can be implemented by software stored in ROM provided on a digital signal processing card. The resolving means may include a digital sampling means to take samples of the composite signal and means for conducting a discrete fourier analysis of the digitised samples. The means for conducting the discrete fourier analysis may be a means for conducting a fast fourier transform (FFT). The resolving means may also include a filter to attenuate frequencies outside the range of the unique characterizing frequencies.

The resolving means may be adapted to determine the relative amplitude of each of the signal components and the processing means may include an analyzing means adapted to analyze the relative amplitude of each of the components to determine the time at which the moving body associated with each component crosses the timing line.

The signal receiving means may comprise a loop in substantial alignment with the timing line and the analyzing means is adapted to compare the relative amplitude of each signal component relative to a threshold to determine the time at which the moving body associated with each signal component crosses the timing line.

The signal receiving means may be in the form of an inductive loop in which the composite signal is generated as a plurality of moving bodies transmitting signals at respective characterizing frequencies, pass over the loop. The loop may encompass or straddle the timing line, with side portions parallel to the line, the spacing of the side portions being such that the relative amplitude of each signal component generated in the loop drops below the threshold due to a canceling WO 97/34262 PCT/AU97/00156 3 effect in the centre of the loop. For each signal component, an average may be taken of the times at which the relative amplitude crosses the threshold value to determine the time of crossing of the moving body associated with the signal component.

Suitably, the unique characterizing frequencies can be spaced apart at regular frequency intervals. The spacing of the characterizing frequencies should be selected such that they can be resolved by the resolving means. Alternatively, the resolving means should be designed with the capability of resolving all the preselected unique characterizing frequencies. The signal receiving means may be embedded in the ground and thus low frequencies are desirable as the unique characterizing frequencies to enable penetration through the ground.

As mentioned above, the signal receiving means may be embedded in the ground or beneath a racing track. This is particularly desirable in horse racing applications since the tracks are pierced by spikes to aerate the track. Thus the signal receiving means is suitably embedded below the level of penetration.

In accordance with a second aspect of the present invention, there is provided a method of determining the time at which each of a plurality of moving bodies passes over a timing line, the method including the steps of: transmitting a signal from a transmitter mounted on each moving body, each signal having a characterizing frequency unique to that transmitter; receiving by a signal receiving means, a composite signal comprised of signal components having frequencies corresponding to the characterizing frequencies of the signals transmitted from the transmitters within a predetermined range of the timing line; processing the composite signal including the step of resolving the composite signal into each of the signal components by a signal resolving means to determine the times at which each of the moving bodies associated with each signal component crosses the timing line.

PCT/A tT97/OO1 RECEIVED 2 EF, 1097 4 The step of resolving may comprise conducting a fourier analysis of the composite signal. The step of resolving may further comprise conducting digital sampling of the composite signal and conducting a discrete fourier analysis of the digital samples. The step of conducting a discrete fourier analysis may comprise conducting a fast fourier transform (FFT) of the digital samples. The step of digital sampling may comprise undersampling and the step of resolving may include an initial step of filtering the composite signal.

Further, the step of resolving the composite signal may include the step of determining the relative amplitude of each signal component and the step of processing may further include a step of analyzing the relative amplitude of each signal component to determine the time at which the moving body associated with each signal component crosses the timing line. The signal receiving means may comprise a loop in substantial alignment with the timing line, the step of analyzing may include the step of comparing the relative amplitude of each signal component with a threshold for determining the time at which the moving body associated with each signal component crosses the timing line.

In order that the invention may be more fully understood, one embodiment will now be described by way of example with reference to the figures in which: Fig. 1 is a schematic view of a timing apparatus in accordance with a preferred embodiment of the present invention; Fig. 2 is a schematic view of a portion of the timing apparatus shown in Fig.

1; Fig. 3 is a graph of signal strength vs. time for a transmitter passing over a signal receiving loop shown in Fig. 1; Fig. 4 is a circuit diagram of a transmitter schematically shown in Fig. 1; Figs. 5A to 5E are circuit diagrams of components of a receiver card schematically illustrated in Fig. 2; and Figs. 6AI to 6AVI and 6BI to 6BIV are circuit diagrams of components of RA4Za DSP card schematically illustrated in Fig. 2.

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Fig. 7 is a schematic diagram showing analogue to digital sampling of a composite signal.

Figure 1 illustrates how the timing apparatus 10 of the present invention can be implemented at a race track 12. As shown, the race track 12 includes a turf track 14 on which a number of horses 16 run towards the winning post 18. Each of the horses 16 carries in its saddlecloth, a transmitter 17 which transmits a signal at a unique characterizing frequency. As the horses 16 pass the winning post 18, they pass over an inductive signal receiving loop 20 embedded in the track. The loop is buried below the surface of the track by up to a meter. A depth of at least 500 mm is required because race tracks are generally penetrated by spikes to improve aeration. It is also desirable to bury the loop 20 since shallow loops in loose soil could trip an animal. Typically, the loop will be approximately 30 meters in length, depending upon the width of the track 14. The width of the loop 20 is approximately 1 meter, the loop straddling a timing line 22 extending across the track 14 from the winning post 18 at right angles to the longitudinal direction of the track 14.

The circuit diagram of each transmitter 17 is shown in detail in Fig. 4. The diagram contains information so that a person skilled in the art could readily understand the construction and operation of the transmitter 17. Shown in Figure 4 is a power supply unit 400 including a transformer chip 402 that converts volts received at its input from battery 404 to 3.3 volts which is output to capacitor 408 on pin 6 of the transformer chip 402. This 3.3 volts output is used to power oscillator circuit 410 which includes a frequency divider 412 which divides the input 5.25 MHz signal by 16. The antenna 24 comprises inductor 414 and capacitor 416 which is used for amplification whilst crystal X1 is used to tune the frequency at which signals are transmitted by each transmitter 17. Each transmitter 17 transmits a signal at a unique characterizing frequency. In this particular embodiment, the transmitters transmit signals at the following frequencies:

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AMENDED SHEET L~j iPFAU "I1Tlc~r~3 I r r 1 7r -nail~~~5~i9 in ki n'F n I nil m nn lIn 6 TX1 368.1kHz TX2 369.5kHz TXn 366.7+ (n*1.432)kHz where n 1 to 31 Relatively low frequencies are selected to enable penetration through the track 14 to the signal receiving loop 20. It will be appreciated by those skilled in the art that lower frequencies have greater penetration.

Each transmitter 17 includes an antenna 24 which is not shown in detail in the figures. The antenna is wound on a ferrite rod having a rectangular section of 17 mm x 3.5 mm and a length of 50 mm. The antenna coil comprises between 40 and turns of 26 gauge wire. It is important for the operation of the apparatus 10 that the axis of the antenna coil, in this case the longitudinal direction of the ferrite rod, extends in the direction of travel of the horses 16, otherwise, little signal will be detected in the loop 20. The antenna coil carries AC current at a voltage of between 20 and 60 volts. The signal receiving loop 20 is a loop formed from a signal piece of wire, the ends of which are connected to a receiver module 26. A signal of approximately 20 to 60 volts in the antenna coil of a transmitter 17 produces by inductance a signal component of approximately 10 microvolts in the signal receiving loop 20 when the transmitter 17 is within a predetermined range of the loop 20. This range is approximately 4 to 6 meters. When a number of transmitters 17 are within range of the loop 20, this produces within the loop, a composite signal which is made up of signal components at frequencies corresponding to the characterizing frequencies of the transmitters 17, plus, of course ambient noise.

The ends of the loop 20 extend to a receiver box 26 as shown in Fig. 2. The ends of the loop are twisted together to minimize interference especially differential mode noise.

JI AOiIAED SHEET iA/AU 7 Fig. 2 in a schematic way, shows the elements of the receiver box 26. The receiver box 26 includes a receiver card 32 and a digital signal processing (DSP) caid 34.

Figure 5 is a diagram showing the elements of the receiver card 32 and Figures 6A and 6B are diagrams of the elements of the DSP card 34. The diagrams contain information such that a person skilled in the art could readily understand the construction and operation of the receiver card 32 and the DSP card 34.

As shown in Fig. 2, the receiver card 32 contains a number of elements including a filter 40, amplifier 42 and a sampling analog to digital convertor 44.

The composite signal received in the inductive loop 20 is passed through an active filter 40 which has a passband to accommodate all possible characterizing frequencies of the transmitters 17. At present the pass band is 366.7kHz to 412.5kHz. This accommodates 31 transmitters at a frequency spacing of 1.432kHz.

The filter 40 has a gain of approximately Figure 5C represents an input circuit arrangement 500 of the receiver card 32 of receiver box 26. The composite signal is received at terminals 502, 504 from the ends of loop 20 and fed to a transformer 506 which decreases the impedance output from the loop 20. The signal is then amplified through an amplifier section 508, including transistor 510, and filtered through the filter circuit 40. The input circuit 500 additionally includes a test circuit 512 for testing the operation of various components of the input circuit 500. The bank of parallel-connected capacitors 513 are for decoupling purposes to suppress noise in the power supply.

The composite signal is then fed on conductor 514 to amplifier 42 (Figure which comprises three amplification stages 516, 518 and 520 to produce an overall gain of about 1000. Amplifier section 522 may be used as a spare. The positive rail of the power supply floats between 0 and 5V, centered on 2.5V, through the resistor divider comprising resistors 525 and 527.

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TAr cT'AU 9 7 0 01 RECE1V T 2 E 1997 8 Following amplification, the composite signal is fed to the A/D converter 44 (Figure 5E) on conductor 526. The data and clock signals output from A/I3 chip 528 on pins 12 and 13 thereof are input to backplane I/O connector 530 (Figure The indicators section (Figure 5A) 532 comprises a number of LEDs 534, 536 and 538 to respectively indicate clock signals, data signals and power transmission to the receiver card 32. The decoupling and power section 540 acts to suppress noise.

As mentioned previously, the amplifier 42 comprises three amplification stages with a combined gain of 1000 to increase the signal to such an extent that the signal produced by all 31 transmitters will use the entire range of the A/D convertor 44.

Utilizing the whole range of the A/D convertor 44 allows for the best amplitude resolution of the composite signal.

A sampling A/D convertor 44 is employed. The sampling A/D convertor 44 is controlled by the DSP card 34 which includes a DSP chip 45, RAM 46, ROM 48 and an RS485 convertor 49. The part number of the DSP chip 45 available from Texas Instruments is TMS320C31. The DSP 45 reads the results of the A/D conversions and stores them in RAM 46. At this point, it is noted that the sampling A/D convertor 44 could be located on the receiver card 32. However, this would necessitate the transmission of an analog signal between the receiver card 32 and the DSP card 34. Due to noise problems in transmitting an analog signal, it is preferred that the sampling A/D convertor 44 is located on the receiver card 32.

However, the division between the receiver card 32 and the DSP card 34 is arbitrary.

The A/D convertor 44 samples at a rate sufficient to resolve each of the signal components. Undersampling is employed in the timing apparatus 10 since its simplifies the receiver card circuit 32. Undersampling is appropriate since it is not necessary to reconstruct the waveform but merely to resolve all incoming RA4, frequencies within the passband of the filter (Y)1 -MENDED

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NT Of iP JAU 9 The A/D convertor 44 samples at a rate of 91.666kHz. 256 sample points are read for use in calculation. At a sampling rate (f of 91.666kHz, this takes 2.793 ms.

The data signals from connector 530 are input to connector 602 (Figure 6A at pin 17A, of DSP card 34 which are then fed to DSP chip 45 (Figure 6A II) through pin 108. The RAM 46 consists of internal RAM (not shown), which forms part of the DSP chip 45 and external RAM, identified by chips U5 (604) and U2 (606) in Figure 6A IV and by chips U4 (608) and U3 (610) in Figure 6A V. In Figure 6A III there is shown clock chip 612 which generates timing signals for the DSP chip 45. Shown in Figure 6A IV is ROM 48 and RS485 converter 49, in the form of a UART chip, which provides serial data to network node Figure 6B I shows a series of capacitors C1 to C22 used for decoupling purposes to suppress noise in the power supply for the DSP card 34. In Figure 6B II, buffer chips 620, 622, 624 and buffer chip 626 of Figure 6B III supply power from their output pins to drive the LED packs 630, 632 and 634 of Figure 6B IV indicating the crossing of a moving body over a timing line.

The composite signal is produced by an unknown number of transmitters 17 transmitting at various ranges from the receiving loop 20. The A/D sampling is schematically illustrated in Figure 7.

Sample data points are stored in an array of floating point numbers p in RAM 46 on the DSP card 34. The array can be represented as follows: p0 amplitude at t 0 pl amplitude at t 1/fs p2 amplitude at t 2/fs

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RECEIE 2 l i r7r 17 p255 amplitude at t 255/fs Once the 256 sample points have been gathered, the DSP performs an FFT program stored in ROM 48. The code for the FFT program was available from the users guide accompanying the TMS 320C31 chip. The FFT program is a decimated in frequency radix 2, 256 point FFT calculation. As an alternative source of the program, Boston Technologies sells a program in the form of code on a disk to perform the calculation. A radix 2 calculation is found to be sufficient for the present timing apparatus 10. However a radix 4 calculation which is faster can also be used.

The FFT program calculates the relative amplitude of each of the signal components together with the amplitude of signals detected at intervening frequencies. The result is stored in an array of floating point numbers r in the RAM as follows: rO relative amplitude at f 366.667 kHz rl relative amplitude at f 367.025 kHz r2 relative amplitude at f 367.383 kHz r3 relative amplitude at f 367.741 kHz r4 relative amplitude at f 368.099 kHz r5 relative amplitude at f 368.457 kHz r6 relative amplitude at f 368.815 kHz r7 relative amplitude at f 369.173 kHz r8 relative amplitude at f 369.531 kHz r12 relative amplitude at f 370.964 kHz RA4 0 AMENDED

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11 r124 relative amplitude at f 411.068 kHz r127 relative amplitude at f 412.500 kHz r128 to r255 relative amplitudes of negative (complex) frequencies The relative amplitudes r128 r255 actually occur at complex frequencies, producing negative amplitudes, and can have the effect of cancelling out the amplitudes recorded for rO r127 often leading to erroneous results. Therefore, to compensate for this, the FFT calculates the absolute value of all numbers rO r255 and then adds the values for r128 r255 to their corresponding values rO r127, e.g. r0 r128J, IrlJ |r129 r1271 r255 toobtainan overall relative amplitude.

It can be seen that the FFT calculates relative amplitudes since it is a phenomenon of FFT that amplitudes appear greater than they are in reality. However, relative amplitudes are sufficient for the timing apparatus The spacing between frequencies which the FFT can resolve can be calculated as follows: resolution sampling frequency/sample points 91.666kHz/256 358.073Hz Thus the spacing between the frequencies which can be resolved by the FFT is one quarter the frequency spacing between the signals of each of the transmitters. If one of the transmitters does not transmit at exactly its characterizing frequency as prescribed above then any signal generated will "spill over" into an adjacent frequency resolved by the FFT. This provides for greater tolerance in transmitter RA frequency. Furthermore, this allows future expansion of the apparatus 10 by A.T i'o.D SHEET TO

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RECEIVED 2 ?E2 r li 12 inserting extra transmitters which transmit at frequencies between those prescribed above.

As previously mentioned, undersampling is employed in the timing apparatus However, this increases the problems associated with the known phenomenon of FFT whereby mirroring of frequencies occurs about multiples of half the sampling frequency. This is known as "aliasing". For example, for a sampling frequency of approximately 90kHz, mirroring occurs at the following frequencies i.e. 135kHz, 225kHz, 315kHz and so on. Thus a signal at 280kHz will be reflected about 315kHz and added to the signal at 350kHz and vice versa and will thus appear the same following the FFT calculation. Thus it is not possible to discriminate between the frequencies of 280kHz and 350kHz in this example. Thus the present embodiment employs filtering to attenuate all signals outside the range of 366.7kHz to 412.5kHz.

As mentioned previously, the sampling process takes 2.79ms and the FFT calculation about 3.5ms depending upon non-deterministic factors. The process is repeated every 3.5ms. Thus at intervals of 3 .5ms, the relative amplitude of each signal component will be known. Although the process provides accuracies of greater than 1/100th of a second, a reliable accuracy of 1/100th of a second is achieved. For a transmitter passing over any of the loops 20, 28 a graph of relative amplitude vs. time will take the form shown in Fig. 3. The characteristic gull wing shape is produced since as the transmitter approaches the first side of the loop 28, the received signal component increases. Towards the center of the loop 28, the signal component decreases because a signal component received on opposite sides of the loop will in effect cancel with itself.

A threshold voltage known as a "squelch" level is automatically chosen to offset any background noise as shown in Figure 3. The points and (d) represent the time at which the relative amplitude strength made a transition through I RAi\ the squelch level. The point can be calculated from the values of (c) Ar ON WRlDED SHEET T^ ^'PAA PCTAU9 7 00 15 6 13 and Alternatively, the value of may be determined by averaging the values of and Noise in the local area is sampled to find the average background noise level for each characterizing frequency of the transmitters 17. The value for this level is then multiplied by a safety factor producing a new value which is used to set the squelch level for each transmitter frequency. By setting the squelch level in this manner, spurious crossings or transitions due to noise are avoided. Increasing the squelch level to reduce noise on one transmitter frequency does not affect the squelch level on neighbouring transmitter frequencies. The squelch levels are set so that the background noise level added to a transmitter signal will always cause a transition of the squelch level so that even on a very high squelch level a valid transition will be recorded. Furthermore, no tuning or squelch setting is required to be performed by the operator and deviations in component values do not affect the squelch settings.

As shown in Fig. 1, the timing apparatus 10 also includes a number of other signal receiving loops 28 at spaced locations along the track 14 for determining split times. The signal receiving loops 28 are the same as the loop 20 and the loops 28 are connected to respective receiver boxes 30 which are the same as the receiver box 26.

For each receiver box 26, 30, the time is marked by a hardware counter (not shown) on the DSP card 34. The counter is incremented by a clock card (not shown) which generates a 16 MHz signal which then passes to a divider chip (not shown) on the DSP card 34 which divides the signal by 1024. Thus a pulse at 15.625kHz increments the counter. To keep the counter in all the receiver boxes 26, 30 in synchronization, a synch pulse is received from the network node 50 via RS485 network. Each DSP ensures that its counter remains in synch with the synch pulse using a software implemented phase-locked-loop. Thus the counters rin each receiver box 26, 30 are kept in synchronization with each other. This is -w4'i -jczJD

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VT/V 05 ras -rcEi-!O 2 P EC 1997 14 important for accurate recording of split times.

Once it has been deduced by the DSP that a certain transmitter 17 crossed the timing line 22 or other timing line associated with the loops 28, the transmitter number, crossing time and some status information are stored in a database in RAM 46 on the DSP card 34. The data is accumulated here so that if, for some reason, the receiver box 26, 30 is isolated from the remainder of the apparatus 10, data can be saved for later retrieval.

The network node 50 is generally situated in a timing room adjacent the race track 14. All data from the receiver boxes 26, 30 passes to the network node 50 via the RS485 network. As discussed above, the network also carries the synch pulse to each of the receiver boxes. Data arriving at the network node 50 is converted from RS485 to RS232 and passes to a PC 55 running a program known as "CTC".

The CTC program collects and collates data from each of the DSP cards. The CTC program also records the time at which each DSP chip 45 is turned on. Thus the CTC program can record the elapsed time from when the DSP chip is turned on until one of the horses 16 crosses the timing line 22 at the winning post 18 or the timing line associated with the other loops 28. Thus the CTC keeps a database of the time at which each horse 16 passes each of the loops 20, The network node 50 is also connected to the starter button 60 and thus the CTC program receives information as to the start time of each race. Since a database is kept of all loop crossings and the time of start for each race, split times and race times can be calculated by the CTC program.

Thus the CTC program can combine data from a number of time lines and process it to produce meaningful results. It is also able to filter out spurious signals in the data stream and to remove duplicate records. It also knows the expected crossing RA4/_ yr", order for transmitters travelling around the track 14 and is able to detect when a nAMENDED SHEET T0r IFO 'PA/AU particular transmitter 17 goes missing.

As a failsafe system, a light beam is also attached to each loop 20, 28, with the first horse interrupting the light beam and so generating a signal to indicate the finish of the race or the passing of each of the loops 28. The failsafe system is also connected to the starter's button GO.

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Claims (29)

1. A timing apparatus for determining the time at which each of a plurality of moving bodies passes over a timing line, said apparatus including: a transmitter for mounting to each moving body, each transmitter adapted for transmitting a signal at a unique characterizing frequency; a signal receiving means associated with the timing line, the signal receiving means for receiving a composite signal comprised of signal components having frequencies corresponding to the unique characterizing frequencies of the signals transmitted from the transmitters within a predetermined range of the timing line; and a signal processing means including a signal resolving means to resolve the composite signal into each of the signal components to determine the time at which each of the moving bodies associated with each signal component crosses the timing line.

2. A timing apparatus according to claim 1 wherein the signal processing means comprises a means for conducting a fourier analysis of the composite signal to resolve the composite signal into each of the signal components.

3. A timing apparatus according to claim 1 wherein the resolving means comprises a means for conducting a fourier analysis of the composite signal to resolve the composite signal into each of the signal components.

4. A timing apparatus according to claim 3 wherein the resolving means is adapted to determine the relative amplitude of each of the signal components. A timing apparatus according to claim 4 wherein the signal processing means further includes an analyzing means to analyze the relative amplitudes of each of the signal components to determine the time at which the moving body associated T RA4, with each component crosses the timing line.

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6. A timing apparatus according to claim 5 wherein the resolving means includes a digital sampling means to sample the composite signal and meahs for conducting a discrete fourier analysis of the digitised samples.

7. A timing apparatus according to claim 6 wherein the means for conducting a discrete fourier analysis is a means for conducting a fast fourier transform.

8. A timing apparatus according to any one of claims 5 to 7 wherein the signal receiving means comprises a loop in which the composite signal is generated as a plurality of moving bodies, transmitting signals at respective characterizing frequencies, pass over the loop.

9. A timing apparatus according to claim 8 wherein the loop is an inductive loop which is in substantial alignment with the timing line and the analyzing means is adapted to compare the relative amplitude of each signal component with a threshold to determine the time at which the moving body associated with each signal component crosses the timing line.

10. A timing apparatus according to claim 9 wherein the loop straddles or encompasses the timing line, the loop having side portions parallel to the line, the spacing of the side portions from the timing line being such that the relative amplitude of each signal component generated in the loop drops below the threshold due to a canceling effect in the center of the loop.

11. A timing apparatus according to claim 10 wherein for each signal component an average is taken of the times at which the relative amplitude crosses the threshold value to determine the time of crossing of the moving body associated with the signal component.

12. A timing apparatus according to any previous claim wherein the resolving RA means includes a filter to attenuate frequencies outside the range of unique 4A,FNDZD SHEET RECEIVED 2 4 fC I¢,97 18 characterizing frequencies.

13. A timing apparatus according to any one of claims 2 to 11 wherein the fourier analysis is implemented by software stored in memory means provided on a digital signal processing card.

14. A timing apparatus according to any previous claim wherein the unique characterizing frequencies are spaced apart at regular frequency intervals and the spacing of the characterizing frequencies is selected such that they can each be resolved by the resolving means.

A timing apparatus according to any previous claim wherein the signal receiving means is embedded in the ground in the vicinity of the timing line.

16. A timing apparatus according to any previous claim wherein the signal receiving means comprises a series of inductive loops, at spaced locations along a track, each loop having a signal processing means associated therewith to determine the time at which a moving body passes a timing line associated with each loop so as to provide split times of a moving body around the track.

17. A method of determining the time at which each of a plurality of moving bodies passes over a timing line, the method including the steps of: transmitting a signal from a transmitter mounted on each moving body, each signal having a characterizing frequency unique to that transmitter; receiving by a signal receiving means, a composite signal comprised of signal components having frequencies corresponding to the characterizing frequencies of the signals transmitted from the transmitters withina predetermined range of the timing line; processing the composite signal including the step of resolving the composite signal into each of the signal components by a signal resolving means to determine SRA(, the times at which each of the moving bodies associated with each signal 4, ,AMENDED SHEET >T OAU 19 component crosses the timing line.

18. A method according to claim 17 wherein the step of resolving comprises conducting a fourier analysis of the composite signal to resolve the composite signal into each of the signal components.

19. A method according to claim 18 wherein the step of resolving includes the step of determining the relative amplitude of each of the signal components.

A method according to claim 19 wherein the step of processing further includes a step of analyzing the relative amplitude of each of the signal components to determine the time at which the moving body associated with each signal component crosses the timing line.

21. A method according to claim 20 wherein the step of resolving comprises conducting digital sampling of the composite signal and conducting a discrete fourier analysis of the digitised samples.

22. A method according to claim 21 wherein the step of conducting a discrete fourier analysis comprises conducting a fast fourier transform of the digitised samples.

23. A method according to any one of claims 20 to 22 wherein the signal receiving means comprises a loop in which the composite signal is generated as a plurality of moving bodies, transmitting signals at respective characterizing frequencies, pass over the loop.

24. A method according to claim 23 wherein the loop is an inductive loop in substantial alignment with the timing line and the step of analyzing includes a step of comparing the relative amplitude of each signal component with a threshold to Sdetermine the time at which the moving body associated with each signal L' AMENeD S8HEET !PEAJAU component crosses the timing line.

A method according to claim 24 wherein the loop straddles or encompasses the timing line, the loop having side portions parallel to the timing line, the spacing of the side portions from the timing line being such that the relative amplitude of each signal component generated in the loop drops below the threshold due to a canceling effect in the center of the loop.

26. A method according to claim 25 wherein for each signal component an averaging step of the times at which the relative amplitude crosses the threshold takes place to determine the time of crossing of the moving body associated with the signal component.

27. A method according to any one of claims 17 to 26 wherein the step of resolving may include an initial step of filtering the composite signal to attenuate frequencies outside the range of unique characterising frequencies.

28. A method according to any one of claims 21 to 27 wherein the step of digital sampling includes the step of undersampling the composite signal.

29. A method according to any one of claims 18 to 28 wherein the step of conducting a fourier analysis is implemented by software stored in memory provided on a digital signal processing card. A method according to any one of claims 17 to 29 wherein the signal receiving means comprises a series of inductive loops, at spaced locations along a track, each loop having a signal processing means associated therewith to determine the time at which a moving body passes a timing line associated with each loop so as to provide split times of a moving body around the track. LJ~, ?MELBED SHEET RAAi4 ~IP;,WO~<