AU669315B2 - Arrangement for recovering a plesiochronous digital signal - Google Patents

Arrangement for recovering a plesiochronous digital signal Download PDF

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Publication number
AU669315B2
AU669315B2 AU16309/95A AU1630995A AU669315B2 AU 669315 B2 AU669315 B2 AU 669315B2 AU 16309/95 A AU16309/95 A AU 16309/95A AU 1630995 A AU1630995 A AU 1630995A AU 669315 B2 AU669315 B2 AU 669315B2
Authority
AU
Australia
Prior art keywords
divider
ramp generator
arrangement according
signal
phase correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU16309/95A
Other languages
English (en)
Other versions
AU1630995A (en
Inventor
Hans-Joachim Hocke
Harry Siebert
Volker Sievers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Publication of AU1630995A publication Critical patent/AU1630995A/en
Application granted granted Critical
Publication of AU669315B2 publication Critical patent/AU669315B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/07Synchronising arrangements using pulse stuffing for systems with different or fluctuating information rates or bit rates
    • H04J3/076Bit and byte stuffing, e.g. SDH/PDH desynchronisers, bit-leaking

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AU16309/95A 1994-04-07 1995-04-06 Arrangement for recovering a plesiochronous digital signal Ceased AU669315B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4412060 1994-04-07
DE19944412060 DE4412060C1 (de) 1994-04-07 1994-04-07 Anordnung zur Rückgewinnung eines plesiochronen Digitalsignals

Publications (2)

Publication Number Publication Date
AU1630995A AU1630995A (en) 1995-11-16
AU669315B2 true AU669315B2 (en) 1996-05-30

Family

ID=6514871

Family Applications (1)

Application Number Title Priority Date Filing Date
AU16309/95A Ceased AU669315B2 (en) 1994-04-07 1995-04-06 Arrangement for recovering a plesiochronous digital signal

Country Status (4)

Country Link
EP (1) EP0676873A3 (enrdf_load_stackoverflow)
AU (1) AU669315B2 (enrdf_load_stackoverflow)
DE (1) DE4412060C1 (enrdf_load_stackoverflow)
TW (1) TW280971B (enrdf_load_stackoverflow)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5280502A (en) * 1990-11-08 1994-01-18 U.S. Philips Corporation Circuit arrangement for removing stuff bits

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5033064A (en) * 1988-12-09 1991-07-16 Transwitch Corporation Clock dejitter circuit for regenerating DS1 signal
DE3934248A1 (de) * 1989-10-13 1991-04-18 Standard Elektrik Lorenz Ag Multiplexer und demultiplexer, insbesondere fuer nachrichtenuebertragungs-netze mit einer synchronen hierarchie der digitalsignale
AU642948B2 (en) * 1990-02-16 1993-11-04 Nokia Siemens Networks Gmbh & Co. Kg Process and device for beat recovery
US5268935A (en) * 1991-12-20 1993-12-07 At&T Bell Laboratories Synchronous digital signal to asynchronous digital signal desynchronizer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5280502A (en) * 1990-11-08 1994-01-18 U.S. Philips Corporation Circuit arrangement for removing stuff bits

Also Published As

Publication number Publication date
EP0676873A3 (de) 1997-01-08
DE4412060C1 (de) 1995-02-23
AU1630995A (en) 1995-11-16
TW280971B (enrdf_load_stackoverflow) 1996-07-11
EP0676873A2 (de) 1995-10-11

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Legal Events

Date Code Title Description
MK14 Patent ceased section 143(a) (annual fees not paid) or expired