AU574884B2 - Multiprocessor memory access system - Google Patents

Multiprocessor memory access system

Info

Publication number
AU574884B2
AU574884B2 AU52360/86A AU5236086A AU574884B2 AU 574884 B2 AU574884 B2 AU 574884B2 AU 52360/86 A AU52360/86 A AU 52360/86A AU 5236086 A AU5236086 A AU 5236086A AU 574884 B2 AU574884 B2 AU 574884B2
Authority
AU
Australia
Prior art keywords
memory access
access system
multiprocessor memory
multiprocessor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
AU52360/86A
Other versions
AU5236086A (en
Inventor
Klaus Gotschlich
Gerhard Lotterbach
Egbert Perenthaler
Jan Faas van Woudenberg
Udo Zucker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of AU5236086A publication Critical patent/AU5236086A/en
Application granted granted Critical
Publication of AU574884B2 publication Critical patent/AU574884B2/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
AU52360/86A 1985-01-28 1985-12-14 Multiprocessor memory access system Ceased AU574884B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19853502721 DE3502721A1 (en) 1985-01-28 1985-01-28 MULTIPROCESSOR SYSTEM
DE3502721 1985-01-28

Publications (2)

Publication Number Publication Date
AU5236086A AU5236086A (en) 1986-08-13
AU574884B2 true AU574884B2 (en) 1988-07-14

Family

ID=6260937

Family Applications (1)

Application Number Title Priority Date Filing Date
AU52360/86A Ceased AU574884B2 (en) 1985-01-28 1985-12-14 Multiprocessor memory access system

Country Status (6)

Country Link
EP (1) EP0209530A1 (en)
JP (1) JPS62501656A (en)
AU (1) AU574884B2 (en)
BR (1) BR8507171A (en)
DE (1) DE3502721A1 (en)
WO (1) WO1986004434A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU591195B2 (en) * 1985-11-15 1989-11-30 Data General Corporation Input/Output controller for a data processing system
AU634367B2 (en) * 1990-05-16 1993-02-18 Mettler-Toledo, Inc. Hysteresis-compensated weighing apparatus and method

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2611396B1 (en) * 1987-02-27 1991-10-11 Trt Telecom Radio Electr DEVICE FOR ALLOWING TWO INFORMATION PROCESSING SYSTEMS ACCESS TO A COMMON CIRCUIT
BE1001383A7 (en) * 1987-12-07 1989-10-17 Electronique Et Telecomm Bell Multiple access device.
GB2215874A (en) * 1988-03-23 1989-09-27 Benchmark Technologies Arbitration system
US5111530A (en) * 1988-11-04 1992-05-05 Sony Corporation Digital audio signal generating apparatus
DE3923872A1 (en) * 1989-07-19 1991-01-24 Philips Patentverwaltung CIRCUIT ARRANGEMENT FOR CONTROLLING ACCESS TO A MEMORY
DE4139011A1 (en) * 1990-11-27 1992-06-04 Jatco Corp Memory device for automobile engine control microcomputer - has back=up voltage supply for maintaining memory contents upon battery disconnection
DE4117393A1 (en) * 1991-05-28 1992-12-03 Kloeckner Humboldt Deutz Ag DEVICE FOR CONTROLLING THE FUEL INJECTION OF AN INTERNAL COMBUSTION ENGINE
FR2692698A1 (en) * 1992-06-19 1993-12-24 Sgs Thomson Microelectronics Method for sharing a random access memory between two asynchronous processors and an electronic circuit for implementing this method.

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU516788B2 (en) * 1977-03-16 1981-06-25 International Business Machines Corp. Floating priority storage control for processors ina multiprocessor system
AU1858983A (en) * 1982-09-03 1984-03-08 Sequoia Systems, Inc. Modular computer system
AU535452B2 (en) * 1979-12-03 1984-03-22 Honeywell Information Systems Italia Multiprocessor system

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4415972A (en) * 1980-12-29 1983-11-15 Sperry Corporation Dual port memory interlock

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU516788B2 (en) * 1977-03-16 1981-06-25 International Business Machines Corp. Floating priority storage control for processors ina multiprocessor system
AU535452B2 (en) * 1979-12-03 1984-03-22 Honeywell Information Systems Italia Multiprocessor system
AU1858983A (en) * 1982-09-03 1984-03-08 Sequoia Systems, Inc. Modular computer system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU591195B2 (en) * 1985-11-15 1989-11-30 Data General Corporation Input/Output controller for a data processing system
AU634367B2 (en) * 1990-05-16 1993-02-18 Mettler-Toledo, Inc. Hysteresis-compensated weighing apparatus and method

Also Published As

Publication number Publication date
JPS62501656A (en) 1987-07-02
WO1986004434A1 (en) 1986-07-31
BR8507171A (en) 1987-07-14
EP0209530A1 (en) 1987-01-28
AU5236086A (en) 1986-08-13
DE3502721A1 (en) 1986-07-31

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