AU5310798A - A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method - Google Patents

A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method

Info

Publication number
AU5310798A
AU5310798A AU53107/98A AU5310798A AU5310798A AU 5310798 A AU5310798 A AU 5310798A AU 53107/98 A AU53107/98 A AU 53107/98A AU 5310798 A AU5310798 A AU 5310798A AU 5310798 A AU5310798 A AU 5310798A
Authority
AU
Australia
Prior art keywords
generating
circuit
data signal
output signals
serial data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU53107/98A
Inventor
Jakob Salling
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infinera Denmark AS
Original Assignee
DSC Communications AS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by DSC Communications AS filed Critical DSC Communications AS
Publication of AU5310798A publication Critical patent/AU5310798A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
    • H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Manipulation Of Pulses (AREA)
AU53107/98A 1996-12-18 1997-12-17 A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method Abandoned AU5310798A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DK1443/96 1996-12-18
DK144396 1996-12-18
PCT/DK1997/000579 WO1998027678A1 (en) 1996-12-18 1997-12-17 A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method

Publications (1)

Publication Number Publication Date
AU5310798A true AU5310798A (en) 1998-07-15

Family

ID=8104894

Family Applications (1)

Application Number Title Priority Date Filing Date
AU53107/98A Abandoned AU5310798A (en) 1996-12-18 1997-12-17 A method of generating a plurality of demultiplexed output signals from a serial data signal and a circuit for performing the method

Country Status (2)

Country Link
AU (1) AU5310798A (en)
WO (1) WO1998027678A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10061768A1 (en) * 2000-12-12 2002-06-27 Infineon Technologies Ag Data stream separation circuit
US7058120B1 (en) 2002-01-18 2006-06-06 Xilinx, Inc. Integrated high-speed serial-to-parallel and parallel-to-serial transceiver
FR2900296A1 (en) * 2006-04-19 2007-10-26 Commissariat Energie Atomique Temporally multiplexed signal e.g. analog voltage signal, demultiplexing method for controlling e.g. microelectrode matrix, involves restoring sample during period of carrier signal, while simultaneously storing another sample in capacitor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3640874A1 (en) * 1986-11-29 1988-06-09 Siemens Ag Circuit arrangement for combining binary signals, divided into two part-signals having in each case half the bit rate at the transmitting end, in the correct bit sequence at the receiving end
JP2877369B2 (en) * 1989-09-11 1999-03-31 株式会社東芝 Demultiplexer
US5150364A (en) * 1990-08-24 1992-09-22 Hewlett-Packard Company Interleaved time-division demultiplexor
US5301196A (en) * 1992-03-16 1994-04-05 International Business Machines Corporation Half-speed clock recovery and demultiplexer circuit
SE515076C2 (en) * 1992-07-01 2001-06-05 Ericsson Telefon Ab L M Multiplexer / demultiplexer circuit
JP2765457B2 (en) * 1993-11-22 1998-06-18 日本電気株式会社 Demultiplexer
DE4410552A1 (en) * 1994-03-26 1995-10-05 Zhihao Dipl Ing Lao Monolithic integrated bipolar 1:4 demultiplexer for wideband communications

Also Published As

Publication number Publication date
WO1998027678A1 (en) 1998-06-25

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