AU4759697A - Use of variable perforation density in copper layer to control cte - Google Patents

Use of variable perforation density in copper layer to control cte

Info

Publication number
AU4759697A
AU4759697A AU47596/97A AU4759697A AU4759697A AU 4759697 A AU4759697 A AU 4759697A AU 47596/97 A AU47596/97 A AU 47596/97A AU 4759697 A AU4759697 A AU 4759697A AU 4759697 A AU4759697 A AU 4759697A
Authority
AU
Australia
Prior art keywords
copper layer
perforation density
variable perforation
control cte
cte
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU47596/97A
Inventor
David A. Hanson
David B. Noddin
Mark F. Sylvester
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WL Gore and Associates Inc
Original Assignee
WL Gore and Associates Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WL Gore and Associates Inc filed Critical WL Gore and Associates Inc
Publication of AU4759697A publication Critical patent/AU4759697A/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3733—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/142—Metallic substrates having insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
AU47596/97A 1996-11-08 1997-10-17 Use of variable perforation density in copper layer to control cte Abandoned AU4759697A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US74703296A 1996-11-08 1996-11-08
US08747032 1996-11-08
PCT/US1997/019113 WO1998020549A1 (en) 1996-11-08 1997-10-17 Use of variable perforation density in copper layer to control cte

Publications (1)

Publication Number Publication Date
AU4759697A true AU4759697A (en) 1998-05-29

Family

ID=25003387

Family Applications (1)

Application Number Title Priority Date Filing Date
AU47596/97A Abandoned AU4759697A (en) 1996-11-08 1997-10-17 Use of variable perforation density in copper layer to control cte

Country Status (3)

Country Link
JP (1) JP2000503489A (en)
AU (1) AU4759697A (en)
WO (1) WO1998020549A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4617209B2 (en) * 2005-07-07 2011-01-19 株式会社豊田自動織機 Heat dissipation device
FR3023975A1 (en) * 2014-07-18 2016-01-22 Thales Sa THERMAL INTERFACE DEVICE WITH MICROPOROUS SEAL CAPABLE OF PREVENTING MIGRATION OF THERMAL GREASE
CN108140619B (en) 2015-11-16 2021-08-06 惠普发展公司，有限责任合伙企业 Circuit package

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1083263A (en) * 1977-06-29 1980-08-05 Norman Hascoe Prefabricated composite metallic heat-transmitting plate unit
DE2855494A1 (en) * 1978-12-22 1980-07-17 Bbc Brown Boveri & Cie Thermally conducting insulating discs for electronic components - comprise ceramic inserts in plastics insulating plate, extending from surface to surface
US4283464A (en) * 1979-05-08 1981-08-11 Norman Hascoe Prefabricated composite metallic heat-transmitting plate unit
US4427993A (en) * 1980-11-21 1984-01-24 General Electric Company Thermal stress relieving bimetallic plate
FR2525815B1 (en) * 1982-04-27 1985-08-30 Inf Milit Spatiale Aeronaut COMPOSITE SUBSTRATE WITH HIGH THERMAL CONDUCTION AND APPLICATION TO SEMICONDUCTOR DEVICE HOUSINGS
US5039335A (en) * 1988-10-21 1991-08-13 Texas Instruments Incorporated Composite material for a circuit system and method of making
CA1316303C (en) * 1988-12-23 1993-04-20 Thijs Eerkes Composite structure
DE4100145A1 (en) * 1990-01-10 1991-07-11 Murata Manufacturing Co Integrated circuit assembly substrate - has metal-ceramic composite material, with metal filling holes in ceramic plate

Also Published As

Publication number Publication date
JP2000503489A (en) 2000-03-21
WO1998020549A1 (en) 1998-05-14

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