AU452091B2 - Phase coherent receiver circuit - Google Patents

Phase coherent receiver circuit

Info

Publication number
AU452091B2
AU452091B2 AU31109/71A AU3110971A AU452091B2 AU 452091 B2 AU452091 B2 AU 452091B2 AU 31109/71 A AU31109/71 A AU 31109/71A AU 3110971 A AU3110971 A AU 3110971A AU 452091 B2 AU452091 B2 AU 452091B2
Authority
AU
Australia
Prior art keywords
receiver circuit
coherent receiver
phase coherent
phase
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
AU31109/71A
Other versions
AU3110971A (en
Inventor
Maurer Robert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Licentia Patent Verwaltungs GmbH
Original Assignee
Licentia Patent Verwaltungs GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Licentia Patent Verwaltungs GmbH filed Critical Licentia Patent Verwaltungs GmbH
Application granted granted Critical
Publication of AU3110971A publication Critical patent/AU3110971A/en
Publication of AU452091B2 publication Critical patent/AU452091B2/en
Expired legal-status Critical Current

Links

AU31109/71A 1970-07-23 1971-07-12 Phase coherent receiver circuit Expired AU452091B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEDE820364 1970-07-23
DE19702036475 DE2036475C (en) 1970-07-23 Phase coherent receiver circuit

Publications (2)

Publication Number Publication Date
AU3110971A AU3110971A (en) 1973-01-18
AU452091B2 true AU452091B2 (en) 1973-01-18

Family

ID=

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