AU3721895A - Cmos dynamic latching input buffer circuit - Google Patents
Cmos dynamic latching input buffer circuitInfo
- Publication number
- AU3721895A AU3721895A AU37218/95A AU3721895A AU3721895A AU 3721895 A AU3721895 A AU 3721895A AU 37218/95 A AU37218/95 A AU 37218/95A AU 3721895 A AU3721895 A AU 3721895A AU 3721895 A AU3721895 A AU 3721895A
- Authority
- AU
- Australia
- Prior art keywords
- buffer circuit
- input buffer
- latching input
- cmos dynamic
- dynamic latching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/356104—Bistable circuits using complementary field-effect transistors
- H03K3/356113—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
- H03K3/356147—Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit using pass gates
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US31591394A | 1994-09-30 | 1994-09-30 | |
US315913 | 1994-09-30 | ||
PCT/US1995/012094 WO1996010866A1 (en) | 1994-09-30 | 1995-09-18 | Cmos dynamic latching input buffer circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
AU3721895A true AU3721895A (en) | 1996-04-26 |
Family
ID=23226616
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU37218/95A Abandoned AU3721895A (en) | 1994-09-30 | 1995-09-18 | Cmos dynamic latching input buffer circuit |
Country Status (3)
Country | Link |
---|---|
AU (1) | AU3721895A (enrdf_load_stackoverflow) |
TW (1) | TW280027B (enrdf_load_stackoverflow) |
WO (1) | WO1996010866A1 (enrdf_load_stackoverflow) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5872736A (en) * | 1996-10-28 | 1999-02-16 | Micron Technology, Inc. | High speed input buffer |
US5917758A (en) | 1996-11-04 | 1999-06-29 | Micron Technology, Inc. | Adjustable output driver circuit |
US5949254A (en) * | 1996-11-26 | 1999-09-07 | Micron Technology, Inc. | Adjustable output driver circuit |
US5838177A (en) * | 1997-01-06 | 1998-11-17 | Micron Technology, Inc. | Adjustable output driver circuit having parallel pull-up and pull-down elements |
US6912680B1 (en) | 1997-02-11 | 2005-06-28 | Micron Technology, Inc. | Memory system with dynamic timing correction |
US6173432B1 (en) | 1997-06-20 | 2001-01-09 | Micron Technology, Inc. | Method and apparatus for generating a sequence of clock signals |
US6018260A (en) * | 1997-08-06 | 2000-01-25 | Lucent Technologies Inc. | High-speed clock-enabled latch circuit |
US6101197A (en) | 1997-09-18 | 2000-08-08 | Micron Technology, Inc. | Method and apparatus for adjusting the timing of signals over fine and coarse ranges |
US6349399B1 (en) | 1998-09-03 | 2002-02-19 | Micron Technology, Inc. | Method and apparatus for generating expect data from a captured bit pattern, and memory device using same |
US6470060B1 (en) | 1999-03-01 | 2002-10-22 | Micron Technology, Inc. | Method and apparatus for generating a phase dependent control signal |
US7168027B2 (en) | 2003-06-12 | 2007-01-23 | Micron Technology, Inc. | Dynamic synchronization of data capture on an optical or other high speed communications link |
US7234070B2 (en) | 2003-10-27 | 2007-06-19 | Micron Technology, Inc. | System and method for using a learning sequence to establish communications on a high-speed nonsynchronous interface in the absence of clock forwarding |
FR2948809B1 (fr) * | 2009-07-31 | 2012-08-17 | St Microelectronics Rousset | Amplificateur de lecture faible puissance auto-minute |
US10211832B1 (en) | 2017-12-05 | 2019-02-19 | Micron Technology, Inc. | Input buffer circuit |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0727717B2 (ja) * | 1988-07-13 | 1995-03-29 | 株式会社東芝 | センス回路 |
DE68927005T2 (de) * | 1988-10-11 | 1997-02-20 | Oki Electric Ind Co Ltd | Schaltung für einen differentiellen kreisverstärker |
US5132567A (en) * | 1991-04-18 | 1992-07-21 | International Business Machines Corporation | Low threshold BiCMOS circuit |
-
1995
- 1995-08-01 TW TW84107986A patent/TW280027B/zh active
- 1995-09-18 WO PCT/US1995/012094 patent/WO1996010866A1/en active Application Filing
- 1995-09-18 AU AU37218/95A patent/AU3721895A/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
WO1996010866A1 (en) | 1996-04-11 |
TW280027B (enrdf_load_stackoverflow) | 1996-07-01 |
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