AU3610878A - Bubble memory redundancy storage - Google Patents

Bubble memory redundancy storage

Info

Publication number
AU3610878A
AU3610878A AU36108/78A AU3610878A AU3610878A AU 3610878 A AU3610878 A AU 3610878A AU 36108/78 A AU36108/78 A AU 36108/78A AU 3610878 A AU3610878 A AU 3610878A AU 3610878 A AU3610878 A AU 3610878A
Authority
AU
Australia
Prior art keywords
bubble memory
redundancy storage
memory redundancy
storage
bubble
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
AU36108/78A
Other languages
English (en)
Inventor
James Bernard Hall
James Steven Flannigan
Dennie Joel Shadrick
Bennett Sanford Scott
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/796,934 external-priority patent/US4458334A/en
Priority claimed from US05/804,979 external-priority patent/US4090251A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of AU3610878A publication Critical patent/AU3610878A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/86—Masking faults in memories by using spares or by reconfiguring in serial access memories, e.g. shift registers, CCDs, bubble memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • G11C19/0875—Organisation of a plurality of magnetic shift registers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/003—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation in serial memories
AU36108/78A 1977-05-16 1978-05-15 Bubble memory redundancy storage Pending AU3610878A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/796,934 US4458334A (en) 1977-05-16 1977-05-16 Redundancy map storage for bubble memories
US05/804,979 US4090251A (en) 1977-06-09 1977-06-09 Bubble memory redundancy storage

Publications (1)

Publication Number Publication Date
AU3610878A true AU3610878A (en) 1979-11-22

Family

ID=27121801

Family Applications (1)

Application Number Title Priority Date Filing Date
AU36108/78A Pending AU3610878A (en) 1977-05-16 1978-05-15 Bubble memory redundancy storage

Country Status (8)

Country Link
JP (1) JPS5466729A (nl)
AU (1) AU3610878A (nl)
BR (1) BR7803086A (nl)
DE (1) DE2821228C2 (nl)
FR (1) FR2391531A1 (nl)
GB (1) GB1596990A (nl)
IT (1) IT1156748B (nl)
NL (1) NL7805283A (nl)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5427693B2 (nl) * 1971-10-30 1979-09-11
US3792450A (en) * 1972-05-08 1974-02-12 Singer Co System for overcoming faults in magnetic anisotropic material
US3909810A (en) * 1974-02-25 1975-09-30 Texas Instruments Inc Bubble memory minor loop redundancy scheme
JPS5816264B2 (ja) * 1974-12-09 1983-03-30 株式会社日立製作所 ジキバブルメモリソウチ
FR2307332A1 (fr) * 1975-04-07 1976-11-05 Sperry Rand Corp Procede de stockage d'information dans une memoire comportant au moins une zone de memorisation defectueuse et dispositif pour l'execution de ce procede
JPS51118341A (en) * 1975-04-11 1976-10-18 Hitachi Ltd Shift register type memory
US4070651A (en) * 1975-07-10 1978-01-24 Texas Instruments Incorporated Magnetic domain minor loop redundancy system

Also Published As

Publication number Publication date
DE2821228C2 (de) 1981-10-08
IT7849402A0 (it) 1978-05-16
JPS5466729A (en) 1979-05-29
NL7805283A (nl) 1978-11-20
IT1156748B (it) 1987-02-04
FR2391531A1 (fr) 1978-12-15
FR2391531B1 (nl) 1983-03-04
BR7803086A (pt) 1979-03-20
GB1596990A (en) 1981-09-03
DE2821228A1 (de) 1978-11-23

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