AU2392788A - Address detection circuit using a memory - Google Patents
Address detection circuit using a memoryInfo
- Publication number
- AU2392788A AU2392788A AU23927/88A AU2392788A AU2392788A AU 2392788 A AU2392788 A AU 2392788A AU 23927/88 A AU23927/88 A AU 23927/88A AU 2392788 A AU2392788 A AU 2392788A AU 2392788 A AU2392788 A AU 2392788A
- Authority
- AU
- Australia
- Prior art keywords
- memory
- detection circuit
- address detection
- address
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/18—Address timing or clocking circuits; Address control signal generation or management, e.g. for row address strobe [RAS] or column address strobe [CAS] signals
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/24—Time-division multiplex systems in which the allocation is indicated by an address the different channels being transmitted sequentially
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L45/00—Routing or path finding of packets in data switching networks
- H04L45/74—Address processing for routing
- H04L45/742—Route cache; Operation thereof
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Memory System (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Small-Scale Networks (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62260828A JPH01103341A (en) | 1987-10-16 | 1987-10-16 | Address detecting circuit |
JP62-260828 | 1987-10-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU2392788A true AU2392788A (en) | 1989-04-20 |
AU617128B2 AU617128B2 (en) | 1991-11-21 |
Family
ID=17353321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU23927/88A Ceased AU617128B2 (en) | 1987-10-16 | 1988-10-17 | Address detection circuit using a memory |
Country Status (4)
Country | Link |
---|---|
US (1) | US5319764A (en) |
JP (1) | JPH01103341A (en) |
AU (1) | AU617128B2 (en) |
CA (1) | CA1317676C (en) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3387538B2 (en) * | 1992-02-03 | 2003-03-17 | 松下電器産業株式会社 | Data transfer device, processor element and data transfer method |
KR100198065B1 (en) * | 1995-06-28 | 1999-06-15 | 김영환 | Destination address detecting device of hardware packet router |
US5930489A (en) * | 1996-02-09 | 1999-07-27 | Advanced Micro Devices, Inc. | Microprocessor configured to detect memory operations having data addresses indicative of a boundary between instructions sets |
JP3604548B2 (en) | 1997-11-28 | 2004-12-22 | 株式会社ルネサステクノロジ | Address match detection device, communication control system, and address match detection method |
FR2796790B1 (en) * | 1999-07-23 | 2002-11-29 | Sagem | METHODS OF TRANSMITTING AND BROADCASTING DATA PACKETS AND RECEIVERS FOR IMPLEMENTING THE METHODS |
JP3757882B2 (en) * | 2002-03-12 | 2006-03-22 | 日本電信電話株式会社 | Packet filtering method |
JP3784054B2 (en) * | 2002-06-10 | 2006-06-07 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Method and recording medium for rearranging MAC addresses |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4575818A (en) * | 1983-06-07 | 1986-03-11 | Tektronix, Inc. | Apparatus for in effect extending the width of an associative memory by serial matching of portions of the search pattern |
JPS61145636A (en) * | 1984-12-19 | 1986-07-03 | Nec Corp | Symbol string collating device |
CA1264844A (en) * | 1985-06-05 | 1990-01-23 | Nec Corporation | Time division switching system having a priority selector responsive to proceed-to-send requests |
GB2182789B (en) * | 1985-11-08 | 1989-03-08 | Texas Instruments Ltd | A content addressable memory |
JPH0754933B2 (en) * | 1986-08-14 | 1995-06-07 | 日本電気株式会社 | Circuit switching method and device in packet network |
-
1987
- 1987-10-16 JP JP62260828A patent/JPH01103341A/en active Granted
-
1988
- 1988-10-14 CA CA000580146A patent/CA1317676C/en not_active Expired - Fee Related
- 1988-10-17 AU AU23927/88A patent/AU617128B2/en not_active Ceased
-
1991
- 1991-04-26 US US07/690,336 patent/US5319764A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US5319764A (en) | 1994-06-07 |
CA1317676C (en) | 1993-05-11 |
AU617128B2 (en) | 1991-11-21 |
JPH01103341A (en) | 1989-04-20 |
JPH0514458B2 (en) | 1993-02-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK14 | Patent ceased section 143(a) (annual fees not paid) or expired |