AU2242288A - Alias address support - Google Patents
Alias address supportInfo
- Publication number
- AU2242288A AU2242288A AU22422/88A AU2242288A AU2242288A AU 2242288 A AU2242288 A AU 2242288A AU 22422/88 A AU22422/88 A AU 22422/88A AU 2242288 A AU2242288 A AU 2242288A AU 2242288 A AU2242288 A AU 2242288A
- Authority
- AU
- Australia
- Prior art keywords
- alias address
- address support
- support
- alias
- address
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
- G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
- G06F12/1063—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache the data cache being concurrently virtually addressed
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/65—Details of virtual memory and virtual address translation
- G06F2212/653—Page colouring
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10463587A | 1987-10-02 | 1987-10-02 | |
US104635 | 1987-10-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
AU2242288A true AU2242288A (en) | 1989-04-06 |
AU609519B2 AU609519B2 (en) | 1991-05-02 |
Family
ID=22301527
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU22422/88A Ceased AU609519B2 (en) | 1987-10-02 | 1988-09-20 | Alias address support |
Country Status (7)
Country | Link |
---|---|
JP (1) | JPH071489B2 (en) |
AU (1) | AU609519B2 (en) |
CA (1) | CA1301354C (en) |
DE (1) | DE3832758C2 (en) |
FR (1) | FR2621408A1 (en) |
GB (1) | GB2210479B (en) |
HK (1) | HK95493A (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5276798A (en) * | 1990-09-14 | 1994-01-04 | Hughes Aircraft Company | Multifunction high performance graphics rendering processor |
US5813046A (en) * | 1993-11-09 | 1998-09-22 | GMD--Forschungszentrum Informationstechnik GmbH | Virtually indexable cache memory supporting synonyms |
GB2293670A (en) * | 1994-08-31 | 1996-04-03 | Hewlett Packard Co | Instruction cache |
US6189074B1 (en) * | 1997-03-19 | 2001-02-13 | Advanced Micro Devices, Inc. | Mechanism for storing system level attributes in a translation lookaside buffer |
US6446189B1 (en) | 1999-06-01 | 2002-09-03 | Advanced Micro Devices, Inc. | Computer system including a novel address translation mechanism |
US6510508B1 (en) | 2000-06-15 | 2003-01-21 | Advanced Micro Devices, Inc. | Translation lookaside buffer flush filter |
US6665788B1 (en) | 2001-07-13 | 2003-12-16 | Advanced Micro Devices, Inc. | Reducing latency for a relocation cache lookup and address mapping in a distributed memory system |
US10846235B2 (en) | 2018-04-28 | 2020-11-24 | International Business Machines Corporation | Integrated circuit and data processing system supporting attachment of a real address-agnostic accelerator |
US11853231B2 (en) | 2021-06-24 | 2023-12-26 | Ati Technologies Ulc | Transmission of address translation type packets |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS54148329A (en) * | 1978-05-15 | 1979-11-20 | Toshiba Corp | Buffer memory control system and information processor containing buffer memory |
JPS595482A (en) * | 1982-06-30 | 1984-01-12 | Fujitsu Ltd | Cache buffer controlling system |
JPS62145341A (en) * | 1985-12-20 | 1987-06-29 | Fujitsu Ltd | Cache memory system |
EP0282213A3 (en) * | 1987-03-09 | 1991-04-24 | AT&T Corp. | Concurrent context memory management unit |
-
1988
- 1988-08-10 GB GB8819017A patent/GB2210479B/en not_active Expired - Fee Related
- 1988-09-16 CA CA000577716A patent/CA1301354C/en not_active Expired - Fee Related
- 1988-09-20 AU AU22422/88A patent/AU609519B2/en not_active Ceased
- 1988-09-27 DE DE3832758A patent/DE3832758C2/en not_active Expired - Fee Related
- 1988-09-30 FR FR8812827A patent/FR2621408A1/en active Granted
- 1988-10-03 JP JP63247551A patent/JPH071489B2/en not_active Expired - Fee Related
-
1993
- 1993-09-16 HK HK954/93A patent/HK95493A/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH01108651A (en) | 1989-04-25 |
HK95493A (en) | 1993-09-24 |
GB2210479A (en) | 1989-06-07 |
CA1301354C (en) | 1992-05-19 |
JPH071489B2 (en) | 1995-01-11 |
AU609519B2 (en) | 1991-05-02 |
FR2621408A1 (en) | 1989-04-07 |
DE3832758C2 (en) | 1996-05-30 |
DE3832758A1 (en) | 1989-04-13 |
GB2210479B (en) | 1992-06-17 |
FR2621408B1 (en) | 1994-04-22 |
GB8819017D0 (en) | 1988-09-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK14 | Patent ceased section 143(a) (annual fees not paid) or expired |