AU2020100999A4 - A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width - Google Patents
A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width Download PDFInfo
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- AU2020100999A4 AU2020100999A4 AU2020100999A AU2020100999A AU2020100999A4 AU 2020100999 A4 AU2020100999 A4 AU 2020100999A4 AU 2020100999 A AU2020100999 A AU 2020100999A AU 2020100999 A AU2020100999 A AU 2020100999A AU 2020100999 A4 AU2020100999 A4 AU 2020100999A4
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- 238000000034 method Methods 0.000 title claims description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 5
- 230000001360 synchronised effect Effects 0.000 abstract description 3
- 101000694017 Homo sapiens Sodium channel protein type 5 subunit alpha Proteins 0.000 abstract 1
- 238000009432 framing Methods 0.000 abstract 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03C—MODULATION
- H03C2200/00—Indexing scheme relating to details of modulators or modulation methods covered by H03C
- H03C2200/0037—Functional aspects of modulators
- H03C2200/0045—Pulse width, duty cycle or on/off ratio
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Abstract
The invention can be implemented in various fields, for example, military, aviation, science and so
on. In some instruments, such as framing camera, the hardcore is ICCD that is built on the
contrivance. And as a result, the camera is able to output more stable signal in terms of super
high-speed photography. Besides, another indispensable application is as a component of an
accelerator. And in this case, the accelerator can precisely control several clusters through it. For
the above application, the invention consists of a few parts: TTL-NIM level conversion circuit,
input signal delay device, pulse generator, and mixer. When a sinusoidal signal is input, the
accelerator timer will generate a synchronized frequency signal that is TTL level. And then it will
be converted to NIM level by TTL-NIM and then delayed. The delayed signal will enter the pulse
generator that can adjust its pulse width within a certain range, and eventually output a gate
signal that people want, and then enter the mixer to combine with the original signal to
modulate the original signal. So with the invention, people can easily modulate the pulse width
and extension time of the input sinusoidal signal within the allowable range.
1
AAAkAAA
SG DBM
TTL-NIMfrev trigger
Timing signal TD4V Pulse generator
Figure 1
Figure 2
1
Description
AAAkAAA SG DBM
TTL-NIMfrev trigger
Timing signal TD4V Pulse generator
Figure 1
Figure 2
TITLE A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width
FIELD OF THE INVENTION The invention is applied in the field of science, engineering, especially in the accelerator.
BACKGROUND OF THE INVENTION The pulse delay adjustable circuit is mainly used in high-speed photography, and the performance of this circuit directly affects the performance of the frame camera. In addition, it can also be applied to accelerators. At present, the world's research on high-precision pulse delay adjustable circuits has also invested a lot of resources. For example, the SRS digital delay generator DG535 developed by Stanford University in the United States has excellent performance and stable output, but it is expensive and bulky, and it is not easy to apply in many scenarios. The development of this circuit in China started in the 1970s and has achieved good results so far. For example, in 2006, the Chinese Academy of Sciences' high-precision time-delay synchronizer was realized through a combination of digital delay and analog delay, with high resolution, but there were still defects in the delay range.
Delay is the main difficulty of the circuit, which is divided into digital delay and analog delay, which have their own advantages. The principle of digital delay is simple, easy to implement, and has a larger delay range, but the delay resolution is limited by the working clock frequency, so it is difficult to obtain higher resolutions; analog delays are easy to obtain high resolutions, but multi-level chip cascade Only by forming complex structures can a large delay range be obtained. Therefore, in the present invention, a combination of digital and analog delay is selected, so that the pulse delay adjustable circuit is used as a part of the accelerator's event timing system to precisely control one or several clusters in the storage ring. It cooperates with the beam feedback system to finally produce the required stable beam. Compared with the previous delay circuit, it is small in size, simple in structure, and high in delay resolution, which is enough for an accelerator.
In order to adapt to the performance of current accelerators, the present invention proposes a simple and effective method for generating a delay signal with adjustable pulse width. The scheme of the present invention is as follows: First of all, the device has TTL-NIM level shift circuit, xx delay plug-in, pulse generator, and mixer. The source and synchronization signals are processed to achieve a specific pulse width adjustment in the mixer. It includes the following steps: (1) The accelerator outputs a source signal and a synchronized TTL signal (2) The synchronization signal enters the TTL-NIM level conversion circuit and is converted to the NIM level (3) NIM synchronization signal enters TD4V delay plug-in to achieve adjustable step delay (4) The delayed synchronization signal enters the pulse generator and outputs a pulse gate signal of a specific width (5) The gate signal and the source signal enter the mixer at the same time, mix in them, and finally output the modulated source signal
DESCRIPTION OF DRAWING figure: Generation of adjustable sine pulse figure2: TTL-NIM level schematic figure3: Transformer parameters figure4: xx delay plug-in diagram figure5: Pulse generator Agilent 33220A figure6: gate signals with different pulse widths figure7: Sine signal modulated by a gate signal figure: Typical circuit of a double-balanced mixer
DESCRIPTION OF PREFERRED EMBODIMENT In the experiments, we used the signals generated by the accelerator and the following devices, and finally got the expected results. We will give them an introduction, corresponding technical information and experimental results.
1. TTL-NIM level conversion circuit Since the input terminal of the signal delay plug-in requires a signal at the NIM level, it is necessary to convert a signal at the TTL level to a signal at the NIM level. The definition of TTL level is: high level is more than 2.OV effective, and low level is less than or equal to 0.8V effective. NIM level is defined as: high level is OV effective, and low level is -0.8V effective.
Figure 2 illustrates the TTL-NIM circuit. The transformer model is 23Z247SMD, produced by Pulse, with an inductance of 80IH, and its operating frequency range is 0.05-90MHz (Figure 3). The ground at the input is distinct from the ground at the output. The diode 1N1418 selects the negative level of the TTL level and generates a voltage drop of 610mV to ground. The capacitor filters the signal to remove signal glitches.
2. Signal delay plug-in We used TD4V that can postpone the signal, and the input level requirement of the signal is NIM. The delay step is 2.5ns, the rise time is 800ps, and the output jitter is less than 4.5ps. (Figure 4)
3. Pulse generator The pulse generator model is Agilent 33220A (Figure 5). In the case of an external trigger, it can output a pulse signal synchronized with the external trigger signal. The width of the pulse can be adjusted between 20ns-780ns and the rising time of the pulse is 5ns. The delayed signal outputs a gate signal of a desired pulse width via a pulse transmitter. (Figure 6)
4. Mixer The mixer is a frequency conversion circuit. The principal disadvantage of the frequency conversion circuit is to use the frequency change effect of non-linear devices. Non-linear devices include diodes, triodes, field effect transistors and differential pairs. The corresponding mixing circuits include triode mixing circuits and dual differential pair analog multipliers. Frequency circuit, diode double-balanced mixer circuit, etc.
Among them, the diode double balance circuit (Double Balanced Mixer) is most commonly used in the RF and microwave bands. It has the advantages of simple circuit, low noise, few combined frequency components, and high operating frequency. The main disadvantage is that the mixing gain is less than one. Its typical circuit is shown in Figure 7, consisting of precisely matched 4 x N (N = 1, 2, 3) Schottky diodes and two broadband transmission line transformers. DBM is mainly used as a modulator.
The source signal is fitted by the gate signal to output the required signal (Figure 8).
Claims (1)
1. A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width, characterized in that, including: A TTL-NIM level shifting circuit with stable operation, simple structure and short delay time; An input signal delay device with short step length.
Figure 2 Figure 1
Figure 3 2020100999
Figure 4
Figure 5
Figure 7 Figure 6
Figure8
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2020100999A AU2020100999A4 (en) | 2020-06-12 | 2020-06-12 | A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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AU2020100999A AU2020100999A4 (en) | 2020-06-12 | 2020-06-12 | A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width |
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Publication Number | Publication Date |
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AU2020100999A4 true AU2020100999A4 (en) | 2020-07-16 |
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AU2020100999A Ceased AU2020100999A4 (en) | 2020-06-12 | 2020-06-12 | A method of generation of delayed gate-controlled sinusoidal signals with adjustable pulse width |
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Country | Link |
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AU (1) | AU2020100999A4 (en) |
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2020
- 2020-06-12 AU AU2020100999A patent/AU2020100999A4/en not_active Ceased
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