AU2013205970A1 - Load detection method for universal dimmer - Google Patents
Load detection method for universal dimmer Download PDFInfo
- Publication number
- AU2013205970A1 AU2013205970A1 AU2013205970A AU2013205970A AU2013205970A1 AU 2013205970 A1 AU2013205970 A1 AU 2013205970A1 AU 2013205970 A AU2013205970 A AU 2013205970A AU 2013205970 A AU2013205970 A AU 2013205970A AU 2013205970 A1 AU2013205970 A1 AU 2013205970A1
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- Australia
- Prior art keywords
- dimmer
- zero cross
- load
- universal
- detector
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Abstract
Universal phase dimmer consists of both leading edge and trailing dimming capability and this disclosed load detection method simply makes use of the trailing edge MOSFET/IGBT output stage to implement the load detection with minimal component counts. UNIVERSAL DIMMER MODULE Zero Cross Detect OUT Zero Cross IN Detect Processor Detect ocesor O utput UT OStageAC Figure 1- Configuration of the dimmer Processor OUT Zero Cross Detect OUT (Non-inductive Load) Zero Cross Detect OUT (inductive Load) Figure 2 - Detector outputs when no driving pulse is applied
Description
1 LOAD DETECTION METHOD FOR UNIVERSAL PHASE DIMMER Leading edge (forward phase) and trailing edge (reverse phase) dimmers have their advantages and limitations in AC (alternating current) power dimming technology, trailing edge dimmer can perform reasonably well for most of the electrical loads. However improper use of trailing edge dimmer to drive an inductive load may result in disaster, under such configuration either the inductive load or the trailing edge dimmer itself or both of them will be damaged. A universal dimmer is the integration of leading edge and trailing edge dimming inside a same device with the ability to switch between the two operating modes according to the nature of the load. In order to detect the inductive nature of the load, this invention introduces a highly reliable and simple method for implementation. The load detection method comprises with an AC power line detector, a controller and an output power stage as shown on Figure 1. The AC power line detector, controller and output stage in this invention are with common voltage ground. The AC line detector is simply a resistor with a NPN bipolar transistor which reflects the status of the power line giving a high level output for half cycle and a low level output for the other half cycle when the output stage is off. The rising and falling edges of the detector signify the zero cross position. The output stage can be a combination of power diodes, power MOSFETs and power IGBTs to form a conducting path for the AC current to the load when the output stage is on. The output stage in this invention is using two power MOSFETs with the two Sources of the MOSFETs connected to the common ground while the two Gates of the MOSFETs are commonly driven by the controller. The Drains of the two MOSFETs are connected to the AC line and the load respectively. Each 2 MOSFET if enabled allows the current to pass through in one direction for half AC cycle. Similar function can also be implemented by a full bridge rectifier and a MOSFET, and the switching function of the MOSFET can be replaced by IGBT with a power diode in parallel. The controller in this invention is a low power CPU which determines the exact timing of powering the load and monitors the feedback from the detector. When the output driving stage is at off state (load not being energized), the waveform from the detector as seen by the controller is as shown on Figure 2. When loads are suddenly powered up, depending on the nature of the loads, they will respond to the sudden change differently and these changes will be reflected on the detector with high and low level changes. The load detection method in accordance to this invention recognizes the response difference of excitation of a narrow energizing pulse to a load, and in order not to cause any undesirable effect to the load when it is being examined, the pulse is activated near the AC voltage zero cross point. The line detector monitors the exact timing at which the AC power line passes through the zero voltage point, zero cross. The zero cross information is fed to the controller and the generation of a narrow driving pulse (less than 1/256 duration of the AC period) from the controller at the proximity of the zero cross point will disturb the detector waveform effectively. Depending on the exact timing of the driving pulse from the controller which in turn powers up the load, the output of the line detector for inductive load and non-inductive loads will be as shown on Figure 3 and Figure 4. The controller decides at which point the driving pulse is to be applied, giving that the detector will give an extended period after the excitation for inductive loads and by comparing the high and/or low level of the line detector at expected timing slot, the controller can accurately identify the nature of the load.
Claims (5)
1. A universal phase dimmer comprises of an AC power line detector, a controller and a programmable output stage.
2. A universal phase dimmer as claimed in claim 1, wherein the dimmer can generate a narrow pulse to turn on the output stage at close proximity ( before and/or after ) of the AC line zero-cross point.
3. A universal phase dimmer as claimed in claim 1 and 2 where in the dimmer has a detector to read the change of AC line before and after the narrow pulse.
4. A universal phase dimmer according to any one of the claims 1-3 determines the nature of the load ( inductive or not ) from the detector.
5. A universal phase dimmer substantially as herein before described with reference to Figure 1-4 of the accompanying drawings. Chun To Lau 22 MAY 2013
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2013205970A AU2013205970A1 (en) | 2012-06-03 | 2013-05-22 | Load detection method for universal dimmer |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
AU2012902301A AU2012902301A0 (en) | 2012-06-03 | Load detection method for universal phase dimmer | |
AU2012902301 | 2012-06-03 | ||
AU2013205970A AU2013205970A1 (en) | 2012-06-03 | 2013-05-22 | Load detection method for universal dimmer |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2013205970A1 true AU2013205970A1 (en) | 2013-12-19 |
Family
ID=49759662
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2013205970A Abandoned AU2013205970A1 (en) | 2012-06-03 | 2013-05-22 | Load detection method for universal dimmer |
Country Status (1)
Country | Link |
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AU (1) | AU2013205970A1 (en) |
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2013
- 2013-05-22 AU AU2013205970A patent/AU2013205970A1/en not_active Abandoned
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK5 | Application lapsed section 142(2)(e) - patent request and compl. specification not accepted |