AU2007349611B2 - Method of connecting an antenna to a transponder chip and corresponding inlay substrate - Google Patents
Method of connecting an antenna to a transponder chip and corresponding inlay substrate Download PDFInfo
- Publication number
- AU2007349611B2 AU2007349611B2 AU2007349611A AU2007349611A AU2007349611B2 AU 2007349611 B2 AU2007349611 B2 AU 2007349611B2 AU 2007349611 A AU2007349611 A AU 2007349611A AU 2007349611 A AU2007349611 A AU 2007349611A AU 2007349611 B2 AU2007349611 B2 AU 2007349611B2
- Authority
- AU
- Australia
- Prior art keywords
- wire
- substrate
- loop
- chip
- antenna
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
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- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
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- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
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- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
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Abstract
A method and apparatus are provided for making radio frequency (RF) inlays. The RF inlays include an integrated circuit and an antenna affixed to a substrate material carrying the integrated circuit. During processing, portions of the wire forming the antenna are located adjacent to, but not directly over the integrated circuit such that the wire may be subject to further processing, such as removing insulation without potentially damaging the integrated circuit. In the subsequent processing step, the wire ends are placed in contact with and secured to the integrated circuit terminal areas. Methods of the invention include forming loops with the wire ends wherein the loops extend above a plane of the substrate, and in another processing step, the loops are displaced to be electrically connected to the terminal areas. Methods also include repositioning the wire and using a brush or comb device.
Description
WO 2008/114091 PCT/IB2007/004589 METHOD AND APPARATUS FOR MAKING A RADIO FREQUENCY INLAY FIELD OF THE INVENTION The present invention relates to a method and apparatus for making radio 5 frequency (RF) inlays and the resulting inlay, and more particularly to a method and apparatus for making high frequency RF devices that include an integrated circuit and an antenna affixed to a substrate material. BACKGROUND OF THE INVENTION An RF inlay is generally understood to be an integrated circuit and antenna joined 10 together on some type of substrate. Typically, the inlay is subjected to further processing to make a final product. Further processing may include adding additional outer layers of material such as plastic to make a card-shaped device. Other finishing techniques may form the inlay into a variety of final forms depending upon the final application of the product. 15 In general terms, the integrated circuit is inductively coupled to one or more interrogating devices or readers through the antenna by means of radio frequency communication. The integrated circuit or chip contains information that is useful for performing various tasks. One type of information is identification information pertaining to the holder or user of the RF device. In this case, the RF device may also be referred to 20 as a radio frequency identification (RFID) device. Not all RF devices necessarily contain information about the identity of the user and some RF devices contain information in addition to the identity of the user. RF inlays in their finished form are used in a variety of applications. For example, RF inlays are used for making security access devices (RFID devices) or may be used for 25 other applications that may or may not involve identification of the user, including but not limited to access to computer or computer networks and databases, public transportation passes, toll way access passes, vending machine payment devices, and bank debit and/or credit cards and passports. Given the variety and expanding end user applications for RF devices, they are also sometimes referred to as "smart cards." Some identification 30 applications, such as passports, now utilize RFID inlays or RFID prelams (transponders that have been subjected to a lamination process) to store identification data and to allow efficient and rapid transfer of the identification data for processing by appropriate 1 WO 2008/114091 PCT/IB2007/004589 governmental agencies. The identification data may include biometric data, such as fingerprints, and/or photos of the passport holder, as well as information identifying the holder. A variety of methods exist for manufacturing RF inlays. In some methods a 5 substrate of one or more layers is processed in various steps including hot and/or cold lamination. A chip and antenna subassembly is incorporated in one or more of the layers and the layers are joined together by adhesives or by softening the plastic layer and, by means of pressure, joining the layers together. In other methods, wire is affixed to or embedded within a substrate in the form of an antenna and the opposing ends of the 10 antenna coil are attached to the terminals of an integrated circuit (IC or chip) or to the terminal areas of a chip module. A chip module as that term is used herein comprises an integrated circuit attached to a lead frame having enlarged terminal areas. The terminal areas of the chip are connected to the enlarged terminal areas of the lead frame by either extremely small and delicate wires, on the order of 20 to 28 microns in diameter, or 15 through a conductive adhesive such as in the case of a flip chip. The chip and the electrical connections to the terminal areas of the lead frame are encased in an epoxy layer for protection. The combination or subassembly of the chip/chip module and the coil of wire that forms an antenna is sometimes referred to as a transponder. The wire forming the antenna may be embedded fully or partially within the substrate by use of an ultrasonic 20 wire embedding technique, as understood by those skilled in the art. The chip/chip module may be secured to the substrate by either placing it on the surface of the substrate or by placing it in a recess formed in the substrate. Adhesive may or may not be used to adhere the chip/chip module to the substrate. The ends of the coil of wire may be bonded or connected to the terminal areas of the chip or chip module at about the same time as the 25 wire is embedded in the substrate, or the bonding may be done in a separate or subsequent manufacturing step. Nominally, the wire used in the manufacture of RF inlays, where the wire is ultrasonically embedded in a substrate, is 110 to 120 microns in diameter, which includes an outer insulating layer. The wire is insulated to prevent short-circuiting of the antenna, 30 as the windings of wire forming the antenna are closely positioned and may touch. The insulation layer is typically made from polyurethanes, polyvinylbutyrals, polyamides, polyesterimids and similar compounds. Thicker or larger diameter wires, compared to thinner or smaller diameter wires, are more easily handled and typically provide a farther 2 WO 2008/114091 PCT/IB2007/004589 read range when inductively coupled to a reader. Larger diameter wires are also more robust and are susceptible to removal from an RF device without damage to their integrity or the operation and functionality of the transponder. Potential removal and reuse of a transponder raises a number of security and privacy problems. For example, if a 5 legitimate transponder subassembly (chip/chip module and antenna) may be removed from one passport and placed in another fraudulent passport, substantial security issues are raised. There are a number of patents that disclose various devices and methods for the manufacture of RF devices including the manufacture of inlays. For example, U.S. Patent 10 Nos. 6,698,089 and 6,233,818 disclose methods of making an RF device wherein at least one chip and one antenna are affixed to a chip mounting board or substrate. The wire forming the antenna is embedded in the substrate by use of an ultrasonic generator. As part of the wire embedding process disclosed in each of these patents, the insulated antenna wire is first fixed to the substrate. The insulated wire is then guided directly over 15 and away from a terminal area of the RFID chip and embedded to the substrate on the opposite side of the chip from the first embedding location to linearly align the wire between the two fixed locations and directly across the terminal area. Next, the antenna is formed by embedding the insulated wire into the substrate at a location spaced from the chip and terminal areas, the antenna being formed with a specific number of turns of the 20 wire. The antenna wire is then guided over another terminal area of the RFID chip and finally embedded on the opposite side to anchor the second end of the wire directly across the other terminal area of the chip. The wire is then cut and the embedding head (or embedding tool) moves to a second transponder site on the substrate to repeat the same process. In the next stage of production, the wire portions passing directly over the 25 terminal areas of the RFID chip are interconnected to the terminal areas by means of thermal compression bonding. Alternatively, the wire may be embedded as described and the chip subsequently positioned in a pre-designated recess where the terminals of the chip will contact the previously secured wire. The ends of the wire then will be bonded to the terminal areas of the chip by means of thermal compression bonding. U.S. Patent 30 6,088,230 describes an alternative process where a first end of the wire is positioned in contact with a first terminal area of a chip or chip module and is bonded to the first terminal area, then the embedding tool embeds the wire in the substrate to form an antenna, and then the wire is positioned over a second terminal area of the chip or chip 3 WO 2008/114091 PCT/IB2007/004589 module where it is bonded to the terminal area. While the inventions disclosed in these references may be adequate for the intended purposes, there is still a need for an improved method of making RF inlays for various applications including but not limited to contactless smart cards and other security 5 access devices. With respect to improved security for information stored on an integrated circuit incorporated within a transponder, it is desirable to improve fraud prevention. For example, with electronic passport devices it is desirable to inhibit the removal of a transponder from a valid passport such that the removed transponder cannot be used in a 10 second fraudulent passport. In this regard, the present invention may utilize small diameter wire, for example 60-micron wire diameter or less. By using thinner wire, the ability to successfully remove a chip and antenna assembly from an existing product, such as a passport, is substantially reduced as the antenna and/or its connection to the chip or chip module will likely be destroyed upon any attempted removal. However, utilizing 15 thinner wire also places a greater significance on the bond between the wire and chip terminals. When using thinner wire, flaws or defects in the bonding process can lead to weak and/or faulty bonds. There is also a need to provide RF and RFID devices that have increased life and durability. One factor that limits the useful life of such devices is the quality of the 20 electrical connection between the antenna wire and the chip. Improving the structural stability of the electrical connection or bond will necessarily extend the life of the transponder. In this regard, another problem is that undesirable oxidation may occur over time due to impurities at the bond site. For example, insulation material on the wire or by 25 products of the insulation material created as part of the process of bonding insulated wire to the chip or lead frame terminal areas can form impurities at the bond site. More specifically, and as previously noted, the wire that is used to form the antenna often includes an outer insulation or coating. During a typical manufacturing process, the antenna wire is bonded to the terminal area or bond pad by a high-energy thermal 30 compression bonding technique. The technique involves the application of a high voltage arc through a thermal bonding head that causes removal of the insulation, and simultaneously creates a localized weld that electrically connects the wire to the designated terminal. If all of the insulation is not removed from the wire the remaining 4 insulation may reduce the quality of the electrical bond and, therefore, the quality of the electrical connection. Additionally, by-products of the insulation material formed from the high temperature bonding process may be captured within the bond and may cause 5 oxidation or deteriorization of the bond over time. Current wire embedding techniques do not allow for precise localized removal of the insulation due to the potential of damaging the chip or chip module in the process resulting from the lose proximity of the embedded wire and terminal areas. Indeed, as noted previously, prior art techniques lay the wire directly on top of the terminal areas of the chip as part of the wire embedding 10 process. Additionally, a higher voltage is required to be used with thermal bonding process in order to accomplish both removal of the insulation and bonding of the wire to the terminal area than if the wire was insulated. As a result, the thermal bonding heads must be more frequently replaced, thereby increasing manufacturing costs, including a slowdown of production capacity while the heads are replaced. Moreover, even with 15 complete removal of the insulation, a by-product or residue, such as hydrocyanic acid or other compounds, may remain at the bond site. It is believed that one or more of these residues may oxidize over time thereby further degrading the quality of the bond site and potentially shortening the life of the transponder. Any discussion of documents, acts, materials, devices, articles and the like is 20 included in the specification solely for the purpose of providing a context for the present invention. It is not suggested or represented that any or all of these matters formed part of the prior art base or were common general knowledge in the field relevant to the present invention as it existed in Australia before the priority date of each claim of this application. 25 SUMMARY OF THE INVENTION According to a first aspect of the present invention there is provided a method of manufacturing a radio frequency inlay, said method comprising: providing a substrate defining a substrate plane, and an integrated circuit positioned on said substrate or in a recess formed on said substrate, and a pair of terminal 30 areas associated with said integrated circuit; affixing a wire to said substrate to form an antenna, said affixing step including: (i) affixing a first portion of said wire to said substrate laterally offset from and not electrically connected to one of said terminal areas and forming a first wire loop from a portion of said first portion of wire with said first wire loop extending above 35 said plane of said substrate; (ii) affixing a second portion of the wire to the substrate to form the windings of an antenna; chbm A01 9847775-v1 306158994 5 (iii) affixing a third portion of said wire to said substrate laterally offset from and not electrically connected to the other of said terminal areas and forming a second wire loop from a portion of said third portion of wire with said second wire loop extending above said plane of said substrate. 5 According to a second aspect of the present invention there is provided a method of manufacturing a radio frequency inlay, comprising: placing a chip or chip module on the surface of a substrate or in a recess formed in a substrate, said chip or chip module including a terminal area; forming a first loop of wire extending above the surface of the substrate, said first 10 loop of wire formed at a location offset from but not directly over or in connect with said chip or chip module; embedding a length of wire partially or completely in said substrate, said length of wire electrically connected to said first loop of wire; moving said first loop of wire relative to the substrate to a position directly over or 15 in contact with said terminal area; electrically connecting said first loop of wire to said terminal area. According to a third aspect of the present invention there is provided a radio frequency device comprising: a substrate defining a substrate plane, and an integrated circuit positioned on said 20 substrate or in a recess formed on said substrate; a pair of terminal areas associated with said integrated circuit and positioned adjacent thereto; a wire affixed to said substrate to form an antenna, said wire comprising a first portion laterally offset from and not electrically connected to one of said terminal areas 25 and a first wire loop formed from said first portion, a second portion of the wire embedded in said substrate to form windings of the antenna, and a third portion of said wire laterally offset from and not electrically connected to the other of said terminal are and a second wire loop formed from said second portion. Preferred embodiments of the present invention provide a method and apparatus 30 for manufacturing RF and RFID inlays wherein fraud may be prevented by using a relatively thin wire antenna wire. Making the antenna wire of a minimum size makes chbm A01 9847775-v1 306158994 5A removal of the antenna more difficult since the wire is more prone to breakage or damage during an attempted removal. In preferred embodiments the present invention increases the life of RF and RFID devices wherein the quality of the electrical bonds between the antenna and chip bonding 5 pads are improved by removing insulation from the wire prior to bonding, which also enhances the use of thinner antenna wire. Another advantage of preferred embodiments of the present invention is that known production equipment can be used to manufacture the inlay, thereby ensuring that the inlay of the present invention can still be incorporated within exiting automated 10 manufacturing processes. Embodiments of the present invention therefore provide a method and apparatus for manufacturing RF inlays or similar devices. In one aspect of the present invention, it may arsm A0117162608v1 306158994 WO 2008/114091 PCT/IB2007/004589 be considered a method of making inlays. In another aspect of the present invention, it may be considered the apparatus or manufacturing equipment used for making the inlays. In yet another aspect of the present invention, it may be considered an apparatus for making the RF inlays, including various sub-combinations, that is, the various apparatus 5 components to produce the RF inlay. In a further aspect, the present invention may be considered the resulting inlay device produced by the method or apparatus. In accordance with the apparatus for making the inlays, one or more wire embedding heads, or sonotrodes as they may also be called, are used to embed antenna wire partially or fully into a substrate. The embedding heads may form the wire into 10 virtually any pattern including forming the windings of an antenna. The substrate may accommodate one or a plurality of antennas. A single antenna may correspond to a single inlay or two or more antennas may be positioned in close proximity to each other and correspond to a single inlay. In the latter case, the plurality of antennas may be connected to a' common chip/chip module or to different chips/chip modules and function 15 independently. If a plurality of embedding heads is utilized, the embedding heads may move in unison or independently. Upon completion of the wire embedding at each transponder site, the wire is cut and either the embedding head(s) move to the next site or the substrate moves relative to the embedding head(s) to position new transponder sites proximate the embedding heads. Typically, the chip or chip module is placed on the 20 substrate or in a recess formed in the substrate prior to any wire being embedded into the substrate. However, in the present invention, the chip or chip module may be placed in position after or during the wire embedding process. The present invention provides an alternative approach of embedding wire into a substrate as described in the previously identified prior art patents and other known prior 25 art. Rather than embedding the wire on one side of the terminal area of the RFID chip or chip module, guiding the wire directly over the terminal area, then embedding the insulated wire into the substrate on the opposite side of the terminal area, forming the antenna and then positioning the insulated wire directly over a second terminal area of the RFID chip and embedding it again, it is proposed that the embedding and bonding process 30 begin with the wire adjacent to and laterally offset from the terminal area of a chip or chip module and that the wire not be passed over the terminal area. Rather, the wire is embedded into the substrate to form an antenna with the two end portions of the wire forming the antenna, not embedded in the substrate. The two end portions are positioned 6 WO 2008/114091 PCT/IB2007/004589 adjacent to and laterally offset from terminal areas of a chip or chip module. In one embodiment the full length of each of these end portions of wire are unsecured to the substrate. In a second step, after the antenna is formed, the end portions of the wire are moved into a position over or in contact with the terminal areas of the chip or chip 5 module. The wire ends are not brought into contact with the terminal areas until after the antenna is fully formed, and bonding does not occur until the antenna is fully formed. In a second embodiment of the invention, a first length of the wire is embedded in the substrate with the beginning portion of the first length of wire extending out of the substrate. This first length of wire is positioned adjacent to and laterally offset from a 10 terminal area of a chip or chip module. A next continuous length of wire is not embedded in the substrate but is placed over the substrate. The next following length of wire is embedded into the substrate to form an antenna. Then, the next continuous length is positioned along the substrate but not embedded. Finally, a length of wire is embedded in the substrate with the final portion of that length of wire extending out of the substrate. 15 The last two lengths of wire are positioned adjacent to and laterally offset from the terminal areas of a chip or chip module. The lengths of wire that are laterally offset from the terminal areas are then repositioned so that portions of those lengths of wire are positioned over or in contact with the terminal areas of the chip or chip module. These lengths of wire are not brought into contact with the terminal areas until after the antenna 20 is fully formed. In a third embodiment, a first end of the wire is affixed to or embedded in the substrate for a relatively short distance of approximately 0.5 to 1.0 centimeters, although this length may vary. The ultrasonic transducer is then preferably turned off and the embedding head raised a distance away from the surface of the substrate. Because the 25 prior length of wire is fixed to the substrate, a further or second length of wire is pulled from the wire supply as the embedding head is raised. The embedding head then moves parallel to the plane of the substrate causing more wire to be pulled from the wire supply. Then, the head is lowered to a position close to the substrate, the ultrasonic transducer is turned on, and a further length of wire is embedded in the substrate. As a result of the 30 actions of turning off the ultrasonic transducer and the continued movement of the embedding head, a portion of the wire is not fixed to or embedded in the substrate but rather forms a loop or bridge of wire extending above the plane of the substrate. This loop of wire is formed at a position laterally offset from the terminal areas of the chip or the 7 WO 2008/114091 PCT/IB2007/004589 chip module, with the term laterally offset being defined by the plane of the substrate. Preferably, the loop of wire is formed perpendicular to the plane of the substrate, but this is not a requirement of the invention. The process of fixing the wire to or embedding the wire in the substrate continues such that an antenna is formed on or in the substrate and 5 then a second loop or bridge of wire is similarly formed at a second location on the substrate, typically but not necessarily on the opposite side of the chip or chip module from the first loop of wire. In the process of forming the two loops of wires, the loops are formed at positions offset or spaced from the terminal areas and chip, and therefore no portion of the loops are positioned over or in contact with any portion of the chip or 10 terminal areas. In a subsequent processing step, a portion of the insulation material that encapsulates the antenna wire along a portion of the loops of wire is removed. More specifically, in a fourth embodiment, a laser is used to strip away the insulation from the wire along a discrete length of the loop portion of the wire. The locations where the 15 insulation has been stripped from the loops are the areas that will make electrical contact with and will be bonded to the terminal areas. As previously noted, the loops are offset or spaced from the terminal areas such that the loops are not positioned directly over or in contact with the terminal areas of the chip or chip module. This positioning permits a laser to be focused on the loops of wire to remove a discrete portion of the insulation from 20 the loops without striking or damaging the terminal areas or the chip itself. If the loops of wire were positioned directly over, in contact with or even very close to the terminal areas of the chip or chip module, the laser may damage the terminal areas and thereby impair the ability to bond the wire to the terminal area or cause an inferior bond to be formed, or it may directly damage the chip itself. 25 In a subsequent processing step, the apparatus includes a wire-displacing tool that is used to displace the loops in a position such that they may then be bonded to the designated terminal areas. In the preferred embodiment of the present invention, a pair of jaws or fork shaped elements are used to engage the loops of wire and to displace and reform the loops so that at least some portion of the wire loops are centered directly over 30 and/or in contact with the terminal areas of a chip or chip module or an area or region where the terminal areas will ultimately be positioned. In another preferred embodiment, in lieu of fork shaped elements to move or engage the loops, other means may be provided to position the loops in contact with the terminal areas, such as by use of a brush or comb 8 WO 2008/114091 PCT/IB2007/004589 device. Instead of forming loops, it is also contemplated that the lengths of wire that are located adjacent to the terminal areas can simply be lengths of wire that lie on top of the substrate, e.g., are not fixed to or embedded in the substrate, and then are displaced over the terminal areas either by the forked shaped elements or other means, including but not 5 limited to a brush, a comb or even manually. One end of each length of wire could be unattached to the substrate thereby allowing each length of wire to be simply moved to a position in contact with the corresponding terminal area where the wires are to be attached. In yet a further processing step in accordance with the method and apparatus of the 10 present invention, a bonding element is provided that electrically connects the lengths of wire or loops of wire positioned over or in contact with the terminal areas to the designated terminal areas. Bonding does not occur until the antenna is fully formed. It should be appreciated that these processing steps may all occur at a single location or may occur at multiple locations. For example, a single head element may 15 include the ultrasonic embedding tools, the tool to reposition the lengths of wire over or in contact with the terminal areas, a laser and the bonding tool. Alternatively, these tools may be positioned on two or more separate heads or each positioned on a separate tool head. Still further, the substrate may be moved to different positions for some or all of these process steps while the tools remain stationary. 20 Various other features and advantages will become apparent from a review of the following detailed description taken in conjunction with the drawings. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a fragmentary perspective view of a processing machine used to manufacture RF and/or RFID inlays; 25 Fig. 2 is an enlarged plan view of a portion of an RF or RFID inlay specifically illustrating a chip module positioned on a substrate, and placement of opposing ends of the antenna coil adjacent the chip module; Fig. 3 is another enlarged plan view illustrating the opposing ends of the antenna coil secured to the terminal areas of the chip module; 30 Fig. 4 is an enlarged fragmentary perspective view of the inlay of Fig. 2 illustrating the chip module and antenna coil including portions of the opposing ends of the antenna coil configured in loop shapes prior to attachment of the ends to the terminal areas; Fig. 5 is an enlarged fragmentary perspective view of Fig. 3 illustrating the inlay 9 WO 2008/114091 PCT/IB2007/004589 wherein portions of the opposing ends of the antenna coil are secured to the terminal areas of the chip module; Fig. 6 is a schematic view illustrating working components of the processing machine for manufacture of the RF and/or RFID inlay, and specifically illustrating (i) an 5 embedding tool for securing the antenna coil to a substrate (ii) a laser for removing insulation from an insulated wire and (iii) a wire displacing tool for displacing the antenna wire loops prior to bonding to the terminal areas; Fig. 7 and 8 are schematic views of the embedding tool illustrating the sequence by which the opposing ends of the antenna coils are located adjacent to the chip module; 10 Fig. 9 is another schematic view illustrating another processing step for manufacture of the RF and/or RFID inlay wherein a laser is used to remove insulation material from the insulated wire forming the antenna coil; Fig. 10 is a greatly enlarged elevation view illustrating the laser that has stripped the insulation material away from a designated location on the insulated wire; 15 Fig. 11 is a plan view illustrating the location of the laser beam that strips the insulation material and the spaced orientation of the laser to prevent damage to the chip module; Fig. 12 is a fragmentary perspective view of the wire-displacing tool prior to engaging the wire loops; 20 Fig. 13 is an enlarged end view taken along line 13-13 of Fig. 12 illustrating one of the jaw assemblies and its orientation with respect to one of the wire loops to be engaged; Fig. 14 is an elevation view of the wire-displacing tool wherein the tool has been lowered and the lower surfaces of the jaw assemblies are placed in contact with the upper surface of the substrate; 25 Fig. 15 is an enlarged end view similar to Fig. 13 but showing the jaw assembly in the lowered position of Fig. 14 and showing the back or opposite side of the jaw assembly; Fig. 16 is a perspective view showing the wire-displacing tool after the wire loops have been engaged and displaced by movement of the jaw assemblies; Fig. 17 is an elevation view of the wire-displacing tool in the position of the tool 30 shown in Fig. 16; Fig. 18 is a perspective view showing the jaw assemblies disengaged from the wire loops after the loops have been displaced; and Fig. 19 is a schematic view of a thermal bonding head that creates the thermal 10 WO 2008/114091 PCT/IB2007/004589 compression bond between the antenna wire and the terminal area of a chip or chip module and the resulting electrical connection between the exposed conductors on the wire portions and the respective terminal areas; Fig. 20 is a schematic view of an embedding tool such as a sonotrode having a 5 length of residual wire extending from the end of the capillary tube having been previously cut following completion of wire placement in an RF device; Fig. 21 is a schematic view of the embedding tool in a raised position wherein an additional length of wire is dispensed from the tool compared to that of Fig. 20; Fig. 22 is an enlarged plan view of a portion of another RF or RFID inlay wherein 10 the opposing ends of the antenna coil placed adjacent the chip module are not formed as loops, but rather are angular extensions, but still being offset or spaced from the terminal areas; Fig. 23 illustrates the displacement of the angular extensions by brushing or combing them over the terminal areas so that the extensions may then be thermally bonded 15 to the terminal areas. It should be appreciated that even though a chip module is shown in the foregoing described figures, a chip may be substituted for a chip module (or vice versa) without departing from the scope of the present invention. Additionally, the wire shown in Figs. 1-23 is insulated unless otherwise indicated. However, it should be appreciated that 20 uninsulated wire could be used with the present invention, provided care was taken to avoid creating a short circuit. In this case, the insulation removal step would be omitted. DETAILED DESCRIPTION Fig. 1 illustrates one embodiment of a processing apparatus or machine 10 for manufacturing RF and/or RFID inlays. The machine 10 may be generally described as 25 including a power drive group 12, a flexible communications bus 14 that transfers operational instructions from a computer processor (not shown) and power to the working components of the machine. For example, the bus 14 may facilitate the transfer of electronic signals between the processor and the working elements 16 of the machine that creates the inlays. As discussed further below, the working elements 16 may include a 30 group or combination of one or more embedding tools, lasers, wire cutters and thermal bonding heads. The working elements 16 traverse laterally across a support table 24 that secures a substrate 26 forming the bodies of the inlays. In the example machine shown in Fig. 1, a lateral slide rail 18 allows the working elements 16 to traverse in the lateral 11 WO 2008/114091 PCT/IB2007/004589 direction across the substrate 26. A longitudinal frame 20 secured to the lateral side rail 18 allows the machine to traverse or index in the longitudinal direction along longitudinal side rails 22. The dashed or phantom lines 28 designate or outline the prospective individual inlay devices to be formed from the common substrate 26. Reference number 5 30 is a chip or chip module previously placed on the substrate, or designates a recess where a chip or chip module may be placed in the future. As mentioned, each inlay device has at least one transponder comprising an integrated circuit chip or chip module and a wire antenna that is connected to the chip or chip module. A CNC or similar controller controls the positioning and movement of the working elements 16 relative to the substrate 10 26. Referring to Figs. 2 and 3, a portion of an RF or RFID inlay device (hereinafter "device") is illustrated. In accordance with the present invention, the device includes the substrate 26, typically made of a thermoplastic material or other material receptive to wire embedding (or may comprise a layer of material receptive to wire bonding affixed to the 15 surface of a substrate, such as an adhesive layer), a chip module 34, and an antenna element formed by a continuous length of wire 32. The chip module 34 in a known construction includes an integrated circuit 36 and at least one pair of terminal pads or terminal areas 40. Bonding pads 38 formed on the integrated circuit 36 are electrically connected to the terminal areas 40 by means of one or more very small leads or conductors 20 42. A protective layer of material such as epoxy 44 covers the integrated circuit 36, portions of the respective terminal areas 40 aind the interconnecting conductors 42. Alternatively, the chip module may be constructed and assembled in other ways known to those of skill in the art or the integrated circuit 36 may be used in place of a chip module 34, in which case the antenna wire 32 is directly bonded to the bonding pads 38. 25 The portions of the insulated wire 32 shown in Figs. 2 and 3 are the opposing ends of the wire that form the antenna, although this is more easily seen and understood with reference to Figs. 4 and 5. During manufacture, portions of the opposing ends of the wire are formed into a loop or bridge above the surface of the substrate, as shown in Fig. 4. Subsequently, the loops are displaced from the position shown in Figs. 2 and 4 to the 30 position shown in Figs. 3 and 5. A portion of each loop is then bonded to the respective terminal areas 40 at bonding points 48. As shown in Fig. 2, there is a distinct lateral offset or gap defined by distance D between the wire 32 and terminal area 40 such that the wire is not guided or positioned over or in contact with the terminal area 40 as it is positioned 12 WO 2008/114091 PCT/IB2007/004589 on or affixed to the substrate. In the preferred embodiment, only after the wire 32 is completely affixed to the substrate to form an antenna are the loops displaced for purposes of bonding a portion of the loops to the terminal areas. Nonetheless, it should be understood that the loops may be displaced before the wire embedding process is 5 completed. However, with respect to this first embodiment, it should be appreciated that both ends of a loop must be secured in some fashion, such as embedded in or affixed to the substrate at points 46, before the loop may be displaced. If only one end is fixed in place and the other end is not fixed to the substrate or otherwise secured in some manner, displacement of the loop will not work in a reliable or repeatable manner. As will be 10 appreciated in connection with other embodiments, one end of the wire may be loose or not fixed to the substrate. With further reference to Figs. 4 and 5, the device is shown wherein the antenna element is formed in a plurality of tracks or concentrically arranged coils 50. In Fig. 4, the opposing ends of the wire 32 are formed as loops 47 that extend generally orthogonally 15 above the upper surface of the substrate and adjacent to but not over any portion of the chip module 34. As smaller diameter wire is used, the loop may not extend orthogonally to the substrate but may take a different position. The protruding loops 47 and their spaced arrangement from the chip module allows a selected amount of insulated material to be removed from the wire prior to electrical bonding of the wire to the terminal areas. 20 In Fig. 5, the insulated wire 32 has been displaced such that the wire loops are forced to a position directly above or into contact with the terminal areas 40. Portions of the wire loops are then thermally bonded to the terminal areas to make an electrical connection. Fig. 6 illustrates further details of the working elements 16 of the machine 10. The working elements 16 include at least one embedding tool 52 that is used to embed the 25 insulated wire 32 fully or partially into the substrate 26. As understood by those skilled in the art, the embedding tool 52, utilizes high frequency or ultrasonic oscillation in order to embed the insulated wire into the substrate. The embedding tool travels in a pre programmed pattern under the direction of a processor or controller to form the desired shape or pattern for the antenna. In Fig. 6, the insulated wire 32 is dispensed from the tip 30 53 of the embedding tool. The insulated wire that is dispensed but not yet attached to the substrate 26 is shown as insulated wire 54. A tube 55 positioned adjacent the embedding tool can be used to deliver a flow of air to cool the embedding head. The other working elements 16 include at least one laser 56 that is used to remove the insulation material 13 WO 2008/114091 PCT/IB2007/004589 from the insulated wire, at least one wire displacing tool 58 that displaces the wire loops to the positions shown in Figs. 3 and 5 such that wire may then be secured to the terminal areas, and a wire cutter (not shown) that cuts the wire and permits the machine to move relative to the substrate and form the next antenna. The elements 16 may move together as 5 a single group to make the inlays, or various combinations of the elements 16 may be positioned at different locations or individually positioned at different locations to most efficiently manufacture an array of inlays formed from the common or separate substrate 26. Since the antenna is a single, continuous length of insulated wire, the embedding 10 tool 52 must travel in a pre-determined pattern to dispense the wire such that the loops and concentric windings are formed without breaking continuity in the wire. Thus, in the making of the antenna, a first step in the process is to form one of the loops 47 generally proximate to but laterally offset from the chip module 34 relative to the plane of the substrate 26. Next, the wire is affixed to the substrate in the form of an antenna pattern 15 and then the embedding tool forms the second loop 47 generally proximate to but offset from an opposite side of the chip module. It should be appreciated that the location of the formed loops of wire is generally proximate the location of the respective terminal areas to which each loop of wire will be attached. After the second loop has been formed, the insulated wire is cut, and the embedding tool 52 may then move to the next location on the 20 substrate for formation of the next antenna, the substrate is moved relative to the embedding tool or some combination of relative movement occurs between the embedding tool and substrate. Referring to Figs. 7 and 8, an operational sequence of the embedding tool 52 is illustrated for forming the second loop of the pair of loops 47, but it should be appreciated 25 that the process is nearly identical for forming the first loop. From left to right in Fig. 7, the sequence is shown as dispensing the wire from the tool 52 and embedding the insulated wire 32 in the substrate 26, then upward movement of the embedding tool 52 to raise the insulated wire to a designated height H above the upper surface of the substrate 26 while sequentially or simultaneously turning off the ultrasonic source, and then 30 horizontally traversing the embedding tool at the designated height for a desired distance forming a wire loop 47 of a generally known length. Referring to Fig. 8, the embedding tool 52 is then moved downward, the ultrasonic source is turned on and the end of the wire is embedded in the substrate 26 for a distance. At this point, the insulated wire can be cut 14 WO 2008/114091 PCT/IB2007/004589 and the embedding tool can move to the next station on the substrate to form the next antenna pattern. The embedding tool forms the first loop 47 in the same general sequence as described with reference to Figs. 7 and 8. However, instead of cutting the wire after formation of the loop, the embedding tool continues embedding wire to form the antenna 5 and the second loop. As previously noted in connection with the present embodiment, the wire must be affixed to the substrate at 46, on both sides of the loops or otherwise secured in some fashion, in order for the loops to be displaced in subsequent handling. Referring now to Figs. 9-11, the insulation removal aspect of the invention is shown in operation. In order to improve the quality of the electrical bond between the 10 antenna and the chip or chip module, particularly when working with small diameter wire of 60 microns or less, it is desirable to remove a portion of the insulation material that encapsulates the metal conductor. The laser 56 generates a laser or ultraviolet light beam 57 that contacts a defined portion of the loops 47 in order to remove a selected amount of insulation. As shown in Fig. 10, the laser beam 57 is directed to remove the designated 15 portion of the insulation material 72, thereby exposing the interior metal conductor 74. As shown in Fig. 11, a circular pattern 76 represents that portion of the substrate contacted by the laser beam 57. The size and shape of the beam emitted by the laser may be altered to meet system requirements and space limitations. It is noted that the laser beam 57 does not strike any portion of the chip or chip module 34, thereby preventing any damage to the 20 chip, chip module or their respective terminal areas. The gap or distance D between the insulated wire and the chip module ensures the insulation material can be safely removed without contaminating or damaging the bond site with controlled use of the laser. The laser 56 is shifted or indexed from one loop to the next in order to sequentially treat each loop. As necessary, a protective jacket or shroud (not shown) may be utilized in 25 combination with the laser 56 to restrict inadvertent reflection of the laser light towards the chip module or towards the operator of the equipment. Additionally, it may be desirable to place a temporary protective pad (not shown) directly underneath the wire loop being treated with the laser such that the laser does not burn a hole through or otherwise irreparably damage the substrate. The protective pad could be incorporated in a 30 controllable arm that is incorporated with the working elements 16 wherein the pad is placed during operation of the laser, and then retracted. As a result of the foregoing process, the insulation is fully removed from a defined portion of the wire and any residue or by-product from the removal process is eliminated by the laser or harmlessly settles on 15 WO 2008/114091 PCT/IB2007/004589 the substrate at a position safely removed from the terminal areas of the chip and/or chip module. Now referring to Figs. 12-18, the wire-displacing tool 58 is shown in operation. Referring first to Figs. 12-14, the construction of the tool 58 is characterized by (i) a frame 5 60, (ii) a pair of vertical supports 62, (iii) a pair of jaw assemblies 63 wherein each jaw assembly includes a pair of spaced jaws 64, and (iv) a pair of springs 68 that bias the rotational movement of the jaw assemblies 63 about respective pins 70. Each of the jaws 64 includes a notch 66 that engages the loops 47 as discussed below. The wire-displacing tool 58 is lowered from the position of Fig. 12 such that the lower edges of the jaws 64 10 contact the upper surface of the substrate 26 as shown in Fig. 14. As the jaw assemblies 63 make contact with the substrate, the pairs of jaws 64 rotate toward one another about the pins 70 so that the lower surfaces of the pairs of jaws sit flush on the upper surface of the substrate 26. Referring to Fig. 15, a central arch 65 of each of the jaw assemblies 63 allows the jaw assemblies to move toward the chip or chip module without the jaws or any 15 other portion of the jaw assemblies striking the chip or chip module and, therefore movement of the jaws does not risk changing the position of the chip or chip module. Referring to Figs. 16 and 17, the jaws are moved toward one another so that each loop 47 is engaged with one of the pairs of jaws and the wire loops are secured in the notches 66. The loops are displaced by respective movement of the jaws toward a terminal area of a 20 chip or chip module. More specifically, the wire comprising the loops 47 bends or deforms in response to the inward movement of the jaws. As best seen in Fig. 3, the shape of the deformed loop comprises three distinct linear segments due to the location fo the embedded or fixed areas 46 and the shape of the notches 66 of the jaw assemblies 63 which cause the loop to bend at location 49 as well as at location 46. The loops therefore 25 are displaced to a position directly above and perhaps in contact with at least a portion of the terminal areas 40. Referring to Fig. 18, the jaw assemblies have been disengaged and the wire loops have been displaced to a position where they can then be bonded to the respective or corresponding terminal areas. In the preferred embodiment, the inward or pinching 30 movement of the opposed jaws is limited by adjustable physical stops which prevent the jaws from too large of a movement which could dislodge portions of the wire fixed in the substrate at point 46 and thereby potentially misposition the loop wire relative to the terminal areas of the chip or chip module. The length of wire forming each loop 47 and its 16 WO 2008/114091 PCT/IB2007/004589 height H together with the shape or profile of the jaws define the maximum distance the jaws 64 may move. As should be appreciated, the distance D at which the wire 32 is offset from the chip module 34 may be adjusted by adjusting the height H and/or length of the loop of wire. 5 Referring now to Fig. 19, another working element 16 is shown, namely, the thermal bonding head 80 that is used to electrically bond the loops 47 that have been displaced the position above the respective terminal areas 40. In this figure, the thermal bonding head 80 is shown as compressing one of the loops 47 in contact with one of the terminal areas 40. The thermal bonding head generates a voltage sufficient to electrically 10 bond the loops to the terminal areas. Like the laser 56, the bonding head 80 is indexed or shifted from one bonding site to the next in order to sequentially bond each loop to its corresponding terminal area. Figure 20 illustrates an example of an embedding device such as an ultrasonic sonotrode 90. The sonotrode includes a manifold 92 which houses a capillary tube 94 and 15 a compressed air channel 96 that communicates with the capillary tube 94. The wire 32 is routed through the capillary tube so that it can be dispensed from the distal tip 98 of the sonotrode. A wire clamping mechanism 102 controls the feed of wire. The clamping mechanism jaws close together to prevent feed of the wire. The compressed air can control the rate at which the wire is dispensed from the capillary tube when the jaws are 20 open. At the completion of laying wire at a previous RF device, the wire 32 is cut leaving a residual amount of wire 100 extending from the distal tip of the embedding tool. This residual amount is equal in length to the distance between the embedding tool and the cutting tool (not shown). This residual amount of wire is used for the next RF site to be 25 manufactured. Referring to Fig. 21, the embedding tool is shown in a raised position relative to the substrate. A greater length of residual wire is shown compared to that shown in Fig. 20. The additional length may be created by forcing air through channel 96 to push a length of wire out of the sonotrode. Alternatively, the wire may be embedded or fixed to 30 the substrate and an additional length of wire drawn from the wire supply by moving the sonotrode. Referring now to Fig. 22, an alternate method is shown for configuring the ends of the antenna coil so that they may be subsequently placed in a position for electrical 17 WO 2008/114091 PCT/IB2007/004589 connection to the terminal areas 40. As shown, the ends of the coil wire 104 are arranged as angular extensions from the embedded coil and they do not contact any part of the chip module 34. Rather, the ends 104 simply lay on the substrate adjacent to the chip module. These angular extensions may be formed by simultaneously moving the ultrasonic head 5 and forcing air through channel 96 to expel wire from the device. Once the length of wire has been arranged on the substrate, the coil 50 is formed. Then another length of the wire is positioned generally as shown to form the second angular extension. It is also alternatively contemplated that the wire ends 104 could have a very small length thereof that is embedded which helps to stabilize the position of the length of wire prior to 10 repositioning and bonding to a terminal area. In the next step of the manufacturing process, the angular extensions are moved into position over the terminal areas as shown in Figure 23 for interconnection with the terminal areas. If any portion of the wire ends 104 are embedded, the force of the element displacing the wire ends overcomes the embedding force. The angular extensions can be 15 brushed or combed into position, such as by a rotating brush or comb 106. The brush or comb 106 can be another element incorporated in the group of working elements 16. Alternatively, the angular extensions may be gripped and rotated into position. The gripping may be accomplished by a machine or device, or manually by an operator. Once the angular extensions are placed over the terminal areas, the wire ends can be thermally 20 bonded as discussed above. Thus, with the method of manufacture shown in Figures 22 and 23, it is not necessary to form loops but rather, just free extending ends that are placed on top of the substrate and then rotated into position for bonding. As discussed above with respect to the removal of insulation from the wire, insulation can also be removed from the angular extensions without damaging the chip module or any other portions of the inlay or 25 transponder device since the angular extensions are spaced from the chip module. One possible sequence for laying the antenna as shown in the embodiment of Figures 22 and 23, comprise the following: first, a length of wire is extended from the embedding head to form a first angular extension. The wire end 104 of the first angular extension may simply lie on the substrate, or a very small length thereof may be embedded 30 in the substrate. The embedding tool then traverses across the substrate in an angular fashion to not lay the wire over any portion of the chip module, but to remain offset from the chip module. The embedding tool travels to the periphery of the substrate and then begins laying the concentric coils to form the antenna. Upon formation of the last coil, the 18 embedding tool travels in an angular orientation to form the second angular extension. Again, the embedding tool does not traverse over any portion of the chip module. In the embodiment shown, the insulated wire is cut at a position so that the angular extensions are approximately the same length, and have approximately the same angular orientation 5 with respect to the opposite sides of the terminal areas. However, it should be appreciated that the angular extension may have different lengths and/or orientations provided the relocation equipment can position the lengths of wire in contact with the terminal areas. A device, such as the brush or comb 106, is then used to displace the angular extensions over the designated portions of the chip module, such as the terminal 10 areas, for electrically connecting the angular extensions to the chip module. The advantages to the present invention are clear. A manufacturing process is provided for manufacturing RF inlays or transponder devices wherein an improved electrical bond may be achieved between the antenna and terminal areas of the chip module by use of a laser that effectively removes all of the insulation from a designated 15 portion of the wire loops. The creation of the protruding loops spaced from the chip module allows the laser to operate without damaging the chip module or any other portions of the inlay or transponder device. This, in turn, allows use of smaller diameter insulated wire which makes the final RF device less susceptible to physical tampering. The working elements of the processing machine may be integrated in a group such that a 20 single processing machine may be used to fully fabricate the inlay, thereby eliminating the need for additional processing machines or non-cooperating manufacturing components. Alternatively, the processing tools may be separately located or separately co-located in different combinations. Since the insulation has been removed from the antenna wire prior to bonding of 25 the antenna wire to the terminal areas, the thermal compression bonding head can e operated at a lower voltage, thereby extending the life of the thermal compression bonding head. Additionally, the lower voltage is also compatible with and facilitates the use of smaller diameter wire. The lower voltage can be used to adequately bond the antenna wire to the terminal without completely destroying the wire conduct that could 30 otherwise occur with a head that operates at much higher voltages. While the foregoing invention has been disclosed with respect to preferred embodiments, it shall be understood that various other changes and modification can be made to the invention in accordance with the scope of the claims appended hereto. It is to be noted that, throughout the description and claims of this specification 35 the word "comprise" and variations of the word, such as "comprising" and "comprises" is not intended to exclude other additives, components, integers or steps. arsm A0117162608v1 306158994 19
Claims (21)
1. A method of manufacturing a radio frequency inlay, said method comprising: providing a substrate defining a substrate plane, and an integrated circuit positioned on said substrate or in a recess formed on said substrate, and a pair of terminal 5 areas associated with said integrated circuit; affixing a wire to said substrate to form an antenna, said affixing step including: (i) affixing a first portion of said wire to said substrate laterally offset from and not electrically connected to one of said terminal areas and forming a first wire loop from a portion of said first portion of wire with 10 said first wire loop extending above said plane of said substrate; (ii) affixing a second portion of the wire to the substrate to form the windings of an antenna; and (iii) affixing a third portion of said wire to said substrate laterally offset from and not electrically connected to the other of said terminal areas and 15 forming a second wire loop from a portion of said third portion of wire with said second wire loop extending above said plane of said substrate.
2. A method, as claimed in claim 1, wherein: affixing said wire to said substrate comprises embedding said wire partially or fully into said substrate. 20
3. A method, as claimed in claim 1 or claim 2, further including the step of: displacing the first and second wire loops relative to the substrate to which the first and second wire loops are affixed such that a portion of said first loop is positioned over at least some portion of one of said pair of said terminal areas and a portion of said second wire loop is positioned over at lest some portion of the other of said pair of 25 terminal areas.
4. A method, as claimed in claim 3, further including the step of: electrically bonding portions of said first and second wire loops to the corresponding terminal areas.
5. A method, as claimed in any one of claims 1 to 4, wherein said wire is insulated, 30 further including the step of: chbm AO 9847775-v1 306158994 20 treating portions of said first and second wire loops to remove insulation thereon thereby exposing a conductor of the underlying wire.
6. A method, as claimed in claim 5, wherein: said treating step comprises applying a laser beam to said treated portions. 5
7. The method of claim 6, further comprising: positioning said wire loops, said laser and said terminal areas whereby operation of the laser removes insulation from said wire but said laser does not strike said terminal areas.
8. The method of any one of claims 3 to 7, further wherein: 10 said first and second wire loops are displaced by a mechanical device.
9. The method of claim 8, wherein: said mechanical device is a brush or comb.
10. A method of manufacturing a radio frequency inlay, comprising: placing a chip or chip module on the surface of a substrate or in a recess formed in 15 a substrate, said chip or chip module including a terminal area; forming a first loop of wire extending above the surface of the substrate, said first loop of wire formed at a location offset from but not directly over or in connect with said chip or chip module; embedding a length of wire partially or completely in said substrate, said length of 20 wire electrically connected to said first loop of wire; moving said first loop of wire relative to the substrate to a position directly over or in contact with said terminal area; and electrically connecting said first loop of wire to said terminal area.
11. The method of claim 10, further comprising: 25 using a laser to remove said insulation.
12. The method of claim 11, further comprising: using a laser to remove said insulation.
13. The method of claim 12, further comprising: chbm A019847775-v1 306158994 21 positioning said laser so that the laser light strikes a portion of said first loop of wire but does not strike said terminal area.
14. The method of any one of claims 10 to 13, further comprising: forming a second loop of wire extending above the surface of the substrate, said 5 second loop of wire formed at a location offset from but not directly over or in contact with a second terminal area associated with said chip or chip module.
15. The method of claim 14, further comprising: moving said second loop of wire relative to the substrate to a position directly over or in contact with said second terminal area; and 10 electrically connecting said second loop of wire to said second terminal area.
16. The method of claim 14, further comprising: removing insulation from said second loop of wire prior to electrically connecting said second loop of wire to said second terminal area.
17. The method of any one of claims 10 to 16, further comprising: 15 forming said first loop of wire and said length of wire from a continuous length of wire.
18. The method of any one of claims 14 to 17, further comprising: forming said first loop of wire, said second loop of wire and said length of wire from a continuous length of wire. 20
19. A radio frequency device comprising: a substrate defining a substrate plane, and an integrated circuit positioned on said substrate or in a recess formed on said substrate; a pair of terminal areas associated with said integrated circuit and positioned adjacent thereto; and 25 a wire affixed to said substrate to form an antenna, said wire comprising a first portion laterally offset from and not electrically connected to one of said terminal areas and a first wire loop formed from said first portion, a second portion of the wire embedded in said substrate to form windings of the antenna, and a third portion of said wire laterally offset from and not electrically connected to the other of said terminal areas 30 and a second wire loop formed from said second portion. chbm A019847775-v1 306158994 22
20. A radio frequency device, as claimed in claim 19, wherein: said first and second wire loops are positioned above said substrate.
21. A radio frequency device substantially as herein described with reference to the accompanying drawings. chbm A019847775-v1 306158994 23
Applications Claiming Priority (9)
Application Number | Priority Date | Filing Date | Title |
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US82692306P | 2006-09-26 | 2006-09-26 | |
US60/826,923 | 2006-09-26 | ||
US82986206P | 2006-10-17 | 2006-10-17 | |
US60/829,862 | 2006-10-17 | ||
US11/733,756 US7546671B2 (en) | 2006-09-26 | 2007-04-10 | Method of forming an inlay substrate having an antenna wire |
US11/733,756 | 2007-04-10 | ||
US91375307P | 2007-04-24 | 2007-04-24 | |
US60/913,753 | 2007-04-24 | ||
PCT/IB2007/004589 WO2008114091A2 (en) | 2006-09-26 | 2007-09-26 | Method of connecting an antenna to a transponder chip and corresponding inlay substrate |
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AU2007349611A1 AU2007349611A1 (en) | 2008-09-25 |
AU2007349611B2 true AU2007349611B2 (en) | 2012-02-09 |
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AU2007349611A Ceased AU2007349611C1 (en) | 2006-09-26 | 2007-09-26 | Method of connecting an antenna to a transponder chip and corresponding inlay substrate |
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JP (1) | JP5408720B2 (en) |
KR (1) | KR101346050B1 (en) |
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CA (1) | CA2664872A1 (en) |
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US7707706B2 (en) | 2007-06-29 | 2010-05-04 | Ruhlamat Gmbh | Method and arrangement for producing a smart card |
US8522431B2 (en) | 2008-01-09 | 2013-09-03 | Féines Amatech Teoranta | Mounting and connecting an antenna wire in a transponder |
DE102009038620B4 (en) * | 2009-08-26 | 2012-05-24 | Melzer Maschinenbau Gmbh | Method and device for producing a transponder unit |
JP5861251B2 (en) * | 2010-11-26 | 2016-02-16 | 凸版印刷株式会社 | Wire conductor arrangement method and module substrate |
EP2492847A1 (en) * | 2011-02-25 | 2012-08-29 | NagraID S.A. | Card comprising a transponder |
ITMO20110331A1 (en) * | 2011-12-22 | 2013-06-23 | Fabele S R L | METHOD AND APPARATUS FOR THE REALIZATION OF A RADIO FREQUENCY IDENTIFICATION DEVICE EQUIPPED WITH AN ANTENNA MADE WITH AN ELECTRICALLY DRIVEN WIRE |
GB2502600B8 (en) | 2012-05-31 | 2015-01-07 | Improvements in touch sensitive displays | |
MY189207A (en) | 2012-07-12 | 2022-01-31 | Assa Abloy Ab | Method of manufacturing a functional inlay |
JP5886174B2 (en) * | 2012-11-16 | 2016-03-16 | 株式会社トッパンTdkレーベル | Non-contact communication medium manufacturing method, non-contact communication medium, and antenna and circuit device connection method |
KR101427339B1 (en) * | 2013-12-24 | 2014-08-06 | 주식회사포지스 | RFID card and preparing method for the same |
WO2016097817A1 (en) | 2014-12-15 | 2016-06-23 | Assa Abloy Ab | Method of producing a functional inlay and inlay produced by the method |
KR102001243B1 (en) * | 2017-11-28 | 2019-07-17 | 신혜중 | Embedding head for forming an antenna wire |
DE102018005569A1 (en) * | 2018-07-13 | 2020-01-16 | Mühlbauer Gmbh & Co. Kg | Device and method for producing RFID transponders |
GB2576498A (en) * | 2018-08-14 | 2020-02-26 | The Francis Crick Institute Ltd | Forming electrical connection between wire electrode and metallic contact surface |
US11694057B2 (en) | 2020-01-03 | 2023-07-04 | Sensormatic Electronics, LLC | RFID tag and method of making same |
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JP3721520B2 (en) * | 1996-02-12 | 2005-11-30 | フィン,ダーヴィト | Method for contacting wire conductors |
DE59701709C5 (en) * | 1996-02-12 | 2014-01-09 | Smartrac Ip B.V. | METHOD AND DEVICE FOR CONTACTING A WIRE GUIDE |
DE102004011929A1 (en) * | 2004-03-11 | 2005-09-29 | Conti Temic Microelectronic Gmbh | Electrical contact surfaces connection establishing method, involves arranging contact surfaces by irradiating surfaces with laser radiation having power density within specific range |
DE102004045896B4 (en) * | 2004-09-22 | 2007-01-18 | Mühlbauer Ag | Transponder with antenna and flip-chip module and method for its production |
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- 2007-09-26 WO PCT/IB2007/004589 patent/WO2008114091A2/en active Application Filing
- 2007-09-26 CA CA002664872A patent/CA2664872A1/en not_active Abandoned
- 2007-09-26 JP JP2009529801A patent/JP5408720B2/en not_active Expired - Fee Related
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- 2007-09-26 EP EP07872847A patent/EP2070013A2/en not_active Withdrawn
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WO2008114091A3 (en) | 2009-01-22 |
CA2664872A1 (en) | 2008-09-25 |
KR20090066309A (en) | 2009-06-23 |
AU2007349611A1 (en) | 2008-09-25 |
EP2070013A2 (en) | 2009-06-17 |
JP2010541189A (en) | 2010-12-24 |
WO2008114091A2 (en) | 2008-09-25 |
KR101346050B1 (en) | 2013-12-31 |
JP5408720B2 (en) | 2014-02-05 |
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