AU2005251078A1 - Receiver and method for wireless communications terminal - Google Patents

Description

WO 2005/119901 PCT/US2005/014192 1 RECEIVER FOR USE IN WIRELESS COMMUNICATIONS AND METHOD AND TERMINAL USING IT Field of the Invention 5 This invention relates to a receiver for use in wireless communications and a method and terminal using it. In particular, the invention relates to a direct conversion receiver capable of demodulating a frequency modulated 10 (FM) RF (radio frequency) signal by resolution and use of in-phase (I) and quadrature (Q) components of the modulated signal. Background of the Invention 15 Conventional FM wireless receivers built using direct conversion architectures to detect I and Q components of a received signal have an underlying problem. As illustrated later, such receivers can develop an error 20 in relative phase and amplitude between the I and Q components. This error, sometimes referred to as 'quadrature imbalance', can cause a distortion in the resulting output audio signal. The distortion may be unacceptable to users particularly under conditions when 25 the received signal is fading or has a low signal to noise ratio. The prior art does not provide a satisfactory solution to this problem. Summary of Invention 30 WO 2005/119901 PCT/US2005/014192 2 In accordance with a first aspect of the present invention there is provided a wireless receiver in accordance with claim 1 of the accompanying claims. 5 In accordance with a second aspect of the present invention there is provided a wireless communication method in accordance with claim 21 of the accompanying claims 10 In accordance with a third aspect of the present invention, there is provided a wireless communication terminal in accordance with claim 22 of the accompanying claims. 15 Embodiments of the present invention will now be described by way of example with reference to the accompanying drawings, in which: Brief Description of the Drawings 20 FIG. 1 is a schematic block circuit diagram of a known direct conversion RF receiver. 25 FIG. 2 is a graph of calculated inner product L versus imbalance phase angle a illustrating a relationship useful in embodiments of the invention; FIG. 3 is a schematic block circuit diagram of a direct 30 conversion RF receiver embodying the invention.

WO 2005/119901 PCT/US2005/014192 3 FIG. 4 is a schematic block circuit diagram of another direct conversion RF receiver embodying the invention. FIG. 5 is a graph of detector output versus local 5 oscillator frequency offset illustrating a relationship useful in the circuit shown in FIG. 4. FIG. 6 is a graph of phase imbalance angle versus slot number (algorithm cycle) for a simulated actual imbalance 10 and a calculated imbalance using signal processing embodying the invention. FIG. 7 is a graph of amplitude imbalance versus slot number for a simulated actual imbalance and a calculated 15 imbalance using signal processing embodying the invention. Description of embodiments of the invention 20 FIG. 1 shows a known RF direct conversion FM receiver 100 illustrating the problem to be addressed by the present invention. An incoming FM signal x(t)is delivered via an input path 101 having branched connections 103, 105 respectively to two mixers 107, 109. A local oscillator 25 111 generates a reference signal having the same frequency as the carrier frequency of the incoming signal x(t). A first component of the reference signal is applied directly to the mixer 107 where it is multiplied with the input signal x(t). A second component of the reference 30 signal is applied to a phase shifter 113 and a phase shifted output of the phase shifter 113 is applied to the WO 2005/119901 PCT/US2005/014192 4 mixer 109 where it is multiplied with the input signal x(t). Although the phase shifter 113 in combination with the mixers 107 and 109 is intended to introduce a phase shift of 90 degrees with unity gain between the 5 components of the reference signal applied to the mixers 107 and 109, in practice a phase shift slightly different from 90 degrees and a gain slightly different from unity are introduced. An output signal from the mixer 107 is passed through a low pass filter (LPF) 115 to produce an 10 output in-phase component signal 1(t) and an output signal from the mixer 109 is passed through a low pass filter (LPF) 117 to produce an output quadrature component signal Q(t). The imbalance in amplitude introduced into the output of the mixer 109 is shown in block 119 as an 15 imbalance gain A. A mathematical analysis of the arrangement shown in FIG. 1 is as follows: The input signal may be represented as 20 x(t) = cos(wt + +(t) ±;v) wherewois RF carrier frequency of the input RF signalx(t), yis oscillator arbitrary phase and #(t) is the frequency 25 modulation of x(t)to be detected. In addition, x(t) =I(t)+j*Q(t), where 1(t) and Q(t) are in-phase and quadrature components of x(t).

WO 2005/119901 PCT/US2005/014192 5 1(t) = 2 cos(wt + $(t) + y) cos(wt) = = cos(2wt + $(t) + r) + cos($(t) + y) = cos((t) + y) after LPF Q(t) = 2A cos(wt + $(t) + y) sin(wt + a)= = A sin(2wt + $(t) + y + a) + A sin($(t) + r + a) A sin((t) + r + a). after LPF 5 Where A represents the amplitude imbalance and a represents the phase imbalance angle between the phase angles of I(t)andQ(t). In accordance with an embodiment of the present invention 10 to be described later I(t) and Q(t) are periodically processed in a manner to be described later to estimate and eliminate these imbalances and the resulting adjusted components are combined to construct the modulation signal $(t)to provide an audio signal output. 15 The following analysis shows how the phase imbalance a may be determined. Consider the inner product L of 1(t) and Q(t). This is 20 given by the expression: L = I(t)Q(t)dt = JA sin(#(t) + y + a) cos(#(t) + y)dt = T0 0 = A sin(a) cos2 (#(t) + r)dt + A cos(a) sin(#(t) + y) cos($(t) + y)dt 00 L=Z+X 25 The value of T is chosen based on required immunity to noise.

WO 2005/119901 PCT/US2005/014192 6 In the general case X is not equal to zero. However, under certain conditions X << Z , i.e.: I T X =A cos(a)- Jsin(#(t)+7)cos(#(t)+ y)dt=0.

T

0 5 Two examples when this condition applies are as follows: 1. For tone FM modulation (an audio tone that is FM modulated; for example a 150 Hz PL tone that is FM modulated with a 500 Hz deviation) and y=0 we obtain X<<Z. I is then orthogonal to Q (L~Z). 10 2. For tone FM modulation and large modulation indexes we get X<<Z (LpZ). This is true for any y but not for any local oscillator frequency error. If the local oscillator (LO) has a frequency error which is 0, f./2, fn, 3f/ 2 etc. then X will not be zero. However, if such a 15 frequency error can be detected the LO frequency can be adjusted to overcome the problem as described later. So if the conditions to give X = 0 are satisfied as in these two examples, we obtain: 20 L=Asin(a) 1cos2($(t)+r)dt 0 For any value of #(t) the expression cos2 (#(t))dt is limited 0 tol. So for a=0,L=0. FIG. 2 illustrates the relationship between Land a. A 25 curve Cl which is a graph of L (units V 2 ) plotted against phase angle (a) PH2 in degrees is shown in FIG. 2. As seen WO 2005/119901 PCT/US2005/014192 7 in FIG. 2, the curve C1 reaches a trough when PH2 reaches a minimum value PH2_opt. This corresponds to a minimum value of L which is L(PH2_opt). 5 Thus, in the two examples mentioned above, we know that ifLis a minimum then the imbalance phase angle ais a minimum.So, using those examples, we aim to minimise L by an adaptive sampling and adjustment procedure. Adaptive arrangements embodying the invention using those examples 10 to find a minimum value of L are described in Examples 1 and 2 as follows. Example 1 15 A circuit 200 for use in this example is shown in FIG. 3. In FIG. 3, components having the same reference numerals as in FIG. 1 have the same function. The output signal I(t) passed by the low pass filter (LPF) 115 is sampled by a 20 connection 201 and the output signal Q(t) passed by the low pass filter (LPF) 117 is sampled by a connection 203. The respective sampled signals are provided as respective inputs to a processor 205 which squares the respective inputs and estimates a value of a factor A which is an 25 estimated amplitude imbalance. This is determined as ~Q 2 An output signal from the processor 205 is an amplitude imbalance correction signal indicating a value of 1/A. This correction signal is applied via a connection 202 to WO 2005/119901 PCT/US2005/014192 8 an amplitude modifier 207 which modifies the amplitude of Q(t) by a factor of 1/A to eliminate the detected amplitude imbalance A. 5 The output signal passed by the low pass (LPF) filter 115 representing the component I(t) is sampled by a connection 210 having a first branch 223 connected to a DC estimator 225 which estimates a DC value. The output signal Q(t) passed by the low pass filter (LPF) 117 is sampled by a 10 connection 208 having a branch 217 connected to a DC estimator 219 which estimates a DC value of the signal Q(t). By 'DC value' we mean the value of I(f) or Q(f) as appropriate when f=0, where I(f) is the Fourier transform of the signal I(t) andQ(f) is the Fourier transform of the 15 signalQ(t).). Output signals from the DC estimators 219 and 225 are delivered to an arbitrary phase estimator 221 which uses the two signals to estimate the arbitrary phase angle y in a manner described later. An output signal from the arbitrary phase estimator 221 20 representing the arbitrary phase angle y is provided via a connection 227 to processors 211 and 215 described further below. The connection 210 is also connected directly to the processor 215. The connection 209 is connected to a phase shifter PH2 209 which in turn is 25 connected to the processor 211. The processors 211, 215 calculate a function e where i is the index of y. For each value a, of a the processor 221 calculates y,. Processors 211 and 215 phase shift Q(t) and I(t) by 7, WO 2005/119901 PCT/US2005/014192 9 for each value ac. Output signals from the processors phase shifters 211 and 215 are multiplied by a mixer 213 producing an output signal which is supplied to a further processor 212 which calculates a parameter 'L' for each 5 a, An output signal from the processor 212 represents the parameter L referred to earlier and is applied to a memory and processing unit which records the value of L accordingly. 10 A phase shift control signal is applied from the memory and processing unit 214 via a connection 216 to the phase shifter PH2. The phase shift control signal operates to apply at the phase shifter PH2 a phase shift which has a phase shift angle varying in steps from -5 degrees to +5 15 degrees in 0.2 degree steps in a single sweep (or multiple sweeps in which the steps become smaller from sweep to sweep). For each phase shift angle value applied, the corresponding value of L generated at the processor 212 is monitored at the unit 214 and the value 20 of phase shift angle giving the minimum value of L is recorded. This corresponds to the minimum value of a referred to earlier. A phase shift control signal corresponding to an equal and opposite value of this calculated phase angle is applied from the unit 214 via a 25 connection 229 to a phase shifter PH1 231. A signal corresponding to the quadrature component Q(t) is applied from the low pass filter 117 via a connection 226 to the phase shifter PH1 231. The phase shifter PH1 231 thereby applies a phase angle adjustment which compensates for 30 the detected phase imbalance angle a.. An output from the WO 2005/119901 PCT/US2005/014192 10 phase shifter PHl 231 corresponding to a phase adjusted value of Q(t) is applied to a processor 218. A signal corresponding to the in-phase component 1(t) is also applied as an input to the processor 218 via a connection 5 224. The processor 218 calculates a value of the quotient Q(t)/I(t) from its respective inputs and supplies a signal representing the result to a processor 230. The processor 230 calculates the value of the arctangent (arctg) of the input signal from the processor 10 218. An output signal from the processor 230 is applied to a further processor 232 which calculates the differential with respect to time t of the input signal. Finally, an output signal from the processor 233 is applied to an audio output. The audio output 233 includes 15 a transducer such as an audio speaker which converts an electronic signal output from the processor 232 into an audio signal, e.g. speech information. The following is a mathematical analysis further 20 explaining and illustrating operation of the circuit 200 shown in FIG 3. (i) Estimation of the arbitrary phase angle Let us examine the DC value of the I and Q components: iT IDC = Jcos((t) + y)dt = cos(y)J0 (p8) 25 1 T Q=- jsin(#(t) + a + y)dt = sin(a + y)Jo() To where J (.) is Bessel function of first kind of order zero.

WO 2005/119901 PCT/US2005/014192 11 Assume that we want to estimate the arbitrary angley with an accuracy of +/- (X. So we can approximate to the following expressions: IDC = cos(#(t)+ y)dt = cos(y)J, (8) To QDC ~ sin($ (t) + a + y)dt = sin(y)Jo (0) 5 Using the last two equations y can be estimated by the following calculation: y = arctan( QDC IDC This is carried out by the arbitrary phase estimator 221 10 in FIG. 1. (ii) Application of an arbitrary phase angle correction: For each a 1 applied by the phase shifter PH2 a corresponding 7, is calculated. So for each a, the following correction is performed: 1 {[i cos(a) - Q sin(a,)] + jQ}e"ri where calculation of e"' is the function of processors 211 and 215. 20 The phase shift introduced by phase shifter PH2 (and also by the phase shifter PH1) is actually implemented in accordance with the following mathematical analysis: 'corr I. cos(a.) - Q. sin(a) Qcorr Qin WO 2005/119901 PCT/US2005/014192 12 So Ic,, + jQco,, = {[I cos(a,) - Q,, sin(a,)]+ jQ} where Ii and Q,, are inputs to PH2. Ico and Qrr are outputs of PH2. For simplicity in the drawing (FIG. 3) PH2 (and PHl) are shown in the Q path 5 but the actual implementation is using the last set of equations above. For L=minimum we obtain: a = a, (L min) r = y(L = min) 10 For the above values of cXand y, Jand( Qare orthogonal. Let us assume a signalling tone (RF carrier signal) at f frequency that is FM modulated in accordance with the industry standard TIA 603. This is an industry standard 15 published by TIA and entitled 'Land Mobile FM OR PM Communications Equipment and Performance Standards' which includes the following specifications: 'The CDCSS ('Continuous Digital Controlled Squelch System') shall define a system where the radio receiver(s) are equipped 20 with tone or data responsive devices that allow audio signals to appear at the receiver audio output, select voice processing such as scrambling, select between voice or data, or control repeater functions, only when a carrier modulated with a specific tone or data pattern is 25 received. The tone or data pattern must be continuously present for continuous audio output. The transmitter emitting the carrier shall be modulated with a continuous tone as in a CTCSS system ('Continuous Tone Controlled Squelch System'), whose frequency is the same as the tone WO 2005/119901 PCT/US2005/014192 13 required to operate the tone-responsive CTCSS device at the receiver output. In a CDCSS system, the transmitter emitting the carrier shall in a similar manner be modulated with a continuous NRZ FSK data stream having 5 the correct pattern to operate the data sensitive detector at the receiver output. The purpose of the defined system is to minimize the annoyance of hearing communications directed to others sharing the same carrier frequency or channel. By using a specific tone 10 or data stream, each user may code his carrier to prevent the reception of audio signals by any uncoded or differently coded carriers.' CTCSS/CDCSS is thus sub-audio signalling using the 15 above TIA protocol. The CDCSS turn off code is the waveform necessary to disable the audio output of the receiver prior to the RF carrier removal. This serves as a squelch tail or noise 20 eliminator. To accomplish this the CDCSS encoder shall transmit a 134.4 +/-0.5 Hz tone for 150 to 200 milliseconds. It can also be PL/DPL tone. (PL=Private Line, DPL=Digital Private Line). PL/DPL and sub-audio signalling for opening the receiver squelch. PL/DLP are 25 transmitted in parallel with voice.' We can comply with this specification by applying adaptive corrections needed during periods when there is no voice activity although in practice we found out that 30 our phase adjustment algorithm works well even in presence of audio voice.

WO 2005/119901 PCT/US2005/014192 1'C"If"/US111 4 1942 14 For the I channel: I(t) ; cos(#(t)) = cos(pi sin(wt))= Jo (p) + 21 J, (p8) cos(2kcot) For CDCSS audio turn off code the modulation index is _5 00Hz_ 5 pCDCSS _Audio _turn _off - 134.4Hz = 3.72 Bessel function Jo (pCDCSSAudioturn-offf = (3.72) = 0.4 So for case of CDCSS audio turn off code 10 I(t) ~z 2Z J, (6)cos(2kco,,t) k=1 For the Q channel: Q(t) s sin(#(t) - a) = cos(pld sin(w,,t) - a) = sin(p3 sin(cot)) cos(a) - cos(p sin(cont)) sin(a)= = cos(a)[21 J 2

-

1 (8) sin((2k - 1)c, 0 t)] - sin(a)[Jo (p) + 2Y J, (p) cos(2ka,,t)] 15 So for case of CDCSS audio turn off code Q(t) ~ cos(a)[2X J2k-1 (p8)sin((2k - 1)cot)] - sin(a)[2Z Jk(p3) cos(2kco,,t)] k=1 k=1 1iT As described earlier, L=JI(t)Q(t)dt To 1{21 J, (p) cos(2kcot)} {cos(a)[2 J2k-1(p) sin((2k - 1)cot)] L= -J k=1 k=1 }dt T - sin(a)[2 J, (p3)cos(2kco, t) k=1 1 {2Z J, (8) cos(2kco t) }{cos(a) [2 J2k- (p8) sin((2k - 1)Co, t)] L =-f k1 k

T

0 - sin(a)[2EJk (/3)cos(2kcot)]}dt k=1 20 1 4 cos(a)[Z J, (#8) cos(2kp,t) J2,- (p8) sin((2k -1)mt)] L=-J k=1. k-I. T _ sin(a)( [ Jk (/) cos(2kcot)] [Z J, (/p) cos(2kCO,,t)]dt k=l kuI WO 2005/119901 PCT/US2005/014192 15 The first part of L is zero due to the integral of orthogonal functions. So: 1 T 5 L = 4 sin(a) - JJ,(p)cos(2kco,t)]['( ,(/) COs(2kco,,t)]dt T , k=1 Again, due to the integral applying to orthogonal functions:

T

L = 4 sin(a) - J[I J2 (p6) cos 2 (2kco,,t)]dt T k=1 1iT L = 4sin(a) J 2 k() j[cos 2 (2ko,,t)]dt k=1T, 10 But T cos2(2kcot)dt = So we obtain: L = 2sin(a)l J 2() k=1 15 From this last equation we can see that for a=0 L = 0. L = 0 can in this Example be simplified to X=0. Determination of when X = 0 or more practically when X is a minimum is carried out by the unit 214 in the manner described with reference to FIG. 3 by applying a sweep of 20 phase adjustment steps via the phase shifter PH2 and recording in the unit 214 when the output of the processor 212 gives a minimum value. (iii) Demodulation to give an audio output signal 25 WO 2005/119901 PCT/US2005/014192 16 An audio output signal can be constructed using the following relationship: d F Q(t)1_ d F FAsinQ/#(t) +a)] audio =- arctan -- = -arctan A dt 1(t) dt cos($(t)) 5 Calculation of the last expression is carried out in the circuit 200 by the processors 218, 230 and 233 as described earlier. 10 Example 2 A circuit for use in this Example is shown in FIG 4. In this Example, tone FM modulation with large modulation indexes is being used to give L=X as referred to earlier. 15 Components in FIG. 4 having the same reference numerals as components in FIG. 1 or FIG. 3 have the same function as such components and will not be described again. In FIG. 4, a connection 305 from the phase shifter PH2 209 is connected directly to the mixer 213 and a connection 20 327 from the output of the low pass filter 115 is connected directly to the mixer 213. The calculation of L by the processor 212 - to find a minimum value of L by sweeping through values of phase adjustment applied at the phase shifter PH2 209 - thereby includes no 25 correction for arbitrary phase angle y as in the circuit 200 of FIG. 3. This is because L= Z is true for anyyin this Example 2 but not if there is any frequency offset (error) between the carrier frequency of the incoming received signal x(t) and the frequency of the local WO 2005/119901 PCT/US2005/014192 17 oscillator (LO) frequency. If the LO frequency offset is in the series 0,fn/2,fm, 3fm/2.... Hz then X will not be zero. In other words, the calculation of L for phase adjustment does not work correctly (gives an incorrect 5 result) if there is a problematic frequency offset . The problematic frequency offsets are the discrete values mentioned above. The bandwidth (width of a peak within the series) of a problematic frequency offset is around Sand depends onintegration time. For example for an 2 10 integration time of 150 msec the problematic frequency range (bandwidth)is ±V-1:7z 2 T. For an integration time of 1000 msecthe problematic frequency range is n--':6i+. 2 (There is no optimum integration time. The longer we integrate over the narrower is the problem bandwidth.) 15 The circuit 300 therefore detects and adjusts any problematic LO frequency offset as follows. The quadrature component Q(t) sampled by the connection 208 is further sampled by a connection 322 leading to a 20 frequency error detector 320. Likewise the in-phase component 1(t) is sampled by a connection 327 leading to the detector 320. The detector detects whether a frequency error in the series 0, fm/2, f,, 3f /2 exists. 25 FIG. 5 illustrates an output of the detector 320 as a function of frequency error or offset Af (Hz). An error is detected when the output is above a threshold THR. If WO 2005/119901 PCT/US2005/014192 18 such an error is detected, a correction signal is generated and is applied via a connection 312 to the local oscillator 111 to adjust the reference frequency generated by the local oscillator 111 to compensate for 5 the error so that the local oscillator frequency is not a problematic frequency, e.g. by moving the local oscillator frequency by 20Hz. Operation of the local frequency detector is in accordance with the following analysis. 10 If an offset frequency f=k-fm, where k is an 2 integer is received, the algorithm will disable detection. 15 The detector 320 operates the following correlation WO 2005/119901 PCT/US2005/014192 19 N-1 2 N-1 2 , - IIdeal + Qr' QIdeaJ N____ _____ >th N-1 N-1 N n- n=OEa where I Ideal COS(2-7 -0.5*f-t+2-r - - m 9 Ideal =Sin(2-7r-0.5*fm -t+2-;T- 3- fm(r)-dr) m(')is the samples of expected PL or end tone. 5 'Ideal and QIdeal are stored in a memory associated with the receiver. The following mathematical analysis describes the 10 procedure of this Example 2: From the earlier description we have: 1(t) z cos(#(t) - y) Q(t) ~ sin(#(t) - a - y) WO 2005/119901 PCT/US2005/014192 20 where #(t) = 2rf, fA, cos(coz-)dr = 8 sin(cot) 0 Af where 8 = mfd is a modulation index. f.z Also from the earlier description: L=Asin(a) jcos2((t)+)dt To

P

1 5 For large modulation indexes I as in this Example 2, the I path power is equal to Q path power: (The path power Power of I is P = f 2 (t)dt. The path power of Q is T

P

1 P = Q2(t)dt P = Pa 0

P

1 LL So, - = A sin(a) and a = arcsin( ) P P 10 But calculating the phase imbalance Oausing an arcsin function is problematic (gives inaccurate results) in an environment in which the received incoming signal is faded owing to the discrete local oscillator frequency errors as illustrated in FIG. 5. So the local oscillator 15 frequency is adjusted if necessary as described earlier. The accuracy of the procedure described with reference to FIG. 4 (algorithm tracking performance) used in Example 2 was determined for a signal to noise ratio of 15 dB a 20 tone time of 150 msec and a signal sample rate of frequency Fs of 48 KHz as a PL synthesised signal. FIG.s WO 2005/119901 PCT/US2005/014192 21 6 and 7 show the results obtained. In FIG. 6, curve C1 indicates a simulated received phase angle imbalance and curve C2 indicates a calculated phase angle imbalance using the estimation of the minimum value of L using the 5 phase shifter PH2 209 and the processors 212 and 214. As illustrated in FIG. 6, the phase imbalance (degrees) calculated by the adjustment algorithm closely tracks the actual phase imbalance. In FIG. 7, curve C3 indicates a simulated received amplitude imbalance and curve C4 10 indicates a calculated amplitude imbalance using the processor 205. As illustrated in FIG. 7, the amplitude imbalance (%) calculated by the adjustment algorithm closely tracks the actual amplitude imbalance. 15 In FIG.s 6 and 7 the 'Slot No.' measured on the horizontal axis is each integration period of the algorithm. Thus a slot of 150 msec is for example an integration period of 150msec. Thus, in FIG.s 6 and 7 the algorithm in each case runs for 150 msec, calculates the 20 required phase (FIG. 6) or amplitude (FIG. 7) adjustment (for slot 1). Then it runs for another 150 msec, and calculates the adjustment (for slot 2) and so on. In the circuits 200 and 300 described above with 25 reference to FIG.s 3 and 4 various processors are described. These may be separate processing devices although two or more of these processors could be combined in a single processing device. Suitably, each processing device may comprise a digital signal processor 30 programmed and operating in a manner known per se to WO 2005/119901 PCT/US2005/014192 22 carry out the required signal processing or calculation function (s) . In summary, the invention provides an improved method and 5 apparatus for adaptive quadrature imbalance compensation in a direct conversion receiver. Where the invention is used in a radio receiver, a memory of the radio may be programmed following manufacture to 10 store a table of initial imbalance values versus RF frequency. During operation of the radio the imbalance values will change with time. Thus, updated imbalance information may be gathered in use as described in the above Examples and used to provide suitable compensation 15 to maintain a suitable quality of audio output signal. The updated imbalance information may also be stored in the memory of the radio to replace the originally stored information. 20 In contrast to the prior art, the procedures described in Examples 1 and 2 with reference to FIG.s 3 and 4 allow operation in conditions in which the received signal to noise ratio is low and/or Rayleigh (multipath) fading is occurring. 25 The receiver circuit 200 or 300 may be used in a conventional mobile station using direct conversion for FM wireless communication.

WO 2005/119901 PCT/US2005/014192 UNITED STATES PATENT AND TRADEMARK OFFICE DOCUMENT CLASSIFICATION BARCODE SHEET I1111111111111 I1111111111111111111111111li l l Index 1.1.5.2 Version 1.0 Rev 12/06/01

Claims (10)

1. A wireless receiver for receiving and demodulating a frequency modulated RF signal by a direct 5 conversion procedure, including an input signal path for delivering an RF input received signal, a local oscillator, connected to the input signal path a first mixer for mixing an output reference signal from the local oscillator with an input received signal to produce 10 an in-phase component of the input received signal, a quadrature phase shifter for applying a quadrature phase shift to an output reference signal from the local oscillator, connected to the input signal path a second mixer for mixing an output signal from the phase shifter 15 with the input received signal to produce a quadrature component of the input received signal; and means for producing an output demodulated information signal by producing a combining function of the in-phase and quadrature components; and characterised by means for 20 periodically detecting an error in the relative phase difference between the in-phase and quadrature components and for applying an relative adjustment in phase difference to compensate for the detected error. 25

2. A receiver according to claim 1 wherein the means for periodically detecting an error is operable to determine an inner product L of the in-phase and quadrature components, wherein the inner product L is 1 T) defined by the expression L=- JI(t)Q(t)dt, where 1(t) is the To WO 2005/119901 PCT/US2005/014192 24 in-phase component, Q(t) is the quadrature component, t is time and Tis an integration period.

3. A receiver according to claim 2 wherein the means 5 for periodically detecting an error is operable to determine an approximation of L which is of the form L= Z = Asin(a) cos2(#(t)+y/)dt where A is an amplitude measure, 0 # is a tone frequency modulation, a is an error in phase angle between an in-phase component and a quadrature 10 component of the input RF received signal, yan arbitrary phase angle and t is time.

4. A receiver according to claim 3 wherein the means for periodically detecting an error is operable to 15 determine the inner product L when at least one of a) an arbitrary phase angle y is zero, and b) the input RF received signal is tone modulated with a large modulation index, and c) is a minimum. 20

5. A receiver according to claim 4 wherein the means for periodically detecting an error is operable to sample the in-phase and quadrature components and to apply a varying relative phase shift between the sampled in-phase and quadrature components and to determine when the 25 relative varied phase shift gives a minimum value of the inner product L.

6. A receiver according to claim 5 wherein the means for periodically detecting an error is operable to apply WO 2005/119901 PCT/US2005/014192 25 a relative phase shift between the sampled in-phase and quadrature components which varies in steps.

7. A receiver according to claim 1 wherein the means 5 for producing an output demodulated information signal by producing a combining function is operable to calculate a differential function - arctan {Qt} wherel(t)is the in dt It _l phase component,Q(t)is the quadrature component, and tis time. 10

8. A receiver according to claim 1 includes means for periodically detecting an imbalance in amplitude between the in-phase and quadrature components and for applying an adjustment in relative amplitude to compensate for the 15 detected imbalance.

9. A receiver according to claim 1 which includes means for periodically detecting an imbalance in frequency between the output reference signal of the 20 local oscillator and the input received signal and for applying an adjustment in frequency of the output reference signal to compensate for the detected imbalance. 25

10. A method of receiving and demodulating a frequency modulated RF signal by a direct conversion procedure to periodically detect an error in the relative phase difference between the in-phase and quadrature components of an input RF received signal and for WO 2005/119901 PCT/US2005/014192 26 applying an relative adjustment in phase difference to compensate for the detected error.