AU2003281382A1 - A processor system and method for controlling signal timing therein - Google Patents
A processor system and method for controlling signal timing thereinInfo
- Publication number
- AU2003281382A1 AU2003281382A1 AU2003281382A AU2003281382A AU2003281382A1 AU 2003281382 A1 AU2003281382 A1 AU 2003281382A1 AU 2003281382 A AU2003281382 A AU 2003281382A AU 2003281382 A AU2003281382 A AU 2003281382A AU 2003281382 A1 AU2003281382 A1 AU 2003281382A1
- Authority
- AU
- Australia
- Prior art keywords
- processor system
- controlling signal
- signal timing
- timing
- controlling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/08—Clock generators with changeable or programmable clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/14—Time supervision arrangements, e.g. real time clock
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Power Sources (AREA)
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0212261.2 | 2002-05-28 | ||
GBGB0212261.2A GB0212261D0 (en) | 2002-05-28 | 2002-05-28 | Processor load monitoring system |
GB0214375.8 | 2002-06-20 | ||
GB0214375A GB2381609B (en) | 2002-05-28 | 2002-06-20 | Processor load monitoring system |
PCT/GB2003/002285 WO2004006089A1 (en) | 2002-05-28 | 2003-05-27 | A processor system and method for controlling signal timing therein |
Publications (1)
Publication Number | Publication Date |
---|---|
AU2003281382A1 true AU2003281382A1 (en) | 2004-01-23 |
Family
ID=30117083
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AU2003281382A Abandoned AU2003281382A1 (en) | 2002-05-28 | 2003-05-27 | A processor system and method for controlling signal timing therein |
Country Status (2)
Country | Link |
---|---|
AU (1) | AU2003281382A1 (en) |
WO (1) | WO2004006089A1 (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007077516A1 (en) * | 2006-01-06 | 2007-07-12 | Koninklijke Philips Electronics, N.V. | Power aware dynamic scheduling in multiprocessor system employing voltage islands |
CN103488273B (en) * | 2013-09-12 | 2016-03-23 | 江苏中科梦兰电子科技有限公司 | A kind of feed circuit being controlled Godson 3B1500 core voltage by GPIO |
FR3032106B1 (en) | 2015-02-02 | 2020-07-31 | Centre Nat Rech Scient | MICRODISPOSITIVE FOR THE IN VIVO CAPTURE OF CIRCULATING CELLULAR BIOMARKERS. |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5142684A (en) * | 1989-06-23 | 1992-08-25 | Hand Held Products, Inc. | Power conservation in microprocessor controlled devices |
EP0632360A1 (en) * | 1993-06-29 | 1995-01-04 | Xerox Corporation | Reducing computer power consumption by dynamic voltage and frequency variation |
US5623647A (en) * | 1995-03-07 | 1997-04-22 | Intel Corporation | Application specific clock throttling |
-
2003
- 2003-05-27 AU AU2003281382A patent/AU2003281382A1/en not_active Abandoned
- 2003-05-27 WO PCT/GB2003/002285 patent/WO2004006089A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
WO2004006089A1 (en) | 2004-01-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
AU2003286013A1 (en) | A method and system for access control | |
AU2003225542A1 (en) | A system and method for managing knowledge | |
AU2003212711A1 (en) | Method and device for liner system | |
AU2002340674A1 (en) | Method and apparatus for a waking control system | |
AU2003279950A1 (en) | System and method for providing access control | |
AU2003243646A1 (en) | System and method for facilitating ridesharing | |
AU2003234289A1 (en) | System and method for blackfield detection | |
AU2002249540A1 (en) | A method for timing control | |
AU2003206526A1 (en) | Predictive control system and method | |
AU2003239710A1 (en) | System and method for providing videomarks for a video program | |
AU2003258984A1 (en) | Train control system and method | |
AU2003253024A1 (en) | Method for training a learning-capable system | |
AU2002345130A1 (en) | Method and system for receiving a multi-carrier signal | |
AU2003256936A1 (en) | System and method for model based control | |
HK1074507A1 (en) | System and method for signal timing | |
AU2003220450A1 (en) | A method and apparatus for precise signal interpolation | |
AU2003215359A1 (en) | System and method for object activation | |
AU2003233608A1 (en) | Method and apparatus for time-sharing a rake receiver structure | |
AU2003303261A1 (en) | Method and system for authentificating a disc | |
AU2003231385A1 (en) | Mounting method and mounting system | |
AU2002368021A1 (en) | Method and system for authenticating a software | |
AU2003244870A1 (en) | System and method for calculating a result from a division | |
AU2003292978A1 (en) | Navigation system and method for operating a navigation system | |
AU2003203036A1 (en) | Method and system for vibratory conveyor control | |
AU2003263016A1 (en) | Method and system to determine a clock signal for packet processing |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MK6 | Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase |