AU2003265535A8 - Method of performing a multiprecision modular multiplication phase with two operands and a cryptoprocessor for carrying out said method - Google Patents

Method of performing a multiprecision modular multiplication phase with two operands and a cryptoprocessor for carrying out said method

Info

Publication number
AU2003265535A8
AU2003265535A8 AU2003265535A AU2003265535A AU2003265535A8 AU 2003265535 A8 AU2003265535 A8 AU 2003265535A8 AU 2003265535 A AU2003265535 A AU 2003265535A AU 2003265535 A AU2003265535 A AU 2003265535A AU 2003265535 A8 AU2003265535 A8 AU 2003265535A8
Authority
AU
Australia
Prior art keywords
multiprecision
cryptoprocessor
operands
carrying
modular multiplication
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003265535A
Other versions
AU2003265535A1 (en
Inventor
Jean-Francois Dhem
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus Card International SA, Gemplus SA filed Critical Gemplus Card International SA
Publication of AU2003265535A1 publication Critical patent/AU2003265535A1/en
Publication of AU2003265535A8 publication Critical patent/AU2003265535A8/en
Abandoned legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
AU2003265535A 2002-04-30 2003-04-30 Method of performing a multiprecision modular multiplication phase with two operands and a cryptoprocessor for carrying out said method Abandoned AU2003265535A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0205445A FR2839224B1 (en) 2002-04-30 2002-04-30 METHOD FOR PERFORMING A MODULAR MULTIPLICATION PHASE OF TWO OPERANDS IN MULTIPRECISION AND CRYPTOPROCESSOR FOR THE IMPLEMENTATION OF THE METHOD
FR02/05445 2002-04-30
PCT/FR2003/001367 WO2003093974A2 (en) 2002-04-30 2003-04-30 Method of performing a multiprecision modular multiplication phase with two operands and a cryptoprocessor for carrying out said method

Publications (2)

Publication Number Publication Date
AU2003265535A1 AU2003265535A1 (en) 2003-11-17
AU2003265535A8 true AU2003265535A8 (en) 2003-11-17

Family

ID=28800079

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003265535A Abandoned AU2003265535A1 (en) 2002-04-30 2003-04-30 Method of performing a multiprecision modular multiplication phase with two operands and a cryptoprocessor for carrying out said method

Country Status (3)

Country Link
AU (1) AU2003265535A1 (en)
FR (1) FR2839224B1 (en)
WO (1) WO2003093974A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112506468B (en) * 2020-12-09 2023-04-28 上海交通大学 RISC-V general processor supporting high throughput multi-precision multiplication operation

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2658932A1 (en) * 1990-02-23 1991-08-30 Koninkl Philips Electronics Nv METHOD OF ENCODING THE RSA METHOD BY A MICROCONTROLLER AND DEVICE USING THE SAME

Also Published As

Publication number Publication date
WO2003093974A3 (en) 2004-04-01
AU2003265535A1 (en) 2003-11-17
FR2839224A1 (en) 2003-10-31
WO2003093974A2 (en) 2003-11-13
FR2839224B1 (en) 2007-05-04

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase