AU2003246576A1 - Device and method for processing a sequence of jump instructions - Google Patents

Device and method for processing a sequence of jump instructions

Info

Publication number
AU2003246576A1
AU2003246576A1 AU2003246576A AU2003246576A AU2003246576A1 AU 2003246576 A1 AU2003246576 A1 AU 2003246576A1 AU 2003246576 A AU2003246576 A AU 2003246576A AU 2003246576 A AU2003246576 A AU 2003246576A AU 2003246576 A1 AU2003246576 A1 AU 2003246576A1
Authority
AU
Australia
Prior art keywords
sequence
processing
jump instructions
jump
instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
AU2003246576A
Inventor
Dirk Rabe
Holger Sedlak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of AU2003246576A1 publication Critical patent/AU2003246576A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
AU2003246576A 2002-06-24 2003-06-24 Device and method for processing a sequence of jump instructions Abandoned AU2003246576A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10228151A DE10228151A1 (en) 2002-06-24 2002-06-24 Device and method for processing a sequence of jump instructions
DE10228151.3 2002-06-24
PCT/EP2003/006625 WO2004001586A1 (en) 2002-06-24 2003-06-24 Device and method for processing a sequence of jump instructions

Publications (1)

Publication Number Publication Date
AU2003246576A1 true AU2003246576A1 (en) 2004-01-06

Family

ID=29795859

Family Applications (1)

Application Number Title Priority Date Filing Date
AU2003246576A Abandoned AU2003246576A1 (en) 2002-06-24 2003-06-24 Device and method for processing a sequence of jump instructions

Country Status (5)

Country Link
EP (1) EP1516245B1 (en)
AU (1) AU2003246576A1 (en)
DE (2) DE10228151A1 (en)
TW (1) TWI285840B (en)
WO (1) WO2004001586A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7401210B2 (en) * 2005-03-30 2008-07-15 Arm Limited Selecting subroutine return mechanisms
EP2862061A4 (en) * 2012-06-15 2016-12-21 Soft Machines Inc A virtual load store queue having a dynamic dispatch window with a unified structure
CN113724775B (en) * 2021-08-23 2023-07-04 南京大普信息技术有限公司 Meta information management method, solid state disk controller and solid state disk

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5261101A (en) * 1990-02-28 1993-11-09 Microsoft Corporation Method for calling and returning from subroutine that is invoked by either a near call or a far call
EP0649084A1 (en) * 1993-10-18 1995-04-19 Cyrix Corporation Microprocessor branch processing

Also Published As

Publication number Publication date
EP1516245A1 (en) 2005-03-23
TWI285840B (en) 2007-08-21
WO2004001586A1 (en) 2003-12-31
TW200405207A (en) 2004-04-01
EP1516245B1 (en) 2005-08-24
DE50301056D1 (en) 2005-09-29
DE10228151A1 (en) 2004-02-05

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Legal Events

Date Code Title Description
MK6 Application lapsed section 142(2)(f)/reg. 8.3(3) - pct applic. not entering national phase